Latest Advancements in Next-Generation Semiconductors: Materials and Devices for Wide Bandgap and 2D Semiconductors

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D:Materials and Processing".

Deadline for manuscript submissions: closed (30 September 2023) | Viewed by 18117

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The Commonwealth Scientific and Industrial Research Organisation (CSIRO), Building 101, Clunies Ross Street, Black Mountain, ACT 2601, Australia
Interests: semiconductor devices; quantum computing; nanofabrication; machine learning
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Guest Editor
1. School of Materials Science, The City University of Hong Kong, Road to Kowloon, Hong Kong 999077, China
2. School of Materials Science and Engineering, University of New South Wales, Sydney, NSW 2052, Australia
Interests: 2D materials; nanotechnology; semiconductor devices
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

While Moore’s law is approaching its limit, advanced semiconductors, e.g., 2D materials, and wide bandgap semiconductors, opened up another possibility for next-generation electronic devices. Recent progress has already shown that 2D materials and wide bandgap semiconductors are competitive candidates for substituting their Si counterparts in many modern applications. Also, the advanced modeling, simulation, and fabrication techniques enable and ignite more diverse innovations in the related research community. Accordingly, numerous novel structures, strategies, processes, and applications have started emerging, which timely address the burning issues and bring new live breath to this field. Therefore, this Special Issue is set up to create an open forum for the researchers to report their state-of-the-art results, in the form of research papers, communications, and review articles. Furthermore, the Special Issue particularly solicits papers with novel ideas and proposals from modeling or simulation, which may constitute an innovative idea pool for the stakeholders, decision-makers, and senior engineers.

The Special Issue cordially solicits topics related to next-generation semiconductors, e.g., Layered Transition Metal Chalcogenides, Graphene, Black Phosphorus, III-V, SiC, ZnO, Ga2O3, Diamond, etc., but not limited to:

  1. Novel device structures, processes, and models.
  2. Novel material and heterojunction synthesis, characterizations.
  3. Numerical study and simulation of next-generation semiconductors.
  4. Proposals related to next-generation semiconductors.
  5. Machine learning in next-generation semiconductors.
  6. Advanced computing (neural computing, in-memory computing, and quantum computing) using next-generation semiconductors.

Dr. Zeheng Wang
Dr. Jingkai Huang
Guest Editors

Manuscript Submission Information

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Keywords

  • semiconductors
  • fabrication
  • simulation
  • machine learning

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Published Papers (11 papers)

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Editorial

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4 pages, 192 KiB  
Editorial
Latest Advancements in Next-Generation Semiconductors: Materials and Devices for Wide Bandgap and 2D Semiconductors
by Zeheng Wang and Jing-Kai Huang
Micromachines 2023, 14(11), 1992; https://doi.org/10.3390/mi14111992 - 27 Oct 2023
Viewed by 843
Abstract
Semiconductor materials, devices, and systems have become indispensable pillars supporting the modern world, deeply ingrained in various facets of our daily lives [...] Full article

Research

Jump to: Editorial, Review

11 pages, 4214 KiB  
Article
Influence of Gate Geometry on the Characteristics of AlGaN/GaN Nanochannel HEMTs for High-Linearity Applications
by Meng Zhang, Yilin Chen, Siyin Guo, Hao Lu, Qing Zhu, Minhan Mi, Mei Wu, Bin Hou, Ling Yang, Xiaohua Ma and Yue Hao
Micromachines 2023, 14(8), 1513; https://doi.org/10.3390/mi14081513 - 28 Jul 2023
Cited by 2 | Viewed by 1051
Abstract
In this study, AlGaN/GaN nanochannel high-electron-mobility transistors (HEMTs) with tri-gate (TGN-devices) and dual-gate (DGN-devices) structures were fabricated and investigated. It was found that the peak value of the transconductance (Gm), current gain cut-off frequency (fT) and power gain cut-off [...] Read more.
In this study, AlGaN/GaN nanochannel high-electron-mobility transistors (HEMTs) with tri-gate (TGN-devices) and dual-gate (DGN-devices) structures were fabricated and investigated. It was found that the peak value of the transconductance (Gm), current gain cut-off frequency (fT) and power gain cut-off frequency (fmax) of the TGN-devices were larger than that of the DGN-devices because of the enhanced gate control from the top gate. Although the TGN-devices and DGN-devices demonstrated flattened transconductance, fT and fmax profiles, the first and second transconductance derivatives of the DGN-devices were lower than those of the TGN-devices, implying an improvement in linearity. With the nanochannel width decreased, the peak value of the transconductance and the first and second transconductance derivatives increased, implying the predominant influence of sidewall gate capacitance on the transconductance and linearity. The comparison of gate capacitance for the TGN-devices and DGN-devices revealed that the gate capacitance of the tri-gate structure was not simply a linear superposition of the top planar gate capacitance and sidewall gate capacitance of the dual-gate structure, which could be attributed to the difference in the depletion region shape for tri-gate and dual-gate structures. Full article
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10 pages, 2063 KiB  
Article
Single-Particle Irradiation Effect and Anti-Irradiation Optimization of a JLTFET with Lightly Doped Source
by Haiwu Xie and Hongxia Liu
Micromachines 2023, 14(7), 1413; https://doi.org/10.3390/mi14071413 - 13 Jul 2023
Viewed by 753
Abstract
In this article, the particle irradiation effect of a lightly doped Gaussian source heterostructure junctionless tunnel field-effect transistor (DMG-GDS-HJLTFET) is discussed. In the irradiation phenomenon, heavy ion produces a series of electron-hole pairs along the incident track, and then the generated transient current [...] Read more.
In this article, the particle irradiation effect of a lightly doped Gaussian source heterostructure junctionless tunnel field-effect transistor (DMG-GDS-HJLTFET) is discussed. In the irradiation phenomenon, heavy ion produces a series of electron-hole pairs along the incident track, and then the generated transient current can overturn the logical state of the device when the number of electron-hole pairs is large enough. In the single-particle effect of DMG-GDS-HJLTFET, the carried energy is usually represented by linear energy transfer value (LET). In simulation, the effects of incident ion energy, incident angle, incident completion time, incident position and drain bias voltage on the single-particle effect of DMG-GDS-HJLTFET are investigated. On this basis, we optimize the auxiliary gate dielectric, tunneling gate length for reliability. Simulation results show HfO2 with a large dielectric constant should be selected as the auxiliary gate dielectric in the anti-irradiation design. Larger tunneling gate leads to larger peak transient drain current and smaller tunneling gate means larger pulse width; from the point of anti-irradiation, the tunneling gate length should be selected at about 10 nm. Full article
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10 pages, 3445 KiB  
Article
Argon and Oxygen Gas Flow Rate Dependency of Sputtering-Based Indium-Gallium-Zinc Oxide Thin-Film Transistors
by Youngmin Han, Dong Hyun Lee, Eou-Sik Cho, Sang Jik Kwon and Hocheon Yoo
Micromachines 2023, 14(7), 1394; https://doi.org/10.3390/mi14071394 - 08 Jul 2023
Cited by 5 | Viewed by 1621
Abstract
Oxygen vacancies are a major factor that controls the electrical characteristics of the amorphous indium-gallium-zinc oxide transistor (a-IGZO TFT). Oxygen vacancies are affected by the composition ratio of the a-IGZO target and the injected oxygen flow rate. In this study, we fabricated three [...] Read more.
Oxygen vacancies are a major factor that controls the electrical characteristics of the amorphous indium-gallium-zinc oxide transistor (a-IGZO TFT). Oxygen vacancies are affected by the composition ratio of the a-IGZO target and the injected oxygen flow rate. In this study, we fabricated three types of a-IGZO TFTs with different oxygen flow rates and then investigated changes in electrical characteristics. Atomic force microscopy (AFM) was performed to analyze the surface morphology of the a-IGZO films according to the oxygen gas rate. Furthermore, X-ray photoelectron spectroscopy (XPS) analysis was performed to confirm changes in oxygen vacancies of a-IGZO films. The optimized a-IGZO TFT has enhanced electrical characteristics such as carrier mobility (μ) of 12.3 cm2/V·s, on/off ratio of 1.25 × 1010 A/A, subthreshold swing (S.S.) of 3.7 V/dec, and turn-on voltage (Vto) of −3 V. As a result, the optimized a-IGZO TFT has improved electrical characteristics with oxygen vacancies having the highest conductivity. Full article
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11 pages, 3476 KiB  
Article
Photoluminescent Microbit Inscripion Inside Dielectric Crystals by Ultrashort Laser Pulses for Archival Applications
by Sergey Kudryashov, Pavel Danilov, Nikita Smirnov, Evgeny Kuzmin, Alexey Rupasov, Roman Khmelnitsky, George Krasin, Irina Mushkarina and Alexey Gorevoy
Micromachines 2023, 14(7), 1300; https://doi.org/10.3390/mi14071300 - 24 Jun 2023
Cited by 1 | Viewed by 827
Abstract
Inscription of embedded photoluminescent microbits inside micromechanically positioned bulk natural diamond, LiF and CaF2 crystals was performed in sub-filamentation (geometrical focusing) regime by 525 nm 0.2 ps laser pulses focused by 0.65 NA micro-objective as a function of pulse energy, exposure and [...] Read more.
Inscription of embedded photoluminescent microbits inside micromechanically positioned bulk natural diamond, LiF and CaF2 crystals was performed in sub-filamentation (geometrical focusing) regime by 525 nm 0.2 ps laser pulses focused by 0.65 NA micro-objective as a function of pulse energy, exposure and inter-layer separation. The resulting microbits were visualized by 3D-scanning confocal Raman/photoluminescence microscopy as conglomerates of photo-induced quasi-molecular color centers and tested regarding their spatial resolution and thermal stability via high-temperature annealing. Minimal lateral and longitudinal microbit separations, enabling their robust optical read-out through micromechanical positioning, were measured in the most promising crystalline material, LiF, as 1.5 and 13 microns, respectively, to be improved regarding information storage capacity by more elaborate focusing systems. These findings pave a way to novel optomechanical memory storage platforms, utilizing ultrashort-pulse laser inscription of photoluminescent microbits as carriers of archival memory. Full article
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15 pages, 7734 KiB  
Article
A FIN-LDMOS with Bulk Electron Accumulation Effect
by Weizhong Chen, Zubing Duan, Hongsheng Zhang, Zhengsheng Han and Zeheng Wang
Micromachines 2023, 14(6), 1225; https://doi.org/10.3390/mi14061225 - 10 Jun 2023
Cited by 1 | Viewed by 1244
Abstract
A thin Silicon-On-Insulator (SOI) LDMOS with ultralow Specific On-Resistance (Ron,sp) is proposed, and the physical mechanism is investigated by Sentaurus. It features a FIN gate and an extended superjunction trench gate to obtain a Bulk Electron Accumulation (BEA) effect. The [...] Read more.
A thin Silicon-On-Insulator (SOI) LDMOS with ultralow Specific On-Resistance (Ron,sp) is proposed, and the physical mechanism is investigated by Sentaurus. It features a FIN gate and an extended superjunction trench gate to obtain a Bulk Electron Accumulation (BEA) effect. The BEA consists of two p-regions and two integrated back-to-back diodes, then the gate potential VGS is extended through the whole p-region. Additionally, the gate oxide Woxide is inserted between the extended superjunction trench gate and N-drift. In the on-state, the 3D electron channel is produced at the P-well by the FIN gate, and the high-density electron accumulation layer formed in the drift region surface provides an extremely low-resistance current path, which dramatically decreases the Ron,sp and eases the dependence of Ron,sp on the drift doping concentration (Ndrift). In the off-state, the two p-regions and N-drift deplete from each other through the gate oxide Woxide like the conventional SJ. Meanwhile, the Extended Drain (ED) increases the interface charge and reduces the Ron,sp. The 3D simulation results show that the BV and Ron,sp are 314 V and 1.84 mΩ∙cm−2, respectively. Consequently, the FOM is high, reaching up to 53.49 MW/cm2, which breaks through the silicon limit of the RESURF. Full article
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11 pages, 7042 KiB  
Article
A False Trigger-Strengthened and Area-Saving Power-Rail Clamp Circuit with High ESD Performance
by Boyang Ma, Shupeng Chen, Shulong Wang, Lingli Qian, Zeen Han, Wei Huang, Xiaojun Fu and Hongxia Liu
Micromachines 2023, 14(6), 1172; https://doi.org/10.3390/mi14061172 - 31 May 2023
Cited by 1 | Viewed by 1057
Abstract
A power clamp circuit, which has good immunity to false trigger under fast power-on conditions with a 20 ns rising edge, is proposed in this paper. The proposed circuit has a separate detection component and an on-time control component which enable it to [...] Read more.
A power clamp circuit, which has good immunity to false trigger under fast power-on conditions with a 20 ns rising edge, is proposed in this paper. The proposed circuit has a separate detection component and an on-time control component which enable it to distinguish between electrostatic discharge (ESD) events and fast power-on events. As opposed to other on-time control techniques, instead of large resistors or capacitors, which can cause a large occupation of the layout area, we use a capacitive voltage-biased p-channel MOSFET in the on-time control part of the proposed circuit. The capacitive voltage-biased p-channel MOSFET is in the saturation region after the ESD event is detected, which can serve as a large equivalent resistance (~106 Ω) in the structure. The proposed power clamp circuit offers several advantages compared to the traditional circuit, such as having at least 70% area savings in the trigger circuit area (30% area savings in the whole circuit area), supporting a power supply ramp time as fast as 20 ns, dissipating the ESD energy more cleanly with little residual charge, and recovering faster from false triggers. The rail clamp circuit also offers robust performance in an industry-standard PVT (process, voltage, and temperature) space and has been verified by the simulation results. Showing good performance of human body model (HBM) endurance and high immunity to false trigger, the proposed power clamp circuit has great potential for application in ESD protection. Full article
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14 pages, 8252 KiB  
Article
Enhanced Operational Characteristics Attained by Applying HfO2 as Passivation in AlGaN/GaN High-Electron-Mobility Transistors: A Simulation Study
by Jun-Hyeok Choi, Woo-Seok Kang, Dohyung Kim, Ji-Hun Kim, Jun-Ho Lee, Kyeong-Yong Kim, Byoung-Gue Min, Dong Min Kang and Hyun-Seok Kim
Micromachines 2023, 14(6), 1101; https://doi.org/10.3390/mi14061101 - 23 May 2023
Cited by 2 | Viewed by 1334
Abstract
This study investigates the operating characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying HfO2 as the passivation layer. Before analyzing HEMTs with various passivation structures, modeling parameters were derived from the measured data of fabricated HEMT with Si3N4 passivation [...] Read more.
This study investigates the operating characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by applying HfO2 as the passivation layer. Before analyzing HEMTs with various passivation structures, modeling parameters were derived from the measured data of fabricated HEMT with Si3N4 passivation to ensure the reliability of the simulation. Subsequently, we proposed new structures by dividing the single Si3N4 passivation into a bilayer (first and second) and applying HfO2 to the bilayer and first passivation layer only. Ultimately, we analyzed and compared the operational characteristics of the HEMTs considering the basic Si3N4, only HfO2, and HfO2/Si3N4 (hybrid) as passivation layers. The breakdown voltage of the AlGaN/GaN HEMT having only HfO2 passivation was improved by up to 19%, compared to the basic Si3N4 passivation structure, but the frequency characteristics deteriorated. In order to compensate for the degraded RF characteristics, we modified the second Si3N4 passivation thickness of the hybrid passivation structure from 150 nm to 450 nm. We confirmed that the hybrid passivation structure with 350-nm-thick second Si3N4 passivation not only improves the breakdown voltage by 15% but also secures RF performance. Consequently, Johnson’s figure-of-merit, which is commonly used to judge RF performance, was improved by up to 5% compared to the basic Si3N4 passivation structure. Full article
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25 pages, 13471 KiB  
Article
Analysis of Noise-Detection Characteristics of Electric Field Coupling in Quartz Flexible Accelerometer
by Zhigang Zhang, Dongxue Zhao, Huiyong He, Lijun Tang and Qian He
Micromachines 2023, 14(3), 535; https://doi.org/10.3390/mi14030535 - 25 Feb 2023
Cited by 2 | Viewed by 1183
Abstract
The internal electric field coupling noise of a quartz flexible accelerometer (QFA) restricts the improvement of the measurement accuracy of the accelerometer. In this paper, the internal electric field coupling mechanism of a QFA is studied, an electric field coupling detection noise model [...] Read more.
The internal electric field coupling noise of a quartz flexible accelerometer (QFA) restricts the improvement of the measurement accuracy of the accelerometer. In this paper, the internal electric field coupling mechanism of a QFA is studied, an electric field coupling detection noise model of the accelerometer is established, the distributed capacitance among the components of the QFA is simulated, the structure of the detection noise transfer system of different carrier modulation differential capacitance detection circuits is analyzed, and the influence of each transfer chain on the detection noise is discussed. The simulation results of electric field coupling detection noise show that the average value of detection noise can reach 41.7 μg, which is close to the effective resolution of the QFA, 50 μg. This confirms that electric field coupling detection noise is a non-negligible factor affecting the measurement accuracy of the accelerometer. A method of adding a high-pass filter to the front of the phase-shifting circuit is presented to suppress the noise of electric field coupling detection. This method attenuates the average value of the detected noise by about 78 dB, and reduces the average value of the detected noise to less than 0.1 μg, which provides a new approach and direction for effectively breaking through the performance of the QFA. Full article
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12 pages, 6685 KiB  
Article
A Derating-Sensitive Tantalum Polymer Capacitor’s Failure Rate within a DC-DC eGaN-FET-Based PoL Converter Workbench Study
by Dan Butnicu
Micromachines 2023, 14(1), 221; https://doi.org/10.3390/mi14010221 - 15 Jan 2023
Cited by 2 | Viewed by 1423
Abstract
Many recent studies have revealed that PoL (Point of Load) converters’ output capacitors are a paramount component from a reliability point of view. To receive the maximum degree of reliability in many applications, designers are often advised to derate this capacitor—as such, a [...] Read more.
Many recent studies have revealed that PoL (Point of Load) converters’ output capacitors are a paramount component from a reliability point of view. To receive the maximum degree of reliability in many applications, designers are often advised to derate this capacitor—as such, a careful comprehending of it is required to determine the converter’s overall parameters. PoL converters are commonly found in many electronic systems. Their most important requirements are a stable output voltage with load current variation, good temperature stability, low output ripple voltage, and high efficiency and reliability. If the electronic system in question must be portable, a small footprint and volume are also important considerations—both of which have recently been well accomplished in eGaN transistor technologies. This paper provides details on how derating an output capacitor—specifically, a conductive tantalum polymer surface-mount chip, as this type of capacitor represented a step forward in miniaturization and reliability over previously existing wet electrolytic capacitors—used within a discrete eGaN-FET-based PoL buck converter determines the best performance and the highest MTBF. A setup based on an EPC eGaN FET transistor enclosed in a 9059/30 V evaluation board with a 12 V input voltage/1.2 V output voltage was tested in order to achieve the study’s main scope. Typical electrical performance and reliability data are often provided for customers by manufacturers through technical papers; this kind of public data is often selected to show the capacitors in a favorable light—still, they provide much useful information. In this paper, the capacitor derating process was presented to give a basic overview of the reliability performance characteristics of tantalum polymer capacitor when used within a DC–DC buck converter’s output filter. Performing calculations of the capacitor’s failure rate based on taking a thermal scan of the capacitor’s capsule surface temperature, the behavior of the PoL converter was evaluated. Full article
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Review

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18 pages, 15269 KiB  
Review
A Review on Micro-LED Display Integrating Metasurface Structures
by Zhaoyong Liu, Kailin Ren, Gaoyu Dai and Jianhua Zhang
Micromachines 2023, 14(7), 1354; https://doi.org/10.3390/mi14071354 - 30 Jun 2023
Cited by 4 | Viewed by 5659
Abstract
Micro-LED display technology has been considered a promising candidate for near-eye display applications owing to its superior performance, such as having high brightness, high resolution, and high contrast. However, the realization of polarized and high-efficiency light extraction from Micro-LED arrays is still a [...] Read more.
Micro-LED display technology has been considered a promising candidate for near-eye display applications owing to its superior performance, such as having high brightness, high resolution, and high contrast. However, the realization of polarized and high-efficiency light extraction from Micro-LED arrays is still a significant problem to be addressed. Recently, by exploiting the capability of metasurfaces in wavefront modulation, researchers have achieved many excellent results by integrating metasurface structures with Micro-LEDs, including improving the light extraction efficiency, controlling the emission angle to achieve directional emission, and obtaining polarized Micro-LEDs. In this paper, recent progressions on Micro-LEDs integrated with metasurface structures are reviewed in the above three aspects, and the similar applications of metasurface structures in organic LEDs, quantum dot LEDs, and perovskite LEDs are also summarized. Full article
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