Power Management of Energy-Autonomous Nodes and Systems

A special issue of Applied Sciences (ISSN 2076-3417). This special issue belongs to the section "Energy Science and Technology".

Deadline for manuscript submissions: closed (20 August 2023) | Viewed by 1399

Special Issue Editors


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Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), University of Catania, I-95125 Catania, Italy
Interests: electronic engineering; switched capacitor AC/DC–DC converters; energy harvesting; low-power CMOS design; microelectronics
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Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), University of Catania, I-95125 Catania, Italy
Interests: electronic engineering; microelectronics; electronic systems; analog integrated circuits; ultra-low-voltage integrated circuits; energy harvesting; low-power CMOS design

Special Issue Information

Dear Colleagues,

The Internet of Things (IoT) paradigm is having a pervasive impact on modern society. The ubiquitous character of IoT nodes implies that they must be energy autonomous and untethered. In this regard, power autonomy is achieved by harvesting energy from the environment using transducers, such as photovoltaic (PV) cells, thermoelectric generators (TEG), and vibration transducers. Nevertheless, due to the heavy dependence of their output signal from operating conditions, these transducers are often unsuitable to feed directly to the circuit where they are applied. Therefore, IoT nodes employ a power management integrated circuit (PMIC) to adapt the generated power and maximize conversion efficiency. The main components of a PMIC are power converters, clock generators, and control circuitry (amplifiers, filters, references etc.) that must also enable self-startup in critical conditions, i.e., low voltage and low power levels provided by external energy harvesters.

The aim of this Special Issue is to attract researchers in the area of electronic circuits to highlight recent advances in power managing architectures, techniques, and sub-block topologies for energy-autonomous nodes and systems.

Dr. Andrea Ballo
Prof. Dr. Alfio Dario Grasso
Guest Editors

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Keywords

  • low-voltage analog and digital design techniques
  • low-power low-voltage analog front-end (AFE) circuits
  • circuits for implantable and wearable devices
  • energy harvesting
  • circuits for the Internet of Things
  • switched capacitor converters
  • subthreshold analog and digital circuits
  • near threshold computing
  • bulk-driven amplifiers
  • inverter-based amplifiers
  • oscillators
  • filters
  • digitally assisted analog circuits
  • multistage amplifiers
  • voltage and current references

Published Papers (1 paper)

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Research

18 pages, 1061 KiB  
Article
A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow
by Riccardo Della Sala, Francesco Centurelli and Giuseppe Scotti
Appl. Sci. 2023, 13(9), 5517; https://doi.org/10.3390/app13095517 - 28 Apr 2023
Cited by 4 | Viewed by 1069
Abstract
In this paper, we propose a novel standard-cell-based OTA architecture based on an improved version of the differential to single-ended converter, previously proposed by the authors, on a novel standard-cell-based basic voltage amplifier block. Due to a replica-bias approach, the basic voltage amplifier [...] Read more.
In this paper, we propose a novel standard-cell-based OTA architecture based on an improved version of the differential to single-ended converter, previously proposed by the authors, on a novel standard-cell-based basic voltage amplifier block. Due to a replica-bias approach, the basic voltage amplifier exhibits a well-defined output static voltage to allow easy cascadability. Another feature of the basic voltage amplifier is to provide a low output impedance to allow dominant pole compensation at the output of the cascade of several stages. An ultra-low voltage (ULV) standard-cell-based OTA based on the proposed architecture and building blocks has been designed referring to the standard-cell library of a 130-nm CMOS process with a supply voltage of 0.3 V. The layout of the OTA has been implemented by following an automatic layout flow within a commercial tool for the place-and-route of digital circuits. Simulation results have shown a differential gain of 50 dB with a gain–bandwidth product of 10 MHz when driving a 150 pF load capacitance. Good robustness is achieved under PVT variations, in particular for voltage gain, offset voltage, and phase margin. State-of-the-art small signal figures of merit and limited area footprint are key characteristics of the proposed amplifier. Full article
(This article belongs to the Special Issue Power Management of Energy-Autonomous Nodes and Systems)
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