Recent Advances in Thin Film Electronic Devices and Circuits

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (31 January 2024) | Viewed by 8608

Special Issue Editor


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Guest Editor
Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai 200240, China
Interests: thin film electronic devices; active addressing technologies for flat panel displays (FPDs) and nonvolatile memories (NVMs)
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Special Issue Information

Dear Colleagues,

Thin film electronic devices and circuits have been attracting more and more attention because they can be used in many industry fields, such as flat panel displays, energy devices, sensors, memories, and so on. In addition, they may be integrated into conventional CMOS integrated circuits and systems. From a fabrication point of view, thin film electronic devices and circuits can be prepared on not only rigid (including glass, wafer, etc.) but also flexible substrates (including polymer, paper, etc.), which means they may be potentially used in some quickly advancing fields, such as the Internet of Things and medical electronics. This Special Issue aims to give an overview of the most recent advances in thin film electronic devices and circuits in the abovementioned fields. This Special Issue aims to provide selected contributions on advances in the physics, processing, design, characterization, and applications of novel thin film electronic devices and circuits.

Potential topics include but are not limited to:

  • Thin film transistors;
  • Thin film solar cells;
  • Thin film sensors;
  • Thin film memories;
  • Device physics about novel thin film electronic devices;
  • Process development of novel devices;
  • Characterization of novel thin films, devices, and circuits;
  • Design of novel thin film devices and circuits;
  • Pixel circuits for flat panel displays, sensors, and memories;
  • Active matrix addressing methods for displays, sensors, and memories;
  • Applications of thin film devices and circuits;
  • System on glass (SOG) technologies;
  • Integration of thin film devices and CMOS circuits.

Dr. Chengyuan Dong
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • thin film electronic devices
  • thin film transistors
  • thin film solar cells
  • thin film sensors
  • thin film memories
  • stability
  • flexibility
  • thin film circuits
  • pixel circuits
  • active matrix addressing
  • system on glass
  • CMOS technology

Related Special Issues

Published Papers (6 papers)

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Research

11 pages, 2792 KiB  
Article
Subthreshold Conduction of Disordered ZnO-Based Thin-Film Transistors
by Minho Yoon
Micromachines 2023, 14(8), 1596; https://doi.org/10.3390/mi14081596 - 13 Aug 2023
Viewed by 1049
Abstract
This study presents the disorderedness effects on the subthreshold characteristics of atomically deposited ZnO thin-film transistors (TFTs). Bottom-gate ZnO TFTs show n-type enhancement-mode transfer characteristics but a gate-voltage-dependent, degradable subthreshold swing. The charge-transport characteristics of the disordered semiconductor TFTs are severely affected by [...] Read more.
This study presents the disorderedness effects on the subthreshold characteristics of atomically deposited ZnO thin-film transistors (TFTs). Bottom-gate ZnO TFTs show n-type enhancement-mode transfer characteristics but a gate-voltage-dependent, degradable subthreshold swing. The charge-transport characteristics of the disordered semiconductor TFTs are severely affected by the localized trap states. Thus, we posit that the disorderedness factors, which are the interface trap capacitance and the diffusion coefficient of electrons, would result in the degradation. Considering the factors as gate-dependent power laws, we derive the subthreshold current–voltage relationship for disordered semiconductors. Notably, the gate-dependent disorderedness parameters are successfully deduced and consistent with those obtained by the gm/Ids method, which was for the FinFETs. In addition, temperature-dependent current–voltage analyses reveal that the gate-dependent interface traps limit the subthreshold conduction, leading to the diffusion current. Thus, we conclude that the disorderedness factors of the ZnO films lead to the indefinable subthreshold swing of the ZnO TFTs. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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14 pages, 9817 KiB  
Article
Implementation of Gate-All-Around Gate-Engineered Charge Plasma Nanowire FET-Based Common Source Amplifier
by Sarabdeep Singh, Leo Raj Solay, Sunny Anand, Naveen Kumar, Ravi Ranjan and Amandeep Singh
Micromachines 2023, 14(7), 1357; https://doi.org/10.3390/mi14071357 - 30 Jun 2023
Cited by 7 | Viewed by 1590
Abstract
This paper examines the performance of a Gate-Engineered Gate-All-Around Charge Plasma Nanowire Field Effect Transistor (GAA-DMG-GS-CP NW-FET) and the implementation of a common source (CS) amplifier circuit. The proposed GAA-DMG-GS-CP NW-FET incorporates dual-material gate (DMG) and gate stack (GS) as gate engineering techniques [...] Read more.
This paper examines the performance of a Gate-Engineered Gate-All-Around Charge Plasma Nanowire Field Effect Transistor (GAA-DMG-GS-CP NW-FET) and the implementation of a common source (CS) amplifier circuit. The proposed GAA-DMG-GS-CP NW-FET incorporates dual-material gate (DMG) and gate stack (GS) as gate engineering techniques and its analog/RF performance parameters are compared to those of the Gate-All-Around Single-Material Gate Charge Plasma Nanowire Field Effect Transistor (GAA-SMG-CP NW-FET) device. Both Gate-All-Around (GAA) devices are designed using the Silvaco TCAD tool. GAA structures have demonstrated good gate control because the gate holds the channel, which is an inherent advantage for both devices discussed herein. The charge plasma dopingless technique is used, in which the source and drain regions are formed using metal contacts and necessary work functions rather than doping. This dopingless technique eliminates the need for doping, reducing fluctuations caused by random dopants and lowering the device’s thermal budget. Gate engineering techniques such as DMG and GS significantly improved the current characteristics which played a crucial role in obtaining maximum gain for circuit designs. The lookup table (LUT) approach is used in the implementation of the CS amplifier circuit with the proposed device. The transient response of the circuit is analyzed with both the device structures where the gain achieved for the CS amplifier circuit using the proposed GAA-DMG-GS-CP NW-FET is 15.06 dB. The superior performance showcased by the proposed GAA-DMG-GS-CP NW-FET device with analog, RF and circuit analysis proves its strong candidature for future nanoscale and low-power applications. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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11 pages, 3622 KiB  
Article
Electrical Stability Modeling Based on Surface Potential for a-InGaZnO TFTs under Positive-Bias Stress and Light Illumination
by Xiaoming Huang, Wei Cao, Chenyang Huang, Chen Chen, Zheng Shi and Weizong Xu
Micromachines 2023, 14(4), 842; https://doi.org/10.3390/mi14040842 - 13 Apr 2023
Cited by 1 | Viewed by 1125
Abstract
In this work, an electrical stability model based on surface potential is presented for amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) under positive-gate-bias stress (PBS) and light stress. In this model, the sub-gap density of states (DOSs) are depicted by exponential band tails [...] Read more.
In this work, an electrical stability model based on surface potential is presented for amorphous In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) under positive-gate-bias stress (PBS) and light stress. In this model, the sub-gap density of states (DOSs) are depicted by exponential band tails and Gaussian deep states within the band gap of a-IGZO. Meanwhile, the surface potential solution is developed with the stretched exponential distribution relationship between the created defects and PBS time, and the Boltzmann distribution relationship between the generated traps and incident photon energy, respectively. The proposed model is verified using both the calculation results and experimental data of a-IGZO TFTs with various distribution of DOSs, and a consistent and accurate expression of the evolution of transfer curves is achieved under PBS and light illumination. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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18 pages, 4986 KiB  
Article
Paradigm Changing Integration Technology for the Production of Flexible Electronics by Transferring Structures, Dies and Electrical Components from Rigid to Flexible Substrates
by Franz Selbmann, Soumya Deep Paul, Maulik Satwara, Frank Roscher, Maik Wiemer, Harald Kuhn and Yvonne Joseph
Micromachines 2023, 14(2), 415; https://doi.org/10.3390/mi14020415 - 10 Feb 2023
Viewed by 1713
Abstract
Emerging trends like the Internet of Things require an increasing number of different sensors, actuators and electronic devices. To enable new applications, such as wearables and electronic skins, flexible sensor technologies are required. However, established technologies for the fabrication of sensors and actuators, [...] Read more.
Emerging trends like the Internet of Things require an increasing number of different sensors, actuators and electronic devices. To enable new applications, such as wearables and electronic skins, flexible sensor technologies are required. However, established technologies for the fabrication of sensors and actuators, as well as the related packaging, are based on rigid substrates, i.e., silicon wafer substrates and printed circuit boards (PCB). Moreover, most of the flexible substrates investigated until now are not compatible with the aforementioned fabrication technologies on wafers due to their lack of chemical inertness and handling issues. In this presented paper, we demonstrate a conceptually new approach to transfer structures, dies, and electronic components to a flexible substrate by lift-off. The structures to be transferred, including the related electrical contacts and packaging, are fabricated on a rigid carrier substrate, coated with the flexible substrate and finally lifted off from the carrier. The benefits of this approach are the combined advantages of using established semiconductor and microsystem fabrication technologies as well as packaging technologies, such as high precision and miniaturization, as well as a variety of available materials and processes together with those of flexible substrates, such as a geometry adaptivity, lightweight structures and low costs. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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8 pages, 4059 KiB  
Article
A Delay-Cell-Controlled VCO Design for Unipolar Single-Gate Enhancement-Mode TFT Technologies
by Bin Li, Siwei Wei, Mingjian Zhao, Rongsheng Chen, Zhaohui Wu and Yuming Xu
Micromachines 2023, 14(1), 32; https://doi.org/10.3390/mi14010032 - 23 Dec 2022
Viewed by 1251
Abstract
This work outperforms the previous literatures by proposing a delay-cell-controlled voltage control oscillator (VCO) design for common unipolar, single-gate, and enhancement-mode thin-film transistor (TFT) technologies. A design example with InZnO TFTs is simulated to verify the proposed design. The design example has a [...] Read more.
This work outperforms the previous literatures by proposing a delay-cell-controlled voltage control oscillator (VCO) design for common unipolar, single-gate, and enhancement-mode thin-film transistor (TFT) technologies. A design example with InZnO TFTs is simulated to verify the proposed design. The design example has a 500 μW power consumption, 0.7 mm2 area, 3.8 kHz–8 kHz output frequency range, 600 Hz/V tuning sensitivity, and 4% maximum linear error. This design may have the potential to be used for flexible, low cost, and moderate speed sensor readout interfaces. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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10 pages, 2041 KiB  
Article
Amorphous InGaZnO Thin-Film Transistors with Double-Stacked Channel Layers for Ultraviolet Light Detection
by Zenghui Fan, Ao Shen, Yong Xia and Chengyuan Dong
Micromachines 2022, 13(12), 2099; https://doi.org/10.3390/mi13122099 - 28 Nov 2022
Viewed by 1240
Abstract
Amorphous InGaZnO thin film transistors (a-IGZO TFTs) with double-stacked channel layers (DSCL) were quite fit for ultraviolet (UV) light detection, where the best DSCL was prepared by the depositions of oxygen-rich (OR) IGZO followed by the oxygen-deficient (OD) IGZO films. We investigated the [...] Read more.
Amorphous InGaZnO thin film transistors (a-IGZO TFTs) with double-stacked channel layers (DSCL) were quite fit for ultraviolet (UV) light detection, where the best DSCL was prepared by the depositions of oxygen-rich (OR) IGZO followed by the oxygen-deficient (OD) IGZO films. We investigated the influences of oxygen partial pressure (PO) for DSCL-TFTs on their sensing abilities by experiments as well as Technology Computer Aided Design (TCAD) simulations. With the increase in PO values for the DSCL depositions, the sensing parameters, including photogenerated current (Iphoto), sensitivity (S), responsivity (R), and detectivity (D*) of the corresponding TFTs, apparently degraded. Compared with PO variations for the OR-IGZO films, those for the OD-IGZO depositions more strongly influenced the sensing performances of the DSCL-TFT UV light detectors. The TCAD simulations showed that the variations of the electron concentrations (or oxygen vacancy (VO) density) with PO values under UV light illuminations might account for these experimental results. Finally, some design guidelines for DSCL-TFT UV light detectors were proposed, which might benefit the potential applications of these novel semiconductor devices. Full article
(This article belongs to the Special Issue Recent Advances in Thin Film Electronic Devices and Circuits)
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