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Advanced Semiconductor Materials and Devices 2021

A special issue of Materials (ISSN 1996-1944). This special issue belongs to the section "Electronic Materials".

Deadline for manuscript submissions: closed (10 August 2023) | Viewed by 13316

Special Issue Editor


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Guest Editor
Environmental Science and Engineering, Kochi University of Technology, Kami 782-8502, Japan
Interests: oxide semiconductors; thin-film transistor (TFT); flexible devices; flat-panel displays
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Advanced semiconductor thin films have gained significant attention for their use in various kinds of electric and optical devices. In this Special Issue, modern trends of advanced semiconductor thin films and devices, including electrical, optical, and structural properties of group IV, metal oxide, and dielectric materials and their device applications, are highlighted and discussed. These thin film materials are formed by various kinds of deposition methods, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), and laser and/or solid phase crystallization. Thin-film devices, including thin-film transistors (TFT), nonvolatile memory, sensors (e.g., fingerprint, bio-medical, pH, temperature sensors), imaging devices, and neuromorphic devices, have been produced by depositing different types of thin films, such as active semiconductors, dielectrics, and metals, over a non-conducting large area glass and/or flexible substrates. Advanced semiconductor thin films potentially have many significant advantages over conventional bulk semiconductors, such as lower processing temperature and environmentally friendly processes, for future robust and low-power-consumption electric and optical devices.

It is my pleasure to invite you to submit a manuscript for this Special Issue. Full papers, communications, and reviews are all welcome.

Prof. Dr. Mamoru Furuta
Guest Editor

Manuscript Submission Information

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Keywords

  • oxide semiconductors
  • group IV materials
  • thin films
  • low-temperature process
  • transistors
  • nonvolatile memory
  • sensors
  • flexible devices

Published Papers (5 papers)

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Research

12 pages, 2453 KiB  
Article
Carrier Trap Density Reduction at SiO2/4H-Silicon Carbide Interface with Annealing Processes in Phosphoryl Chloride and Nitride Oxide Atmospheres
by Ernest Brzozowski, Maciej Kaminski, Andrzej Taube, Oskar Sadowski, Krystian Krol and Marek Guziewicz
Materials 2023, 16(12), 4381; https://doi.org/10.3390/ma16124381 - 14 Jun 2023
Cited by 2 | Viewed by 1257
Abstract
The electrical and physical properties of the SiC/SiO2 interfaces are critical for the reliability and performance of SiC-based MOSFETs. Optimizing the oxidation and post-oxidation processes is the most promising method of improving oxide quality, channel mobility, and thus the series resistance of [...] Read more.
The electrical and physical properties of the SiC/SiO2 interfaces are critical for the reliability and performance of SiC-based MOSFETs. Optimizing the oxidation and post-oxidation processes is the most promising method of improving oxide quality, channel mobility, and thus the series resistance of the MOSFET. In this work, we analyze the effects of the POCl3 annealing and NO annealing processes on the electrical properties of metal–oxide–semiconductor (MOS) devices formed on 4H-SiC (0001). It is shown that combined annealing processes can result in both low interface trap density (Dit), which is crucial for oxide application in SiC power electronics, and high dielectric breakdown voltage comparable with those obtained via thermal oxidation in pure O2. Comparative results of non-annealed, NO-annealed, and POCl3-annealed oxide–semiconductor structures are shown. POCl3 annealing reduces the interface state density more effectively than the well-established NO annealing processes. The result of 2 × 1011 cm−2 for the interface trap density was attained for a sequence of the two-step annealing process in POCl3 and next in NO atmospheres. The obtained values Dit are comparable to the best results for the SiO2/4H-SiC structures recognized in the literature, while the dielectric critical field was measured at a level ≥9 MVcm−1 with low leakage currents at high fields. Dielectrics, which were developed in this study, have been used to fabricate the 4H-SiC MOSFET transistors successfully. Full article
(This article belongs to the Special Issue Advanced Semiconductor Materials and Devices 2021)
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12 pages, 3488 KiB  
Article
Radiative and Magnetically Stimulated Evolution of Nanostructured Complexes in Silicon Surface Layers
by Dmytro Slobodzyan, Markiyan Kushlyk, Roman Lys, Josyp Shykorjak, Andriy Luchechko, Marta Żyłka, Wojciech Żyłka, Yaroslav Shpotyuk and Bohdan Pavlyk
Materials 2022, 15(12), 4052; https://doi.org/10.3390/ma15124052 - 07 Jun 2022
Cited by 1 | Viewed by 1403
Abstract
The effect of a weak magnetic field (B = 0.17 T) and X-irradiation (D < 520 Gy) on the rearrangement of the defective structure of near-surface p-type silicon layers was studied. It was established that the effect of these external fields increases the [...] Read more.
The effect of a weak magnetic field (B = 0.17 T) and X-irradiation (D < 520 Gy) on the rearrangement of the defective structure of near-surface p-type silicon layers was studied. It was established that the effect of these external fields increases the positive accumulated charge in the region of spatial charge (RSC) and in the SiO2 dielectric layer. This can be caused by both defects in the near-surface layer of the semiconductor and impurities contained in the dielectric layer, which can generate charge carriers. It was found that the near-surface layers of the barrier structures contain only one deep level in the silicon band gap, with an activation energy of Ev + 0.38 eV. This energy level corresponds to a complex of silicon interstitial atoms SiI+SiI. When X-irradiated with a dose of 520 Gy, a new level with the energy of Ev + 0.45 eV was observed. This level corresponds to a point boron radiation defect in the interstitial site (BI). These two types of defect are effective in obtaining charge carriers, and cause deterioration of the rectifier properties of the silicon barrier structures. It was established that the silicon surface is quite active, and adsorbs organic atoms and molecules from the atmosphere, forming bonds. It was shown that the effect of a magnetic field causes the decay of adsorbed complexes at the Si–SiO2 interface. The released hydrogen is captured by acceptor levels and, as a result, the concentration of more complex Si–H3 complexes increases that of O3–Si–H. Full article
(This article belongs to the Special Issue Advanced Semiconductor Materials and Devices 2021)
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14 pages, 15600 KiB  
Article
Defect Passivation and Carrier Reduction Mechanisms in Hydrogen-Doped In-Ga-Zn-O (IGZO:H) Films upon Low-Temperature Annealing for Flexible Device Applications
by Rostislav Velichko, Yusaku Magari and Mamoru Furuta
Materials 2022, 15(1), 334; https://doi.org/10.3390/ma15010334 - 03 Jan 2022
Cited by 4 | Viewed by 3324
Abstract
Low-temperature activation of oxide semiconductor materials such as In-Ga-Zn-O (IGZO) is a key approach for their utilization in flexible devices. We previously reported that the activation temperature can be reduced to 150 °C by hydrogen-doped IGZO (IGZO:H), demonstrating a strong potential of this [...] Read more.
Low-temperature activation of oxide semiconductor materials such as In-Ga-Zn-O (IGZO) is a key approach for their utilization in flexible devices. We previously reported that the activation temperature can be reduced to 150 °C by hydrogen-doped IGZO (IGZO:H), demonstrating a strong potential of this approach. In this paper, we investigated the mechanism for reducing the activation temperature of the IGZO:H films. In situ Hall measurements revealed that oxygen diffusion from annealing ambient into the conventional Ar/O2-sputtered IGZO film was observed at >240 °C. Moreover, the temperature at which the oxygen diffusion starts into the film significantly decreased to 100 °C for the IGZO:H film deposited at hydrogen gas flow ratio (R[H2]) of 8%. Hard X-ray photoelectron spectroscopy indicated that the near Fermi level (EF) defects in the IGZO:H film after the 150 °C annealing decreased in comparison to that in the conventional IGZO film after 300 °C annealing. The oxygen diffusion into the film during annealing plays an important role for reducing oxygen vacancies and subgap states especially for near EF. X-ray reflectometry analysis revealed that the film density of the IGZO:H decreased with an increase in R[H2] which would be the possible cause for facilitating the O diffusion at low temperature. Full article
(This article belongs to the Special Issue Advanced Semiconductor Materials and Devices 2021)
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11 pages, 3588 KiB  
Article
Nondegenerate Polycrystalline Hydrogen-Doped Indium Oxide (InOx:H) Thin Films Formed by Low-Temperature Solid-Phase Crystallization for Thin Film Transistors
by Taiki Kataoka, Yusaku Magari, Hisao Makino and Mamoru Furuta
Materials 2022, 15(1), 187; https://doi.org/10.3390/ma15010187 - 27 Dec 2021
Cited by 3 | Viewed by 2694
Abstract
We successfully demonstrated a transition from a metallic InOx film into a nondegenerate semiconductor InOx:H film. A hydrogen-doped amorphous InOx:H (a-InOx:H) film, which was deposited by sputtering in Ar, O2, and H2 gases, [...] Read more.
We successfully demonstrated a transition from a metallic InOx film into a nondegenerate semiconductor InOx:H film. A hydrogen-doped amorphous InOx:H (a-InOx:H) film, which was deposited by sputtering in Ar, O2, and H2 gases, could be converted into a polycrystalline InOx:H (poly-InOx:H) film by low-temperature (250 °C) solid-phase crystallization (SPC). Hall mobility increased from 49.9 cm2V−1s−1 for an a-InOx:H film to 77.2 cm2V−1s−1 for a poly-InOx:H film. Furthermore, the carrier density of a poly-InOx:H film could be reduced by SPC in air to as low as 2.4 × 1017 cm−3, which was below the metal–insulator transition (MIT) threshold. The thin film transistor (TFT) with a metallic poly-InOx channel did not show any switching properties. In contrast, that with a 50 nm thick nondegenerate poly-InOx:H channel could be fully depleted by a gate electric field. For the InOx:H TFTs with a channel carrier density close to the MIT point, maximum and average field effect mobility (μFE) values of 125.7 and 84.7 cm2V−1s−1 were obtained, respectively. We believe that a nondegenerate poly-InOx:H film has great potential for boosting the μFE of oxide TFTs. Full article
(This article belongs to the Special Issue Advanced Semiconductor Materials and Devices 2021)
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10 pages, 5514 KiB  
Article
Extensive Analysis on the Effects of Post-Deposition Annealing for ALD-Deposited Al2O3 on an n-Type Silicon Substrate
by Atish Bhattacharjee and Tae-Woo Kim
Materials 2021, 14(12), 3328; https://doi.org/10.3390/ma14123328 - 16 Jun 2021
Cited by 1 | Viewed by 2288
Abstract
In this study, an investigation was performed on the properties of atomic-layer-deposited aluminum oxide (Al2O3) on an n-type silicon (n-Si) substrate based on the effect of post-deposition heat treatment, which was speckled according to ambient temperature and treatment applied [...] Read more.
In this study, an investigation was performed on the properties of atomic-layer-deposited aluminum oxide (Al2O3) on an n-type silicon (n-Si) substrate based on the effect of post-deposition heat treatment, which was speckled according to ambient temperature and treatment applied time. Based on these dealings, a series of distinctions for extracted capacitance and dielectric constant, hysteresis was performed on annealed and nonannealed samples. The interface and border trap responses, including stress behavior after an application of constant voltage for a specific time and surface morphology by X-ray diffraction (XRD) technique, were also analyzed between the two above-mentioned sample types. Based on observation, the annealed samples showed superior performance in every aspect compared with the nonannealed ones. Some unusual behaviors after high annealing temperature were found, and the explanation is the ion diffusion from oxide layer towards the semiconductor. Since a constant voltage stress was not widely used on the metal–oxide–semiconductor capacitor (MOSCAP), this analysis was determined to reveal a new dimension of post-deposition annealing condition for the Al/Al2O3/n-Si gate stack. Full article
(This article belongs to the Special Issue Advanced Semiconductor Materials and Devices 2021)
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