Recent Advances in Spintronics

A special issue of Journal of Low Power Electronics and Applications (ISSN 2079-9268).

Deadline for manuscript submissions: 31 July 2024 | Viewed by 2370

Special Issue Editors


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Guest Editor
Department of Physics, University of Arizona, Tucson, AZ 85721, USA
Interests: spintronics; magnetism; thinfilms; magnetic tunnel junctions

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Guest Editor
Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China
Interests: non-volatile memory; CMOS hybrid devices; integration & applications; spintronic device physics and integrated applications; neuromorphic computing devices and integration; high-performance edge computing chip and system
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Special Issue Information

Dear Colleagues,

Our society has benefited tremendously from the rapid development of information technology in the past 30 years. However, many side effects of such fast growth have been neglected until recently, one of which is the greatly increased energy consumption in computing. According to the 2021 USA Semiconductor Research Corporation decadal plan, computing energy has increased exponentially over the past decade, reaching almost 1019J in 2020.  A substantial part of the energy consumption is related to the increase in standby power consumption when the CMOS transistors are shrunk to a few nanometers. Therein lies the advantage of spintronics as one of the best solutions to this problem: the magnetization produced by the localized spins in nanomagnets is intrinsically nonvolatile. Thus, the standby power consumption can be eliminated completely in spintronic devices. In addition, the theoretical dynamic switching energy of a nanomagnet can also be lower than that of a CMOS transistor. Therefore, spintronics is posited to provide a unique approach to increase the energy efficiency of future generation of digital devices. This Special Issue calls for the contribution of researchers from all areas of spintronics. The topics of interest include, but are not limited to:

  • Magnetoresistive devices
  • Spin-transfer torques and spin-orbit torques
  • Magnon and spin waves
  • Ultrafast magnetization switching by optical or electrical excitations
  • Electrical (voltage or current) control of magnetic anisotropy and magnetization
  • Electrical (voltage or current) control of antiferromagnetism and ferrimagnetism
  • Domain walls and skyrmions in ferromagnets, antiferromagnets, and ferrimagnets
  • Fabrication of magnetic thinfilms and spintronics nanodevices
  • Study of magnetic thin films and new materials such as topological insulators and Weyl semimetals
  • Spin-dependent transport in organic or hybrid structures
  • Chiral-induced spin selectivity
  • Spin-orbitronic devices and integrated applications
  • Futuristic spin-orbit logic, magnonic, topotronic, and skyrmionic materials and devices
  • Spintronics towards emerging applications of in-memory computing and quantum probabilistic computing
  • Neuromorphic computing involving spin-based devices
  • Theory or modeling of spintronic devices and systems
  • Design, fabrication, and characterization of advanced spintronic devices, circuits, and systems

Dr. Weigang Wang
Prof. Dr. Guozhong Xing
Guest Editors

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Published Papers (1 paper)

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17 pages, 1008 KiB  
Article
Design and Assessment of Hybrid MTJ/CMOS Circuits for In-Memory-Computation
by Prashanth Barla, Hemalatha Shivarama, Ganesan Deepa and Ujjwal Ujjwal
J. Low Power Electron. Appl. 2024, 14(1), 3; https://doi.org/10.3390/jlpea14010003 - 06 Jan 2024
Viewed by 1782
Abstract
Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter of concern in these hybrid circuits. [...] Read more.
Hybrid magnetic tunnel junction/complementary metal oxide semiconductor (MTJ/CMOS) circuits based on in-memory-computation (IMC) architecture is considered as the next-generation candidate for the digital integrated circuits. However, the energy consumption during the MTJ write process is a matter of concern in these hybrid circuits. In this regard, we have developed a novel write circuit for the contemporary three-terminal perpendicular-MTJs that works on the voltage-gated spin orbit torque (VG+SOT) switching mechanism to store the information in hybrid circuits for IMC architecture. Investigation of the novel write circuit reveals a remarkable reduction in the total energy consumption (and energy delay product) of 92.59% (95.81) and 92.28% (42.03%) than the conventional spin transfer torque (STT) and spin-Hall effect assisted STT (SHE+STT) write circuits, respectively. Further, we have developed all the hybrid logic gates followed by nonvolatile full adders (NV-FAs) using VG+SOT, STT, and SHE+STT MTJs. Simulation results show that with the VG+SOT NOR-OR, NAND-AND, XNOR-XOR, and NV-FA circuits, the reduction in the total power dissipation is 5.35% (4.27%), 5.62% (3.2%), 3.51% (2.02%), and 4.46% (2.93%) compared to STT (SHE+STT) MTJs respectively. Full article
(This article belongs to the Special Issue Recent Advances in Spintronics)
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