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Micromachines
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Thin Film Transistors with Oxide Semiconductors
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Thin Film Transistors with Oxide Semiconductors

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (20 February 2021) | Viewed by 20166

Special Issue Editor

Prof. Dr. Hyuck-In Kwon

E-Mail Website
Guest Editor
School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06974, Korea
Interests: oxide TFTs; Si-based nanoelectronics; CMOS image sensor
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

In the last decade, oxide thin-film transistors (TFTs) including indium–gallium–zinc oxide (IGZO) TFTs have attracted considerable attention because of their advantages, such as a high field-effect mobility, a low off-current, and a small subthreshold swing. In addition, oxide TFTs are fabricated at low temperatures with a good uniformity over large areas. These excellent properties make oxide TFT a promising device for the backplane element of active-matrix liquid-crystal displays and active-matrix organic light-emitting diode displays. To date, progress in development research has been very rapid. In addition, improvements in our understanding of the peculiar properties of oxide semiconductors have provided much knowledge and information on oxide TFTs. However, to use the devices in more diverse applications, it is crucial to further improve the electrical performance and reliability of oxide TFTs. This Special Issue calls for innovative latest research results on oxide TFTs which can be helpful in expanding their application area.

Prof. Hyuck-In Kwon
Guest Editor

Manuscript Submission Information

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Keywords

  • high-mobility oxide TFTs
  • analysis of electrical/optical stability in oxide TFTs
  • new channel material for oxide TFTs
  • new device structure for oxide TFTs
  • new application area of oxide TFTs
  • oxide TFT-based electronic circuits

Related Special Issue

Published Papers (7 papers)

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Research

10 pages, 2314 KiB  
Article
Light Emitted Diode on Detecting Thin-Film Transistor through Line-Scan Photosensor
by Fu-Ming Tzu, Jung-Shun Chen and Shih-Hsien Hsu
Micromachines 2021, 12(4), 434; https://doi.org/10.3390/mi12040434 - 14 Apr 2021
Cited by 1 | Viewed by 1780
Abstract
This paper explores the effectiveness of the white, red, green, and blue light emitted diodes (LEDs) light sources to detect the third layer of the electrode pixel and the fourth layer of the via-hole passivation on thin-film transistors. The time-delay-integration charge-coupled device and [...] Read more.
This paper explores the effectiveness of the white, red, green, and blue light emitted diodes (LEDs) light sources to detect the third layer of the electrode pixel and the fourth layer of the via-hole passivation on thin-film transistors. The time-delay-integration charge-coupled device and a reflective spectrometer were implemented in this experiment. The optical conditions are the same, as each light source and the digital image’s binary method also recognize the sharpness and contrast in the task. Consequently, the white and the blue LED light sources can be candidates for the light source for the optical inspection, especially for monochromic blue LED’s outperformance among the light sources. The blue LED demonstrates the high spatial resolution and short wavelength’s greater energy to trigger the photosensor. Additionally, the metal material has shown a tremendous responsibility in the photosensor with 150 Dn/nj/cm2 over the sensibility. The mercury 198Hg-pencil discharge lamp emits the stable spectral wavelength to significantly calibrate the spectrometer’s measurement. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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9 pages, 1910 KiB  
Article
Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors
by Je-Hyuk Kim, Jun Tae Jang, Jong-Ho Bae, Sung-Jin Choi, Dong Myong Kim, Changwook Kim, Yoon Kim and Dae Hwan Kim
Micromachines 2021, 12(3), 327; https://doi.org/10.3390/mi12030327 - 19 Mar 2021
Cited by 12 | Viewed by 4223
Abstract
In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron [...] Read more.
In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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12 pages, 4399 KiB  
Article
Effectiveness of Electrical and Optical Detection at Pixel Circuit on Thin-Film Transistors
by Fu-Ming Tzu
Micromachines 2021, 12(2), 135; https://doi.org/10.3390/mi12020135 - 27 Jan 2021
Cited by 4 | Viewed by 2110
Abstract
The paper presents a typology of electrical open and short defects on thin-film transistors (TFT) using an electrical tester and automatic optical inspection (AOI). The experiment takes the glass 8.5th generation to detect the electrical characteristics engaged with time delay and integration (TDI) [...] Read more.
The paper presents a typology of electrical open and short defects on thin-film transistors (TFT) using an electrical tester and automatic optical inspection (AOI). The experiment takes the glass 8.5th generation to detect the electrical characteristics engaged with time delay and integration (TDI) charged-coupled-devices (CCDs), a fast line-scan, and a review CCD with five sets of magnification lenses for further inspection. An automatic data acquisition program (ADAP) controls the open/short (O/S) sensor, TDI-CCD, and motor device for machine vision and statistics of substrate defects simultaneously. Furthermore, the quartz mask installed on AOI verified its optical resolution; a TDI-CCD can grab an image of a moving object during transfers of the charge in synchronous scanning with the object that is significant. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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13 pages, 6072 KiB  
Article
Channel Shape Effects on Device Instability of Amorphous Indium–Gallium–Zinc Oxide Thin Film Transistors
by Seung Gi Seo, Seung Jae Yu, Seung Yeob Kim, Jinheon Jeong and Sung Hun Jin
Micromachines 2021, 12(1), 2; https://doi.org/10.3390/mi12010002 - 22 Dec 2020
Cited by 1 | Viewed by 3142
Abstract
Channel shape dependency on device instability for amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) is investigated by using various channel shape devices along with systematic electrical characterization including DC I-V characeristics and bias temperature stress tests. a-IGZO TFTs with various channel shapes [...] Read more.
Channel shape dependency on device instability for amorphous indium–gallium–zinc oxide (a-IGZO) thin film transistors (TFTs) is investigated by using various channel shape devices along with systematic electrical characterization including DC I-V characeristics and bias temperature stress tests. a-IGZO TFTs with various channel shapes such as zigzag, circular, and U-type channels are implemented and their vertical and lateral electric field stress (E-field) effects are systematically tested and analyzed by using an experimental and modeling study. Source and drain (S/D) electrode asymmetry and vertical E-field effects on device instability are neglibible, whereas the lateral E-field effects significantly affect device instability, particularly for zigzag channel shape, compared to circular and U-type TFTs. Moreover, charge trapping time (τ) for zigzag-type a-IGZO TFTs is extracted as 3.8 × 104, which is at least three-times smaller than those of other channel-type a-IGZO TFTs, hinting that local E-field enhancement can critically affect the device reliability. The Technology Computer Aided Design (TCAD) simulation results reveal the locally enhanced E-field at both corner region in the channel in a quantitative mode and its correlation with hemisphere radius (ρ) values. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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10 pages, 2413 KiB  
Article
Self-Aligned Top-Gate Metal-Oxide Thin-Film Transistors Using a Solution-Processed Polymer Gate Dielectric
by Seungbeom Choi, Seungho Song, Taegyu Kim, Jae Cheol Shin, Jeong-Wan Jo, Sung Kyu Park and Yong-Hoon Kim
Micromachines 2020, 11(12), 1035; https://doi.org/10.3390/mi11121035 - 25 Nov 2020
Cited by 3 | Viewed by 2917
Abstract
For high-speed and large-area active-matrix displays, metal-oxide thin-film transistors (TFTs) with high field-effect mobility, stability, and good uniformity are essential. Moreover, reducing the RC delay is also important to achieve high-speed operation, which is induced by the parasitic capacitance formed between the source/drain [...] Read more.
For high-speed and large-area active-matrix displays, metal-oxide thin-film transistors (TFTs) with high field-effect mobility, stability, and good uniformity are essential. Moreover, reducing the RC delay is also important to achieve high-speed operation, which is induced by the parasitic capacitance formed between the source/drain (S/D) and the gate electrodes. From this perspective, self-aligned top-gate oxide TFTs can provide advantages such as a low parasitic capacitance for high-speed displays due to minimized overlap between the S/D and the gate electrodes. Here, we demonstrate self-aligned top-gate oxide TFTs using a solution-processed indium-gallium-zinc-oxide (IGZO) channel and crosslinked poly(4-vinylphenol) (PVP) gate dielectric layers. By applying a selective Ar plasma treatment on the IGZO channel, low-resistance IGZO regions could be formed, having a sheet resistance value of ~20.6 kΩ/sq., which can act as the homojunction S/D contacts in the top-gate IGZO TFTs. The fabricated self-aligned top-gate IGZO TFTs exhibited a field-effect mobility of 3.93 cm2/Vs and on/off ratio of ~106, which are comparable to those fabricated using a bottom-gate structure. Furthermore, we also demonstrated self-aligned top-gate TFTs using electrospun indium-gallium-oxide (IGO) nanowires (NWs) as a channel layer. The IGO NW TFTs exhibited a field-effect mobility of 0.03 cm2/Vs and an on/off ratio of >105. The results demonstrate that the Ar plasma treatment for S/D contact formation and the solution-processed PVP gate dielectric can be implemented in realizing self-aligned top-gate oxide TFTs. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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12 pages, 3974 KiB  
Communication
Effects of Capping Layers with Different Metals on Electrical Performance and Stability of p-Channel SnO Thin-Film Transistors
by Min-Gyu Shin, Kang-Hwan Bae, Hwan-Seok Jeong, Dae-Hwan Kim, Hyun-Seok Cha and Hyuck-In Kwon
Micromachines 2020, 11(10), 917; https://doi.org/10.3390/mi11100917 - 30 Sep 2020
Cited by 7 | Viewed by 3141
Abstract
In this study, the effects of capping layers with different metals on the electrical performance and stability of p-channel SnO thin-film transistors (TFTs) were examined. Ni- or Pt-capped SnO TFTs exhibit a higher field-effect mobility (μFE), a lower subthreshold swing [...] Read more.
In this study, the effects of capping layers with different metals on the electrical performance and stability of p-channel SnO thin-film transistors (TFTs) were examined. Ni- or Pt-capped SnO TFTs exhibit a higher field-effect mobility (μFE), a lower subthreshold swing (SS), a positively shifted threshold voltage (VTH), and an improved negative-gate-bias-stress (NGBS) stability, as compared to pristine TFTs. In contrast, Al-capped SnO TFTs exhibit a lower μFE, higher SS, negatively shifted VTH, and degraded NGBS stability, as compared to pristine TFTs. No significant difference was observed between the electrical performance of the Cr-capped SnO TFT and that of the pristine SnO TFT. The obtained results were primarily explained based on the change in the back-channel potential of the SnO TFT that was caused by the difference in work functions between the SnO and various metals. This study shows that capping layers with different metals can be practically employed to modulate the electrical characteristics of p-channel SnO TFTs. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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10 pages, 2673 KiB  
Communication
Conduction Band Edge Energy Profile Probed by Hall Offset Voltage in InGaZnO Thin Films
by Hyo-Jun Joo, Dae-Hwan Kim, Hyun-Seok Cha and Sang-Hun Song
Micromachines 2020, 11(9), 822; https://doi.org/10.3390/mi11090822 - 30 Aug 2020
Cited by 1 | Viewed by 2247
Abstract
We measured and analyzed the Hall offset voltages in InGaZnO thin-film transistors. The Hall offset voltages were found to decrease monotonously as the electron densities increased. We attributed the magnitude of the offset voltage to the misalignment in the longitudinal distance between the [...] Read more.
We measured and analyzed the Hall offset voltages in InGaZnO thin-film transistors. The Hall offset voltages were found to decrease monotonously as the electron densities increased. We attributed the magnitude of the offset voltage to the misalignment in the longitudinal distance between the probing points and the electron density to Fermi energy of the two-dimensional electron system, which was verified by the coincidence of the Hall voltage with the perpendicular magnetic field in the tilted magnetic field. From these results, we deduced the combined conduction band edge energy profiles from the Hall offset voltages with the electron density variations for three samples with different threshold voltages. The extracted combined conduction band edge varied by a few tens of meV over a longitudinal distance of a few tenths of µm. This result is in good agreement with the value obtained from the analysis of percolation conduction. Full article
(This article belongs to the Special Issue Thin Film Transistors with Oxide Semiconductors)
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