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Micromachines
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Thin Film Transistors: Material, Structure and Application
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Thin Film Transistors: Material, Structure and Application

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (20 March 2022) | Viewed by 10287

Special Issue Editor

Prof. Dr. Hyuck-In Kwon

E-Mail Website
Guest Editor
School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06974, Korea
Interests: oxide TFTs; Si-based nanoelectronics; CMOS image sensor
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Since the first report on cadmium selenide thin-film transistors (TFTs) by Paul. K. Weimer in 1962, various semiconductor materials have been used for channel materials of TFTs such as amorphous silicon, polycrystalline silicon, organic semiconductors, and oxide semiconductors. To date, TFTs have been used for various applications such as active-matrix liquid crystal display, active-matrix organic light-emitting diode displays, X-ray detectors, chemical sensors, bio sensors, and memory devices. However, to use the TFTs in more diverse applications, it is crucial to further improve the electrical performance and stability of TFTs. This special issue calls for innovative latest research results on TFTs which can be helpful in expanding their application area.

Prof. Dr. Hyuck-In Kwon
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • new channel material for TFTs
  • new device structure for TFTs
  • new application area of TFTs
  • TFT-based electronic circuits, analysis of electrical/optical stability in TFTs with various channel materials

Related Special Issue

Published Papers (4 papers)

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Research

14 pages, 3166 KiB  
Article
Design of Functionally Stacked Channels of Oxide Thin-Film Transistors to Mimic Precise Ultralow-Light-Irradiated Synaptic Weight Modulation
by Ji Sook Yang, Sung Hyeon Jung, Dong Su Kim, Ji Hoon Choi, Hee Won Suh, Hak Hyeon Lee, Kun Woong Lee and Hyung Koun Cho
Micromachines 2022, 13(4), 526; https://doi.org/10.3390/mi13040526 - 26 Mar 2022
Cited by 1 | Viewed by 2345
Abstract
To utilize continuous ultralow intensity signals from oxide synaptic transistors as artificial synapses that mimic human visual perception, we propose strategic oxide channels that optimally utilize their advantageous functions by stacking two oxide semiconductors with different conductivities. The bottom amorphous indium–gallium–zinc oxide ( [...] Read more.
To utilize continuous ultralow intensity signals from oxide synaptic transistors as artificial synapses that mimic human visual perception, we propose strategic oxide channels that optimally utilize their advantageous functions by stacking two oxide semiconductors with different conductivities. The bottom amorphous indium–gallium–zinc oxide (a-IGZO) layer with a relatively low conductivity was designed for an extremely low initial postsynaptic current (PSCi) by achieving full depletion at a low negative gate voltage, and the stacked top amorphous indium–zinc oxide (a-IZO) layer improved the amplitude of the synaptic current and memory retention owing to the enhancement in the persistent photoconductivity characteristics. We demonstrated an excellent photonic synapse thin-film transistor (TFT) with a precise synaptic weight change even in the range of ultralow light intensity by adapting this stacking IGZO/IZO channel. The proposed device exhibited distinct ∆PSC values of 3.1 and 18.1 nA under ultralow ultraviolet light (350 nm, 50 ms) of 1.6 and 8.0 μW/cm2. In addition, while the lowest light input exhibited short-term plasticity characteristics similar to the “volatile-like” behavior of the human brain with a current recovery close to the initial value, the increase in light intensity caused long-term plasticity characteristics, thus achieving synaptic memory transition in the IGZO/IZO TFTs. Full article
(This article belongs to the Special Issue Thin Film Transistors: Material, Structure and Application)
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8 pages, 2376 KiB  
Article
New Low-Frame-Rate Compensating Pixel Circuit Based on Low-Temperature Poly-Si and Oxide TFTs for High-Pixel-Density Portable AMOLED Displays
by Ching-Lin Fan, Wei-Yu Lin and Chun-Yuan Chen
Micromachines 2021, 12(12), 1514; https://doi.org/10.3390/mi12121514 - 5 Dec 2021
Cited by 3 | Viewed by 2943
Abstract
A new low-frame-rate active-matrix organic light-emitting diode (AMOLED) pixel circuit with low-temperature poly-Si and oxide (LTPO) thin-film transistors (TFTs) for portable displays with high pixel density is reported. The proposed pixel circuit has the excellent ability to compensate for the threshold voltage variation [...] Read more.
A new low-frame-rate active-matrix organic light-emitting diode (AMOLED) pixel circuit with low-temperature poly-Si and oxide (LTPO) thin-film transistors (TFTs) for portable displays with high pixel density is reported. The proposed pixel circuit has the excellent ability to compensate for the threshold voltage variation of the driving TFT (ΔVTH_DTFT). By the results of simulation based on a fabricated LTPS TFT and a-IZTO TFT, we found that the error rates of the OLED current were all lower than 2.71% over the range of input data voltages when ΔVTH_DTFT = ±0.33 V, and a low frame rate of 1 Hz could be achieved with no flicker phenomenon. Moreover, with only one capacitor and two signal lines in the pixel circuit, a high pixel density and narrow bezel are expected to be realized. We revealed that the proposed 7T1C pixel circuit with low driving voltage and low frame rate is suitable for portable displays. Full article
(This article belongs to the Special Issue Thin Film Transistors: Material, Structure and Application)
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15 pages, 5499 KiB  
Article
Detection of Electrical Circuit in a Thin-Film-Transistor Liquid-Crystal Display Using a Hybrid Optoelectronic Apparatus: An Array Tester and Automatic Optical Inspection
by Fu-Ming Tzu, Jung-Shun Chen and Shih-Hsien Hsu
Micromachines 2021, 12(8), 964; https://doi.org/10.3390/mi12080964 - 15 Aug 2021
Cited by 3 | Viewed by 2215
Abstract
In this study, we developed a high-resolution, more accurate, non-destructive apparatus for refining the detection of electrode pixels in a thin-film-transistor liquid-crystal display (TFT-LCD). The hybrid optoelectronic apparatus simultaneously uses an array tester linked with the automatic optical inspection of panel defects. Unfortunately, [...] Read more.
In this study, we developed a high-resolution, more accurate, non-destructive apparatus for refining the detection of electrode pixels in a thin-film-transistor liquid-crystal display (TFT-LCD). The hybrid optoelectronic apparatus simultaneously uses an array tester linked with the automatic optical inspection of panel defects. Unfortunately, due to a tiny air gap in the electro-optical inspector, the situation repeatedly causes numerous scratches and damages to the modulator; therefore, developing alternative equipment is necessary. Typically, in TFT-LCDs, there are open, short, and cross short electrical defects. The experiment utilized a multiple-line scan with the time delay integration (TDI) of a charge-coupled device (CCD) to capture a sharp image, even under low light, various speeds, or extreme conditions. In addition, we explored the experimental efficacy of detecting the electrode pixel of the samples and evaluated the effectiveness of a 7-inch opaque quartz mask. The results show that an array tester and AOI can detect a TFT-LCD electrode pixel sufficiently; therefore, we recommend adopting the hybrid apparatus in the TFT-LCD industry. Full article
(This article belongs to the Special Issue Thin Film Transistors: Material, Structure and Application)
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9 pages, 3187 KiB  
Article
Fabrication and Characterization of Nanonet-Channel LTPS TFTs Using a Nanosphere-Assisted Patterning Technique
by Gilsang Yoon, Donghoon Kim, Iksoo Park, Bo Jin and Jeong-Soo Lee
Micromachines 2021, 12(7), 741; https://doi.org/10.3390/mi12070741 - 24 Jun 2021
Cited by 3 | Viewed by 1989
Abstract
We present the fabrication and electrical characteristics of nanonet-channel (NET) low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs) using a nanosphere-assisted patterning (NAP) technique. The NAP technique is introduced to form a nanonet-channel instead of the electron beam lithography (EBL) or conventional photolithography method. [...] Read more.
We present the fabrication and electrical characteristics of nanonet-channel (NET) low-temperature polysilicon channel (LTPS) thin-film transistors (TFTs) using a nanosphere-assisted patterning (NAP) technique. The NAP technique is introduced to form a nanonet-channel instead of the electron beam lithography (EBL) or conventional photolithography method. The size and space of the holes in the nanonet structure are well controlled by oxygen plasma treatment and a metal lift-off process. The nanonet-channel TFTs show improved electrical characteristics in terms of the ION/IOFF, threshold voltage, and subthreshold swing compared with conventional planar devices. The nanonet-channel devices also show a high immunity to hot-carrier injection and a lower variation of electrical characteristics. The standard deviation of VTH (σVTH) is reduced by 33% for a nanonet-channel device with a gate length of 3 μm, which is mainly attributed to the reduction of the grain boundary traps and enhanced gate controllability. These results suggest that the cost-effective NAP technique is promising for manufacturing high-performance nanonet-channel LTPS TFTs with lower electrical variations. Full article
(This article belongs to the Special Issue Thin Film Transistors: Material, Structure and Application)
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