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Micromachines
Special Issues
Spintronic Memory and Logic Devices
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Spintronic Memory and Logic Devices

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "A：Physics".

Deadline for manuscript submissions: closed (30 April 2023) | Viewed by 5462

Special Issue Editors

Dr. Can Onur Avci

E-Mail Website
Guest Editor
Institut de Ciència de Materials de Barcelona (ICMAB-CSIC), Campus de la UAB, 08193 Bellaterra, Spain
Interests: spintronics; magnetic thin films; spin transport; magnetoresistance; spin-orbit torques; interfacial chiral magnetism; electrical control of magnetization; magnetic memory and logic devices
Dr. Daniela Petti

E-Mail Website
Guest Editor
Politecnico di Milano, via Giuseppe Colombo, 81 20133 Milano, Italy
Interests: spintronics; spin textures; spin transport; magnetization dynamics; spin waves; spin-orbit torques; electrical control of magnetization; advanced magnetic nanofabrication
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The discovery of giant magnetoresistance in the late 1980s marked the beginning of spintronics, which has evolved into the broad and interdisciplinary field at the intersection of physics, materials science, nanotechnology it is today. Especially in the past decade, we have seen many breakthroughs in exploiting the spin degree of freedom of charge carriers in nanodevices for nonvolatile memory and logic operations. The improved understanding of solid-state transport phenomena has accelerated progress and led to the development of original device concepts for complementary metal-oxide-semiconductor (CMOS) and beyond-CMOS applications. The discovery of new physics, materials and functionalities, and advances in material synthesis and nanofabrication methods have synergistically contributed to a paradigm shift in the microelectronic industry and placed spintronics in a favorable position.

Fascinated by this immense progress, we are now looking forward to creating a unique collection of research papers, perspectives, and review articles that focus on “Spintronic Memory and Logic Devices”. We are happy to welcome submissions on theoretical and experimental works tackling materials, physics, and engineering aspects of spintronics with an orientation towards device applications.

We look forward to receiving your submission.

Dr. Can Onur Avci
Dr. Daniela Petti
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • electrically-driven magnetization control
  • spin-orbit torques
  • spin-transfer torques
  • magnetic tunnel junctions
  • spin valves
  • SOT and STT-based magnetic random-access memory
  • domain wall-based memory and logic devices
  • magnonic logic and signal transmission devices
  • skyrmionic devices
  • spin-based beyond-CMOS concepts (neuromorphic computing, in-memory computing, etc.)
  • novel spintronic materials (topological insulators, Weyl semimetals, 2D materials, etc.)
  • antiferromagnetic and ferrimagnetic spintronics

Published Papers (3 papers)

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Research

10 pages, 2108 KiB  
Article
Performance Degradation in Static Random Access Memory of 10 nm Node FinFET Owing to Displacement Defects
by Minji Bang, Jonghyeon Ha, Gyeongyeop Lee, Minki Suh and Jungsik Kim
Micromachines 2023, 14(5), 1090; https://doi.org/10.3390/mi14051090 - 22 May 2023
Viewed by 1105
Abstract
We comprehensively investigate displacement-defect-induced current and static noise margin variations in six-transistor (6T) static random access memory (SRAM) based on a 10 nm node fin field-effect transistor (FinFET) using technology computer-aided design (TCAD). Various defect cluster conditions and fin structures are considered as [...] Read more.
We comprehensively investigate displacement-defect-induced current and static noise margin variations in six-transistor (6T) static random access memory (SRAM) based on a 10 nm node fin field-effect transistor (FinFET) using technology computer-aided design (TCAD). Various defect cluster conditions and fin structures are considered as variables to estimate the worst-case scenario for displacement defects. The rectangular defect clusters capture more widely distributed charges at the fin top, reducing the on- and off-current. The read static noise margin (RSNM) is the most degraded in the pull-down transistor during the read operation. The increased fin width decreases the RSNM due to the gate field. The current per cross-sectional area increases when the fin height decreases, but the energy barrier lowering by the gate field is similar. Therefore, the reduced fin width and increased fin height structure suit the 10 nm node FinFET 6T SRAMs with high radiation hardness. Full article
(This article belongs to the Special Issue Spintronic Memory and Logic Devices)
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11 pages, 4621 KiB  
Article
High-Density 1R/1W Dual-Port Spin-Transfer Torque MRAM
by Yeongkyo Seo and Kon-Woo Kwon
Micromachines 2022, 13(12), 2224; https://doi.org/10.3390/mi13122224 - 15 Dec 2022
Cited by 1 | Viewed by 1389
Abstract
Spin-transfer torque magnetic random-access memory (STT-MRAM) has several desirable features, such as non-volatility, high integration density, and near-zero leakage power. However, it is challenging to adopt STT-MRAM in a wide range of memory applications owing to the long write latency and a tradeoff [...] Read more.
Spin-transfer torque magnetic random-access memory (STT-MRAM) has several desirable features, such as non-volatility, high integration density, and near-zero leakage power. However, it is challenging to adopt STT-MRAM in a wide range of memory applications owing to the long write latency and a tradeoff between read stability and write ability. To mitigate these issues, an STT-MRAM bit cell can be designed with two transistors to support multiple ports, as well as the independent optimization of read stability and write ability. The multi-port STT-MRAM, however, is achieved at the expense of a higher area requirement due to an additional transistor per cell. In this work, we propose an area-efficient design of 1R/1W dual-port STT-MRAM that shares a bitline between two adjacent bit cells. We identify that the bitline sharing may cause simultaneous access conflicts, which can be effectively alleviated by using the bit-interleaving architecture with a long interleaving distance and the sufficient number of word lines per memory bank. We report various metrics of the proposed design based on the bit cell design using a 45 nm process. Compared to a standard single-port STT-MRAM, the proposed design shows a 15% lower read power and a 19% higher read-disturb margin. Compared with prior work on the 1R/1W dual-port STT-MRAM, the proposed design improves the area by 25%. Full article
(This article belongs to the Special Issue Spintronic Memory and Logic Devices)
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8 pages, 1332 KiB  
Article
Manipulation of Magnetic Skyrmion Density in Continuous Ir/Co/Pt Multilayers
by M. Cubukcu, S. Pöllath, S. Tacchi, A. Stacey, E. Darwin, C. W. F. Freeman, C. Barton, B. J. Hickey, C. H. Marrows, G. Carlotti, C. H. Back and O. Kazakova
Micromachines 2022, 13(11), 1911; https://doi.org/10.3390/mi13111911 - 04 Nov 2022
Cited by 1 | Viewed by 1559
Abstract
We show that magnetic skyrmions can be stabilised at room temperature in continuous [Ir/Co/Pt]5 multilayers on SiO2/Si substrates without the prior application of electric current or magnetic field. While decreasing the Co thickness, a transition of the magnetic domain patterns [...] Read more.
We show that magnetic skyrmions can be stabilised at room temperature in continuous [Ir/Co/Pt]5 multilayers on SiO2/Si substrates without the prior application of electric current or magnetic field. While decreasing the Co thickness, a transition of the magnetic domain patterns from worm-like state to separated stripes is observed. The skyrmions are clearly imaged in both states using magnetic force microscopy. The density of skyrmions can be significantly enhanced after applying the “in-plane field procedure”. Our results provide means to manipulate magnetic skyrmion density, further allowing for the optimised engineering of skyrmion-based devices. Full article
(This article belongs to the Special Issue Spintronic Memory and Logic Devices)
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