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9 pages, 2245 KiB

Open AccessArticle

Simulation-Based Analysis of the Effect of Alpha Irradiation on GaN Particle Detectors

by Jianming Lei, Nan Wang, Rukai Jiang and Qianyu Hou

Micromachines 2023, 14(10), 1872; https://doi.org/10.3390/mi14101872 - 29 Sep 2023

Viewed by 740

Radiation-hardened semiconductor GaN has drawn considerable attention owing to its excellent properties such as large displacement energy. Many studies have focused on evaluating the degradation of GaN-based power device performance by proton beam or particle irradiation, while quantitative analysis of the energy transfer [...] Read more.

Radiation-hardened semiconductor GaN has drawn considerable attention owing to its excellent properties such as large displacement energy. Many studies have focused on evaluating the degradation of GaN-based power device performance by proton beam or particle irradiation, while quantitative analysis of the energy transfer process of particles inside the material and the mechanisms involved in inducing degradation of electrical properties are rare. Here, on the basis of the fabricated alpha-particle detector, a device model validated by basic electrical experiments is established to simulate the influence of alpha-particle irradiation on the leakage current of the device. We observe that the current does not change significantly with increasing radiation fluence at low bias, while it shows a descending trend with increasing radiation fluence at higher bias. However, increasing the energy of the radiation particles at the same radiation fluence directly leads to a monotonically elevated leakage current. Such a series of phenomena is associated with radiation-induced changes in the density of trapped states within the active layers of the device. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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15 pages, 8317 KiB

Open AccessArticle

Reliability Assessment of On-Wafer AlGaN/GaN HEMTs: The Impact of Electric Field Stress on the Mean Time to Failure

by Surajit Chakraborty and Tae-Woo Kim

Micromachines 2023, 14(10), 1833; https://doi.org/10.3390/mi14101833 - 26 Sep 2023

Viewed by 1417

Abstract

We present the mean time to failure (MTTF) of on-wafer AlGaN/GaN HEMTs under two distinct electric field stress conditions. The channel temperature (T_ch) of the devices exhibits variability contingent upon the stress voltage and power dissipation, thereby influencing the long-term [...] Read more.

We present the mean time to failure (MTTF) of on-wafer AlGaN/GaN HEMTs under two distinct electric field stress conditions. The channel temperature (T_ch) of the devices exhibits variability contingent upon the stress voltage and power dissipation, thereby influencing the long-term reliability of the devices. The accuracy of the channel temperature assumes a pivotal role in MTTF determination, a parameter measured and simulated through TCAD Silvaco device simulation. Under low electric field stress, a gradual degradation of I_DSS is noted, accompanied by a negative shift in threshold voltage (ΔV_T) and a substantial increase in gate leakage current (I_G). Conversely, the high electric field stress condition induces a sudden decrease in I_DSS without any observed shift in threshold voltage. For the low and high electric field conditions, MTTF values of 360 h and 160 h, respectively, were determined for on-wafer AlGaN/GaN HEMTs. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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17 pages, 3760 KiB

Open AccessArticle

An Analytical Model of Dynamic Power Losses in eGaN HEMT Power Devices

by Jianming Lei, Yangyi Liu, Zhanmin Yang, Yalin Chen, Dunjun Chen, Liang Xu and Jing Yu

Micromachines 2023, 14(8), 1633; https://doi.org/10.3390/mi14081633 - 18 Aug 2023

Viewed by 933

Abstract

In this work, we present an analytical model of dynamic power losses for enhancement-mode AlGaN/GaN high-electron-mobility transistor power devices (eGaN HEMTs). To build this new model, the dynamic on-resistance (R_dson) is first accurately extracted via our extraction circuit based on [...] Read more.

In this work, we present an analytical model of dynamic power losses for enhancement-mode AlGaN/GaN high-electron-mobility transistor power devices (eGaN HEMTs). To build this new model, the dynamic on-resistance (R_dson) is first accurately extracted via our extraction circuit based on a double-diode isolation (DDI) method using a high operating frequency of up to 1 MHz and a large drain voltage of up to 600 V; thus, the unique problem of an increase in the dynamic R_dson is presented. Then, the impact of the current operation mode on the on/off transition time is evaluated via a dual-pulse-current-mode test (DPCT), including a discontinuous conduction mode (DCM) and a continuous conduction mode (CCM); thus, the transition time is revised for different current modes. Afterward, the discrepancy between the drain current and the real channel current is qualitative investigated using an external shunt capacitance (ESC) method; thus, the losses due to device parasitic capacitance are also taken into account. After these improvements, the dynamic model will be more compatible for eGaN HEMTs. Finally, the dynamic power losses calculated via this model are found to be in good agreement with the experimental results. Based on this model, we propose a superior solution with a quasi-resonant mode (QRM) to achieve lossless switching and accelerated switching speeds. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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10 pages, 4379 KiB

Open AccessArticle

Improvement of Dynamic On-Resistance in GaN-Based Devices with a High-Quality In Situ SiN Passivation Layer

by Jeong-Gil Kim, Jun-Hyeok Lee, Dong-Min Kang and Jung-Hee Lee

Micromachines 2023, 14(6), 1227; https://doi.org/10.3390/mi14061227 - 10 Jun 2023

Cited by 1 | Viewed by 1350

Abstract

In this paper, we compared the characteristics of normally-on/off AlGaN/GaN MISHEMTs passivated by an in situ/ex situ SiN layer. The devices passivated by the in situ SiN layer revealed enhanced DC characteristics, such as the drain current of 595 mA/mm (normally-on) and 175 [...] Read more.

In this paper, we compared the characteristics of normally-on/off AlGaN/GaN MISHEMTs passivated by an in situ/ex situ SiN layer. The devices passivated by the in situ SiN layer revealed enhanced DC characteristics, such as the drain current of 595 mA/mm (normally-on) and 175 mA/mm (normally-off) with the high on/off current ratio of ~10⁷, respectively, compared with those of the devices passivated by the ex situ SiN layer. The MISHEMTs passivated by the in situ SiN layer also exhibited a much lower increase of dynamic on-resistance (R_ON) of 4.1% for the normally-on device and 12.8% for the normally-off device, respectively. Furthermore, the breakdown characteristics are greatly improved by employing the in situ SiN passivation layer, suggesting that the in situ SiN passivation layer can remarkably not only suppress the surface-trapping effects, but also decrease the off-state leakage current in the GaN-based power devices. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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9 pages, 3185 KiB

Open AccessArticle

Analysis of Trapping Effect on Large-Signal Characteristics of GaN HEMTs Using X-Parameters and UV Illumination

by Kun-Ming Chen, Chuang-Ju Lin, Chia-Wei Chuang, Hsuan-Cheng Pai, Edward-Yi Chang and Guo-Wei Huang

Micromachines 2023, 14(5), 1011; https://doi.org/10.3390/mi14051011 - 8 May 2023

Viewed by 1639

Abstract

GaN high-electron-mobility transistors (HEMTs) have attracted widespread attention for high-power microwave applications, owing to their superior properties. However, the charge trapping effect has limitations to its performance. To study the trapping effect on the device large-signal behavior, AlGaN/GaN HEMTs and metal-insulator-semiconductor HEMTs (MIS-HEMTs) [...] Read more.

GaN high-electron-mobility transistors (HEMTs) have attracted widespread attention for high-power microwave applications, owing to their superior properties. However, the charge trapping effect has limitations to its performance. To study the trapping effect on the device large-signal behavior, AlGaN/GaN HEMTs and metal-insulator-semiconductor HEMTs (MIS-HEMTs) were characterized through X-parameter measurements under ultraviolet (UV) illumination. For HEMTs without passivation, the magnitude of the large-signal output wave (

X_{21}^{FB}

) and small-signal forward gain (

X_{2111}^{S}

) at fundamental frequency increased, whereas the large-signal second harmonic output wave (

X_{22}^{FB}

) decreased when the device was exposed to UV light, resulting from the photoconductive effect and suppression of buffer-related trapping. For MIS-HEMTs with SiN passivation, much higher

X_{21}^{FB}

and

X_{2111}^{S}

have been obtained compared with HEMTs. It suggests that better RF power performance can be achieved by removing the surface state. Moreover, the X-parameters of the MIS-HEMT are less dependent on UV light, since the light-induced performance enhancement is offset by excess traps in the SiN layer excited by UV light. The radio frequency (RF) power parameters and signal waveforms were further obtained based on the X-parameter model. The variation of RF current gain and distortion with light was consistent with the measurement results of X-parameters. Therefore, the trap number in the AlGaN surface, GaN buffer, and SiN layer must be minimized for a good large-signal performance of AlGaN/GaN transistors. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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10 pages, 2346 KiB

Open AccessArticle

Investigation of the Gate Degradation Induced by Forward Gate Voltage Stress in p-GaN Gate High Electron Mobility Transistors

by Myeongsu Chae and Hyungtak Kim

Micromachines 2023, 14(5), 977; https://doi.org/10.3390/mi14050977 - 29 Apr 2023

Cited by 1 | Viewed by 1505

Abstract

In this work, we investigated the degradation of the p-GaN gate stack induced by the forward gate voltage stress in normally off AlGaN/GaN high electron mobility transistors (HEMTs) with Schottky-type p-GaN gate. The gate stack degradations of p-GaN gate HEMTs were investigated by [...] Read more.

In this work, we investigated the degradation of the p-GaN gate stack induced by the forward gate voltage stress in normally off AlGaN/GaN high electron mobility transistors (HEMTs) with Schottky-type p-GaN gate. The gate stack degradations of p-GaN gate HEMTs were investigated by performing the gate step voltage stress and the gate constant voltage stress measurements. In the gate step voltage stress test, the positive and negative shifts of threshold voltage (V_TH) depended on the range of the gate stress voltage (V_G.stress) at room temperature. However, the positive shift of V_TH in the small gate stress voltage was not observed at 75 and 100 °C and the negative shift of V_TH was started from a lower gate voltage at a high temperature compared to room temperature. In the gate constant voltage stress test, the gate leakage current increased with three steps in the off-state current characteristics as the degradation progressed. To investigate the detailed breakdown mechanism, we measured the two terminal currents (I_GD and I_GS) before and after the stress test. The difference between the gate–source current and the gate–drain current in the reverse gate bias indicated that the increase of the leakage current was attributed to the degradation between the gate and the source while the drain side was not affected. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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9 pages, 2563 KiB

Open AccessArticle

Improving the High-Temperature Gate Bias Instabilities by a Low Thermal Budget Gate-First Process in p-GaN Gate HEMTs

by Catherine Langpoklakpam, An-Chen Liu, Neng-Jie You, Ming-Hsuan Kao, Wen-Hsien Huang, Chang-Hong Shen, Jerry Tzou, Hao-Chung Kuo and Jia-Min Shieh

Micromachines 2023, 14(3), 576; https://doi.org/10.3390/mi14030576 - 28 Feb 2023

Viewed by 1878

Abstract

In this study, we report a low ohmic contact resistance process on a 650 V E-mode p-GaN gate HEMT structure. An amorphous silicon (a-Si) assisted layer was inserted in between the ohmic contact and GaN. The fabricated device exhibits a lower contact resistance [...] Read more.

In this study, we report a low ohmic contact resistance process on a 650 V E-mode p-GaN gate HEMT structure. An amorphous silicon (a-Si) assisted layer was inserted in between the ohmic contact and GaN. The fabricated device exhibits a lower contact resistance of about 0.6 Ω-mm after annealing at 550 °C. In addition, the threshold voltage shifting of the device was reduced from −0.85 V to −0.74 V after applying a high gate bias stress at 150 °C for 10⁻² s. The measured time to failure (TTF) of the device shows that a low thermal budget process can improve the device’s reliability. A 100-fold improvement in HTGB TTF was clearly demonstrated. The study shows a viable method for CMOS-compatible GaN power device fabrication. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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7 pages, 7369 KiB

Open AccessCommunication

Study on the Effects of Quantum Well Location on Optical Characteristics of AlGaN/GaN Light-Emitting HEMT

by Yao-Luen Shen, Chih-Yao Chang, Po-Liang Chen, Cheng-Chan Tai, Tian-Li Wu, Yuh-Renn Wu and Chih-Fang Huang

Micromachines 2023, 14(2), 423; https://doi.org/10.3390/mi14020423 - 10 Feb 2023

Viewed by 1168

Abstract

In this study, AlGaN/GaN light-emitting HEMTs (LE-HEMT) with a single quantum well inserted in different locations in the epitaxy layers are fabricated and analyzed. For both structures, light-emitting originated from electrons in the 2DEG and holes from the p-GaN for radiative recombination is [...] Read more.

In this study, AlGaN/GaN light-emitting HEMTs (LE-HEMT) with a single quantum well inserted in different locations in the epitaxy layers are fabricated and analyzed. For both structures, light-emitting originated from electrons in the 2DEG and holes from the p-GaN for radiative recombination is located in the quantum well. To investigate the importance of the location of single quantum well, optical characteristics are compared by simulation and experimental results. The experimental results show that the main light-emitting wavelength is shifted from 365 nm in the UV range to 525 nm in the visible range when the radiative recombination is confined in the quantum well and dominates among other mechanisms. Epi B, which has a quantum well above the AlGaN barrier layer in contrast to Epi A which has a quantum well underneath the barrier, shows better intensity and uniformity in light-emitting. According to the simulation results showing the radiative distribution and electron concentrations for both structures, the lower quantum efficiency is due to the diverse current paths in Epi A. On the other hand, Epi B shows better quantum confinement and therefore better luminescence in the same bias condition, which is consistent with experimental observations. These findings are critical for advancing the performance of LE-HEMTs. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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10 pages, 2241 KiB

Open AccessArticle

Modeling the Effects of Threading Dislocations on Current in AlGaN/GaN HEMT

by Censong Liu, Jie Wang, Zhanfei Chen, Jun Liu and Jiangtao Su

Micromachines 2023, 14(2), 305; https://doi.org/10.3390/mi14020305 - 24 Jan 2023

Viewed by 1293

Abstract

The aim of this paper is to model the effects of threading dislocations on both gate and drain currents of AlGaN/GaN high electron mobility transistors (HEMTs). The fraction of filled traps increases with the threading dislocations, while the trapping effects cause a decrease [...] Read more.

The aim of this paper is to model the effects of threading dislocations on both gate and drain currents of AlGaN/GaN high electron mobility transistors (HEMTs). The fraction of filled traps increases with the threading dislocations, while the trapping effects cause a decrease in drain current and an increase in gate leakage current. To model the drain current drop, the two simplified RC subcircuits with diodes are proposed to capture the charge trapping/detrapping characteristics. The trap voltages V_{g_trap} and V_{d_trap} generated by RC networks are fed back into the model to capture the effects of traps on drain current. Considering acceptor-decorated dislocations, we present a novel Poole–Frenkel (PF) model to precisely describe the reverse leakage gate current, which plays a dominant role in the gate leakage current. The proposed model, which uses physical parameters only, is implemented in Verilog-A. It is in excellent agreement with the experimental data. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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10 pages, 2447 KiB

Open AccessArticle

GaN JBS Diode Device Performance Prediction Method Based on Neural Network

by Hao Ma, Xiaoling Duan, Shulong Wang, Shijie Liu, Jincheng Zhang and Yue Hao

Micromachines 2023, 14(1), 188; https://doi.org/10.3390/mi14010188 - 12 Jan 2023

Cited by 3 | Viewed by 1564

Abstract

GaN JBS diodes exhibit excellent performance in power electronics. However, device performance is affected by multiple parameters of the P+ region, and the traditional TCAD simulation method is complex and time-consuming. In this study, we used a neural network machine learning method to [...] Read more.

GaN JBS diodes exhibit excellent performance in power electronics. However, device performance is affected by multiple parameters of the P+ region, and the traditional TCAD simulation method is complex and time-consuming. In this study, we used a neural network machine learning method to predict the performance of a GaN JBS diode. First, 3018 groups of sample data composed of device structure and performance parameters were obtained using TCAD tools. The data were then input into the established neural network for training, which could quickly predict the device performance. The final prediction results show that the mean relative errors of the on-state resistance and reverse breakdown voltage are 0.048 and 0.028, respectively. The predicted value has an excellent fitting effect. This method can quickly design GaN JBS diodes with target performance and accelerate research on GaN JBS diode performance prediction. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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10 pages, 4311 KiB

Open AccessArticle

Buffer Traps Effect on GaN-on-Si High-Electron-Mobility Transistor at Different Substrate Voltages

by Yuan Lin, Min-Lu Kao, You-Chen Weng, Chang-Fu Dee, Shih-Chen Chen, Hao-Chung Kuo, Chun-Hsiung Lin and Edward-Yi Chang

Micromachines 2022, 13(12), 2140; https://doi.org/10.3390/mi13122140 - 3 Dec 2022

Cited by 1 | Viewed by 2378

Abstract

Substrate voltage (V_SUB) effects on GaN-on-Si high electron mobility transistors (HEMTs) power application performance with superlattice transition layer structure was investigated. The 2DEG conductivity and buffer stack charge redistribution can be affected by neutral/ionized donor and acceptor traps. As the donor/acceptor [...] Read more.

Substrate voltage (V_SUB) effects on GaN-on-Si high electron mobility transistors (HEMTs) power application performance with superlattice transition layer structure was investigated. The 2DEG conductivity and buffer stack charge redistribution can be affected by neutral/ionized donor and acceptor traps. As the donor/acceptor traps are excessively ionized or de-ionized by applying V_SUB, the depletion region between the unintentionally doped (UID)/Carbon-doped (C-doped) GaN layer may exhibit a behavior similar to the p–n junction. An applied negative V_SUB increases the concentration of both the ionized donor and acceptor traps, which increases the breakdown voltage (BV) by alleviating the non-uniform distribution of the vertical electric field. On the other hand, an applied positive V_SUB causes the energy band bending flattener to refill the ionized traps and slightly improves the dynamic R_on degradation. Moreover, the amount of electrons injected into the buffer stack layer from the front side (2DEG channel/Ohmic contact) and the back side (AlN nucleation layer/superlattice transition layer) are asymmetric. Therefore, different V_SUB can affect the conductivity of 2DEG through the field effect, buffer trapping effect, and charge redistribution, which can change the electrical performance of the device. Full article

(This article belongs to the Special Issue GaN-Based Semiconductor Devices, Volume II)

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