Advanced Technologies in Memristor Devices

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "E:Engineering and Technology".

Deadline for manuscript submissions: closed (31 August 2023) | Viewed by 3481

Special Issue Editors


E-Mail Website
Guest Editor
School of Computer Science, Engineering and Applications, D.Y. Patil International University in Pune, Pune 411044, India
Interests: memristor; neuromorphic computing; nanodevices

E-Mail Website
Guest Editor
Department of Nanoscience and Engineering, Centre for Nano Manufacturing, Inje University, Gimhae 50834, Republic of Korea
Interests: medical image processing; computer vision; integrated circuits; computational sensors; neuromorphic applications

E-Mail Website
Guest Editor
Department of Electronics and Communication Engineering, SRM Institute of Science and Technology, Kattankulathur 603203, India
Interests: biomedical devices; microwave/mm-wave antennas; rectenna; RF sensors; wearable/flexible electronics

Special Issue Information

Dear Colleagues,

In the present era, advanced materials are taking a breakthrough in different sectors, such as health, electrical, computing, flexible electronics, automobiles, energy, and so on. A novel class of electrical circuits known as memristors has the potential to bring an end to the silicon age and fundamentally alter electronics. Memristors anticipate a new wave of innovation in electronics that will enable the packaging of even more bits into smaller spaces. Memristors could potentially bring some type of analogue information processing back into the computing world while supplementing transistors rather than completely replacing them in computer memories and logic circuits. It has demonstrated its efficacy in a variety of domains, including creating circuits, metal oxide computing computer process, crossbar arrays, phase change devices, neuromorphic computing, etc.

The special issue on memristors will open a new avenue in the field of low power electronics. It will be useful for the up-and-coming, dynamic researcher to publish their findings/research.

Prof. Dr. Shubhro Chakrabartty
Dr. Sachin Kumar
Dr. Alaaddin Al-Shidaifat
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • neuromorphic computing
  • crossbar array
  • synapses
  • low power devices
  • neural spikes
  • nanowires
  • nanocomposites
  • artificial neuron
  • deep learning 

Published Papers (3 papers)

Order results
Result details
Select all
Export citation of selected articles as:

Research

25 pages, 15235 KiB  
Article
A Robust Memristor-Enhanced Polynomial Hyper-Chaotic Map and Its Multi-Channel Image Encryption Application
by Kun Qian, Yang Xiao, Yinjie Wei, Di Liu, Quanwen Wang and Wei Feng
Micromachines 2023, 14(11), 2090; https://doi.org/10.3390/mi14112090 - 12 Nov 2023
Cited by 3 | Viewed by 795
Abstract
Nowadays, the utilization of memristors to enhance the dynamical properties of chaotic systems has become a popular research topic. In this paper, we present the design of a novel 2D memristor-enhanced polynomial hyper-chaotic map (2D-MPHM) by utilizing the cross-coupling of two TiO2 [...] Read more.
Nowadays, the utilization of memristors to enhance the dynamical properties of chaotic systems has become a popular research topic. In this paper, we present the design of a novel 2D memristor-enhanced polynomial hyper-chaotic map (2D-MPHM) by utilizing the cross-coupling of two TiO2 memristors. The dynamical properties of the 2D-MPHM were investigated using Lyapunov exponents, bifurcation diagrams, and trajectory diagrams. Additionally, Kolmogorov entropy and sample entropy were also employed to evaluate the complexity of the 2D-MPHM. Numerical analysis has demonstrated the superiority of the 2D-MPHM. Subsequently, the proposed 2D-MPHM was applied to a multi-channel image encryption algorithm (MIEA-MPHM) whose excellent security was demonstrated by key space, key sensitivity, plaintext sensitivity, information entropy, pixel distribution, correlation analysis, and robustness analysis. Finally, the encryption efficiency of the MIEA-MPHM was evaluated via numerous encryption efficiency tests. These tests demonstrate that the MIEA-MPHM not only possesses excellent security but also offers significant efficiency advantages, boasting an average encryption rate of up to 87.2798 Mbps. Full article
(This article belongs to the Special Issue Advanced Technologies in Memristor Devices)
Show Figures

Figure 1

11 pages, 597 KiB  
Article
A Design Methodology for Fault-Tolerant Neuromorphic Computing Using Bayesian Neural Network
by Di Gao, Xiaoru Xie and Dongxu Wei
Micromachines 2023, 14(10), 1840; https://doi.org/10.3390/mi14101840 - 27 Sep 2023
Viewed by 998
Abstract
Memristor crossbar arrays are a promising platform for neuromorphic computing. In practical scenarios, the synapse weights represented by the memristors for the underlying system are subject to process variations, in which the programmed weight when read out for inference is no longer deterministic [...] Read more.
Memristor crossbar arrays are a promising platform for neuromorphic computing. In practical scenarios, the synapse weights represented by the memristors for the underlying system are subject to process variations, in which the programmed weight when read out for inference is no longer deterministic but a stochastic distribution. It is therefore highly desired to learn the weight distribution accounting for process variations, to ensure the same inference performance in memristor crossbar arrays as the design value. In this paper, we introduce a design methodology for fault-tolerant neuromorphic computing using a Bayesian neural network, which combines the variational Bayesian inference technique with a fault-aware variational posterior distribution. The proposed framework based on Bayesian inference incorporates the impacts of memristor deviations into algorithmic training, where the weight distributions of neural networks are optimized to accommodate uncertainties and minimize inference degradation. The experimental results confirm the capability of the proposed methodology to tolerate both process variations and noise, while achieving more robust computing in memristor crossbar arrays. Full article
(This article belongs to the Special Issue Advanced Technologies in Memristor Devices)
Show Figures

Figure 1

10 pages, 3006 KiB  
Article
Versatility Investigation of Grown Titanium Dioxide Nanoparticles and Their Comparative Charge Storage for Memristor Devices
by Shubhro Chakrabartty, Abdulkarem H. M. Almawgani, Sachin Kumar, Mayank Kumar, Suvojit Acharjee, Alaaddin Al-Shidaifat, Alwin Poulose and Turki Alsuwian
Micromachines 2023, 14(8), 1616; https://doi.org/10.3390/mi14081616 - 16 Aug 2023
Viewed by 1096
Abstract
Memristive devices have garnered significant attention in the field of electronics over the past few decades. The reason behind this immense interest lies in the ubiquitous nature of memristive dynamics within nanoscale devices, offering the potential for revolutionary applications. These applications span from [...] Read more.
Memristive devices have garnered significant attention in the field of electronics over the past few decades. The reason behind this immense interest lies in the ubiquitous nature of memristive dynamics within nanoscale devices, offering the potential for revolutionary applications. These applications span from energy-efficient memories to the development of physical neural networks and neuromorphic computing platforms. In this research article, the angle toppling technique (ATT) was employed to fabricate titanium dioxide (TiO2) nanoparticles with an estimated size of around 10 nm. The nanoparticles were deposited onto a 50 nm SiOx thin film (TF), which was situated on an n-type Si substrate. Subsequently, the samples underwent annealing processes at temperatures of 550 °C and 950 °C. The structural studies of the sample were done by field emission gun-scanning electron microscope (FEG-SEM) (JEOL, JSM-7600F). The as-fabricated sample exhibited noticeable clusters of nanoparticles, which were less prominent in the samples annealed at 550 °C and 950 °C. The element composition revealed the presence of titanium (Ti), oxygen (O2), and silicon (Si) from the substrate within the samples. X-ray diffraction (XRD) analysis revealed that the as-fabricated sample predominantly consisted of the rutile phase. The comparative studies of charge storage and endurance measurements of as-deposited, 550 °C, and 950 °C annealed devices were carried out, where as-grown device showed promising responses towards brain computing applications. Furthermore, the teaching–learning-based optimization (TLBO) technique was used to conduct further comparisons of results. Full article
(This article belongs to the Special Issue Advanced Technologies in Memristor Devices)
Show Figures

Figure 1

Back to TopTop