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Challenges and Applications of Non-volatile Memory

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A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Semiconductor Devices".

Deadline for manuscript submissions: closed (31 October 2020) | Viewed by 35909

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Dr. Writam Banerjee

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Semiconductor Integrated Device and Process Lab, Pohang University of Science and Technology, Pohang, Republic of Korea
Interests: non-volatile memory; thin films; resistive switching; memory memristor; 3D integration

Special Issue Information

Dear Colleagues,

The miniaturization of modern, cheaper electronics with a reduced power consumption is channelizing classical physics into the quantum domain. Among several others, non-volatile memories are one of the driving forces of this enormous development over the past few decades. This opens up new opportunities and applications of non-volatile memories to serve the future with a realistic view.

Needless to say, this encourages to organize a Special Issue named “Challenges and Applications of Non-Volatile Memory”, aiming to showcase the emerging materials and their applications in the field of non-volatile memories. In this Special Issue, we are particularly interested in high-quality submissions that highlight the current and future trends of flash memory; advances in emerging memory technologies, such as phase change memory, resistive random-access memory, ferroelectric memory, and so on; and emerging applications of non-volatile memories, addressing the recent breakthroughs in two-dimensional (2D) material systems for memory applications. The topics of interest include, but are not limited to, the following:

Flash present and future
Emerging nonvolatile memories
Emerging devices and computing technology
Emerging devices and security
Non-volatile memories for biotechnology
2D materials and memory devices
Failure analysis of non-volatile memories

Dr. Writam Banerjee
Guest Editor

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Published Papers (7 papers)

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Research

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14 pages, 3090 KiB

Open AccessArticle

A Low-Cost Improved Method of Raw Bit Error Rate Estimation for NAND Flash Memory of High Storage Density

by Kainan Ma, Ming Liu, Tao Li, Yibo Yin and Hongda Chen

Electronics 2020, 9(11), 1900; https://doi.org/10.3390/electronics9111900 - 12 Nov 2020

Cited by 2 | Viewed by 2448

Abstract

Cells wear fast in NAND flash memory of high storage density (HSD), so it is very necessary to have a long-term frequent in-time monitoring on its raw bit error rate (RBER) changes through a fast RBER estimation method. As the flash of HSD already has relatively lower reading speed, the method should not further degrade its read performance. This paper proposes an improved estimation method utilizing known data comparison, includes interleaving to balance the uneven error distribution in the flash of HSD, a fast RBER estimation module to make the estimated RBER highly linearly correlated with the actual RBER, and enhancement strategies to accelerate the decoding convergence of low-density parity-check (LDPC) codes and thereby make up the rate penalty caused by the known data. Experimental results show that when RBER is close to the upper bound of LDPC code, the reading efficiency can be increased by 35.8% compared to the case of no rate penalty. The proposed method only occupies

0.039 {mm}^{2}

40 nm

process condition. Hence, the fast, read-performance-improving, and low-cost method is of great application potential on RBER monitoring in the flash of HSD. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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16 pages, 4897 KiB

Open AccessArticle

Switching Characteristics and Mechanism Using Al₂O₃ Interfacial Layer in Al/Cu/GdO_x/Al₂O₃/TiN Memristor

by Chiao-Fan Chiu, Sreekanth Ginnaram, Asim Senapati, Yi-Pin Chen and Siddheswar Maikap

Electronics 2020, 9(9), 1466; https://doi.org/10.3390/electronics9091466 - 07 Sep 2020

Cited by 8 | Viewed by 3127

Abstract

Resistive switching characteristics by using the Al₂O₃ interfacial layer in an Al/Cu/GdO_x/Al₂O₃/TiN memristor have been enhanced as compared to the Al/Cu/GdO_x/TiN structure owing to the insertion of Al₂O₃ layer for the first time. Polycrystalline grain, chemical composition, and surface roughness of defective GdO_x film have been investigated by transmission electron microscope (TEM), X-ray photoelectron spectroscopy (XPS), X-ray diffraction (XRD), and atomic force microscopy (AFM). For bipolar resistive switching (BRS) characteristics, the conduction mechanism of high resistance state (HRS) is a space-charge limited current for the Al/Cu/GdO_x/TiN device while the Al/Cu/GdO_x/Al₂O₃/TiN device shows Schottky emission. However, both devices show Ohmic at a low resistance state (LRS). After the device has been SET, the Cu filament evidences by both TEM and elemental mapping. Oxygen-rich at the Cu/GdO_x interface and Al₂O₃ layer are confirmed by energy dispersive X-ray spectroscopy (EDS) line profile. The Al/Cu/GdO_x/Al₂O₃/TiN memristor has lower RESET current, higher speed operation of 100 ns, long read pulse endurance of >10⁹ cycles, good data retention, and the memristor with a large resistance ratio of >10⁵ is operated at a low current of 1.5 µA. The complementary resistive switching (CRS) characteristics of the Al/Cu/GdO_x/Al₂O₃/TiN memristor show also a low current operation as compared to the Al/Cu/GdO_x/TiN device (300 µA vs. 3.1 mA). The transport mechanism is the Cu ion migration and it shows Ohmic at low field and hopping at high field regions. A larger hopping distance of 1.82 nm at the Cu/GdO_x interface is obtained as compared to a hopping distance of 1.14 nm in the Al₂O₃ layer owing to a larger Cu filament length at the Cu/GdO_x interface than the Al₂O₃ layer. Similarly, the CRS mechanism is explained by using the schematic model. The CRS characteristics show a stable state with long endurance of >1000 cycles at a pulse width of 1 µs owing to the insertion of Al₂O₃ interfacial layer in the Al/Cu/GdO_x/Al₂O₃/TiN structure. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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13 pages, 3726 KiB

Open AccessEditor’s ChoiceArticle

Oxide-Electrolyte Thickness Dependence Diode-Like Threshold Switching and High on/off Ratio Characteristics by Using Al₂O₃ Based CBRAM

by Asim Senapati, Sourav Roy, Yu-Feng Lin, Mrinmoy Dutta and Siddheswar Maikap

Electronics 2020, 9(7), 1106; https://doi.org/10.3390/electronics9071106 - 07 Jul 2020

Cited by 9 | Viewed by 3669

Abstract

Diode-like threshold switching and high on/off ratio characteristics by using an Al/Ag/Al₂O₃/TiN conductive bridge resistive random access memories (CBRAM) have been obtained. The 5 nm-thick Al₂O₃ device shows superior memory parameters such as low forming voltage and higher switching uniformity as compared to the 20 nm-thick switching layer, owing to higher electric field across the material. Capacitance-voltage (CV) characteristics are observed for the Ag/Al₂O₃/TiN devices, suggesting the unipolar/bipolar resistive switching phenomena. Negative capacitance (NC) at low frequency proves inductive behavior of the CBRAM devices due to Ag ion migration into the Al₂O₃ oxide-electrolyte. Thicker Al₂O₃ film shows diode-like threshold switching behavior with long consecutive 10,000 cycles. It has been found that a thinner Al₂O₃ device has a larger on/off ratio of >10⁸ as compared to a thicker one. Program/erase (P/E) cycles, read endurance, and data retention of the thinner Al₂O₃ oxide-electrolyte shows superior phenomena than the thicker electrolyte. The switching mechanism is also explored. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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10 pages, 14642 KiB

Open AccessArticle

Programming Pulse Width Assessment for Reliable and Low-Energy Endurance Performance in Al:HfO₂-Based RRAM Arrays

by Eduardo Pérez, Óscar González Ossorio, Salvador Dueñas, Helena Castán, Héctor García and Christian Wenger

Electronics 2020, 9(5), 864; https://doi.org/10.3390/electronics9050864 - 23 May 2020

Cited by 26 | Viewed by 4411

Abstract

A crucial step in order to achieve fast and low-energy switching operations in resistive random access memory (RRAM) memories is the reduction of the programming pulse width. In this study, the incremental step pulse with verify algorithm (ISPVA) was implemented by using different [...] Read more.

μ

s and 50 ns and assessed on Al-doped HfO

_{2}

4 kbit RRAM memory arrays. The switching stability was assessed by means of an endurance test of 1k cycles. Both conductive levels and voltages needed for switching showed a remarkable good behavior along 1k reset/set cycles regardless the programming pulse width implemented. Nevertheless, the distributions of voltages as well as the amount of energy required to carry out the switching operations were definitely affected by the value of the pulse width. In addition, the data retention was evaluated after the endurance analysis by annealing the RRAM devices at 150 °C along 100 h. Just an almost negligible increase on the rate of degradation of about 1

μ

A at the end of the 100 h of annealing was reported between those samples programmed by employing a pulse width of 10

μ

s and those employing 50 ns. Finally, an endurance performance of 200k cycles without any degradation was achieved on 128 RRAM devices by using programming pulses of 100 ns width. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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14 pages, 4479 KiB

Open AccessEditor’s ChoiceArticle

Exploring the Impact of Variability in Resistance Distributions of RRAM on the Prediction Accuracy of Deep Learning Neural Networks

by Nagaraj Lakshmana Prabhu, Desmond Loy Jia Jun, Putu Andhita Dananjaya, Wen Siang Lew, Eng Huat Toh and Nagarajan Raghavan

Electronics 2020, 9(3), 414; https://doi.org/10.3390/electronics9030414 - 29 Feb 2020

Cited by 8 | Viewed by 3367

Abstract

In this work, we explore the use of the resistive random access memory (RRAM) device as a synapse for mimicking the trained weights linking neurons in a deep learning neural network (DNN) (AlexNet). The RRAM devices were fabricated in-house and subjected to 1000 bipolar read-write cycles to measure the resistances recorded for Logic-0 and Logic-1 (we demonstrate the feasibility of achieving eight discrete resistance states in the same device depending on the RESET stop voltage). DNN simulations have been performed to compare the relative error between the output of AlexNet Layer 1 (Convolution) implemented with the standard backpropagation (BP) algorithm trained weights versus the weights that are encoded using the measured resistance distributions from RRAM. The IMAGENET dataset is used for classification purpose here. We focus only on the Layer 1 weights in the AlexNet framework with 11 × 11 × 96 filters values coded into a binary floating point and substituted with the RRAM resistance values corresponding to Logic-0 and Logic-1. The impact of variability in the resistance states of RRAM for the low and high resistance states on the accuracy of image classification is studied by formulating a look-up table (LUT) for the RRAM (from measured I-V data) and comparing the convolution computation output of AlexNet Layer 1 with the standard outputs from the BP-based pre-trained weights. This is one of the first studies dedicated to exploring the impact of RRAM device resistance variability on the prediction accuracy of a convolutional neural network (CNN) on an AlexNet platform through a framework that requires limited actual device switching test data. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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9 pages, 2568 KiB

Open AccessArticle

Impact of Laser Attacks on the Switching Behavior of RRAM Devices

by Daniel Arumí, Salvador Manich, Álvaro Gómez-Pau, Rosa Rodríguez-Montañés, Víctor Montilla, David Hernández, Mireia Bargalló González and Francesca Campabadal

Electronics 2020, 9(1), 200; https://doi.org/10.3390/electronics9010200 - 20 Jan 2020

Cited by 5 | Viewed by 3583

Abstract

The ubiquitous use of critical and private data in electronic format requires reliable and secure embedded systems for IoT devices. In this context, RRAMs (Resistive Random Access Memories) arises as a promising alternative to replace current memory technologies. However, their suitability for this kind of application, where the integrity of the data is crucial, is still under study. Among the different typology of attacks to recover information of secret data, laser attack is one of the most common due to its simplicity. Some preliminary works have already addressed the influence of laser tests on RRAM devices. Nevertheless, the results are not conclusive since different responses have been reported depending on the circuit under testing and the features of the test. In this paper, we have conducted laser tests on individual RRAM devices. For the set of experiments conducted, the devices did not show faulty behaviors. These results contribute to the characterization of RRAMs and, together with the rest of related works, are expected to pave the way for the development of suitable countermeasures against external attacks. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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Review

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24 pages, 5982 KiB

Open AccessFeature PaperReview

Challenges and Applications of Emerging Nonvolatile Memory Devices

by Writam Banerjee

Electronics 2020, 9(6), 1029; https://doi.org/10.3390/electronics9061029 - 22 Jun 2020

Cited by 165 | Viewed by 14333

Abstract

Emerging nonvolatile memory (eNVM) devices are pushing the limits of emerging applications beyond the scope of silicon-based complementary metal oxide semiconductors (CMOS). Among several alternatives, phase change memory, spin-transfer torque random access memory, and resistive random-access memory (RRAM) are major emerging technologies. This review explains all varieties of prototype and eNVM devices, their challenges, and their applications. A performance comparison shows that it is difficult to achieve a “universal memory” which can fulfill all requirements. Compared to other emerging alternative devices, RRAM technology is showing promise with its highly scalable, cost-effective, simple two-terminal structure, low-voltage and ultra-low-power operation capabilities, high-speed switching with high-endurance, long retention, and the possibility of three-dimensional integration for high-density applications. More precisely, this review explains the journey and device engineering of RRAM with various architectures. The challenges in different prototype and eNVM devices is disused with the conventional and novel application areas. Compare to other technologies, RRAM is the most promising approach which can be applicable as high-density memory, storage class memory, neuromorphic computing, and also in hardware security. In the post-CMOS era, a more efficient, intelligent, and secure computing system is possible to design with the help of eNVM devices. Full article

(This article belongs to the Special Issue Challenges and Applications of Non-volatile Memory)

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