Novel Device for Computing-In Memory
A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Microelectronics".
Deadline for manuscript submissions: closed (30 April 2023) | Viewed by 2452
Special Issue Editors
Interests: semiconductor memory design; SRAM; DRAM; flash and ferroelectric memory cell; analog to digital converters; time to digital converters; computing in memory architecture design; device noise investigation and mitigation; process variation aware digital design; hardware implementation of the soft computing algorithms; CNN accelerator design; neuromorphic computing; low power integrated circuit design
Interests: low-power FPGA and ASIC design for advanced deep learning and artificial intelligence (AI) algorithms for object detection in future autonomous vehicles; low-power video coding algorithms for hardware implementation; low-power ASIC design for multimedia multi-core processor; CAD algorithms for power reduction in VLSI; application circuits design using emerging process technologies; hardware encryption circuits and algorithms; design for power (DFP): ultra-low-power techniques from system level to circuit/layout level; design for manufacturing (DFM): process variation compensation, statistical analysis and optimization; electrical verification for SoC design; application specific design: ESL system implementation and prototyping; circuit design for new materials such as EAP and nano-tube
Special Issue Information
Dear Colleagues,
Today's computing is not limited to designing an application graph of the desired work for available hardware and then starting the execution; it is more application-specific and data-centric. The processor should be able to predict future machine cycles and improve performance through data-centric learning. This type of architecture requires a high data bus bandwidth and speed. Von-Neumann architecture is widely for flexible design space but limits performance due to data movement between the processor and memory, which depends on memory speed and bandwidth. Computing in memory (CIM) is an alternative processor design technique where processing is carried out inside the memory itself. It attracts manly data-centric applications such as neuromorphic computing, machine learning, and soft computing. CIM may use traditional memories, such as SRAM, DRAM, and Flash, along with emerging devices based on memories, such as Ferroelectric transistor (FeFET), spin-transfer torque magnetic random-access memory (STT-MRAM), and pulse-code modulation (PCM). Research on CIM focuses on different aspects of computing engine design, such as the device, circuit, architecture, accelerators, processor design, and algorithms. This Special Issue covers all topics related to the full CIM stack: device entry, fabrication, measurement, data analysis circuit design, architecture, algorithm, accelerator design, and applications.
Dr. Nandakishor Yadav
Dr. Ken Choi
Guest Editors
Manuscript Submission Information
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Keywords
- computing in memory (CIM)
- in-memory computing (IMC)
- processing in memory (PIM)
- computational modeling
- central processing unit
- accelerator design
- image processing
- artificial intelligence
- machine learning
- data-centric hardware
- neuromorphic engineering
- deep neural network (DNN)
- SRAM
- DRAM
- flash
- FeFET
- MRAM
- RRAM
- TCAM
- FPGA
- ASIC
