Next Article in Journal
Comparison of 2L + 2M and 6L SVPWM for Five-Phase Inverter to Reduce Common Mode Voltage
Next Article in Special Issue
Self-Supervised Clustering Models Based on BYOL Network Structure
Previous Article in Journal
An Objective Holographic Feedback Linearization Based on a Sliding Mode Control for a Buck Converter with a Constant Power Load
Previous Article in Special Issue
An Algorithm Based on DAF-Net++ Model for Wood Annual Rings Segmentation
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems

School of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, China
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(18), 3977; https://doi.org/10.3390/electronics12183977
Submission received: 30 July 2023 / Revised: 10 September 2023 / Accepted: 18 September 2023 / Published: 21 September 2023
(This article belongs to the Special Issue Deep Learning for Data Mining: Theory, Methods, and Applications)

Abstract

:
This paper focuses on embedded system modeling, proposing a solution to obtain a refined net via the refinement operation of an extended Petri net. Object-oriented technology and Petri net with inhibitor-arcs-based representation for embedded systems (PIRES+) are combined to obtain an object-oriented PIRES+ (OOPIRES+). A gateway refinement method of OOPIRES+ is proposed, and the preservation of the liveness, boundedness, reachability, functionality, and timing of the refined net system is investigated. The modeling analysis of a smart home system is taken as an example to verify the effectiveness of the refinement method. The results can provide an effective way for the investigation of the refined properties of a Petri net system and a favorable means for large-scale complex embedded system modeling, which has broad application prospects.

1. Introduction

Embedded systems are the driving force behind the rapid development of the information technology industry and have widely penetrated and been integrated into every corner of the national economic and social development. As an industry leading the future economic boom, the research of the Internet of Things is also inseparable from embedded systems. Roberto et al. [1] introduced an event network SCIFI-II system, which can separate application components from the event brokers that connect components and realize the deployment of components in any environment. The design and manufacturing of embedded systems has become a hot research topic internationally. In order to improve the design and manufacturing efficiency of embedded systems, formal modeling and verification of the system are very important.
For embedded system modeling, there are usually two methods: the non-formal modeling method and the formal modeling method. Non-formal modeling methods can express certain functional characteristics of a system, but they cannot be validated using rigorous mathematical methods. Formal methods use symbols and mathematical language to describe the properties of a system, which can systematically describe and validate the system [2]. Common formal modeling methods mainly include the extended finite-state machine method [3], data flow diagram method [4], communication process method [5], Petri net method [6], entity relationship diagram method, object-oriented UML method [7], etc. These modeling methods describe the characteristics of embedded systems from different perspectives but do not form a unified standard. Due to their intuitive graphical expression ability and rigorous mathematical expression, Petri nets have a wide range of applications in the behavioral analysis of concurrent systems [8]. However, classical Petri nets lack a hierarchical structure, cannot fully describe data flows, and lack the concept of time [9], making it impossible to fully describe embedded systems.
In order to improve the modeling ability of Petri nets on embedded systems, domestic and foreign scholars have improved the classical Petri nets and proposed a variety of extension forms, such as colored Petri nets (CPNs) [10], time Petri nets [11], fuzzy Petri nets [12], logical delay Petri nets, PRES+ [13], etc. These extended forms of Petri nets enhance the ability to model and analyze embedded systems based on different application requirements, where PRES+ can capture real-time information and describe the hierarchical structure of the system.
In the field of embedded system modeling and analysis, research on the theory and application of PRES+ has achieved some results. Cortés et al. [13] proposed the concept of PRES+ and analyzed two embedded system PRES+ models. Karlsson et al. used PRES+ to accurately model and validate mobile phone systems and represented the embedded systems that need to be validated as PRES+ models [14]. They provided a model validation method for analyzing the system’s coverage and decidability [15]. By using the PRES+ and model transformation method, Bandyopadhyay et al. [16,17] verified the Very Large Scale Integrated (VLSI) system model. In order to improve the efficiency of PRES+ model verification, Xia et al. [18] modeled and analyzed the subsystem sharing system.
Although PRES+ has significantly improved the accuracy of embedded system modeling compared to classical Petri nets, there are still issues with the inability to describe event priorities and fully express complex program control and data flow. Adding inhibitor arcs to Petri nets can be used to control event sequences, adjust priority relationships between sequences, improve model analysis capabilities, and, to some extent, affect the expression of control flow and data flow. Therefore, adding inhibitor arcs to PRES+ can generate a PRES+ with inhibitor arcs (PIRES+, Petri net with inhibitor-arcs-based representation for embedded systems). Xia et al. [19] analyzed the refinement operation of the PIRES+ and applied it to the modeling and verification of the mobile communication systems.
As a system model, the PIRES+ can consider the system and behavior uniformly, but it is not easy to reflect the division of functional modules. The outstanding advantage of object-oriented technology lies in the use of object-oriented technology to divide the system into functional modules, effectively dividing the entire complex system into multiple simple subsystems and conducting corresponding modeling research. By combining object-oriented technology with Petri nets, an object-oriented Petri net (OOPN) can be obtained, which divides the entire system into multiple subsystem modules based on functional implementation, which is beneficial for modeling large-scale complex systems. There have been some research achievements in the analysis and modeling of the object-oriented Petri nets. Zhao et al. [20] proposed an extended-object-oriented petri net (EOOPN), supporting the description and evolution of components in the context of intelligent and cloud computing. Hu et al. [21] worked on a compression algorithm to convert an object-oriented generalized stochastic Petri net (OGSPN) into a generalized stochastic Petri net (GSPN).
However, as the complexity and scale of embedded systems increase, the number of system states will increase exponentially, highlighting the problem of “state space explosion”. Since the “state space explosion” problem of OOPIRES+ is NP-hard, it cannot be completely solved, but it can be alleviated through property preserving transformations. The commonly used Petri net transformation methods include refinement, synthesis, and reduction. Among them, refinement is a “top-down” modeling method. In the modeling of complex system modules, an abstract model is first established; then, it is refined layer by layer; and, finally, a refined model is obtained. When the refinement condition is satisfied, some important properties of the original Petri net system are preserved when the Petri net system is extended without the analysis of the reachable space. Therefore, refinement can alleviate the problem of “state space explosion”.
In recent years, extensive research has been conducted on the refinement and application of Petri nets. Padberg et al. [22] provided an overview of refinement methods for place/transition Petri net systems. Wang et al. [23] proposed a Petri net refinement method without reachability analysis. Based on the basic net system, Bernardinello et al. [24] proposed a refinement method for distributed systems. For the refinement operation of the place/transition net, Huang et al. [25] provided the conditions to keep the original net system’s liveness, boundedness, fairness, and other properties. Lakos et al. [26] provided three types of refinement operations for the colored Petri net (CPN). Based on the workflow net, Van Hee et al. [27] presented several refinement rules for preserving system reliability. For extended-time Petri nets, Mejia et al. [28] proposed a refinement operation mode.
Cortes et al. [13] extended PRES+ by introducing the definition of hierarchical structure and proposed some equivalent concepts of PRES+ and refinement methods to preserve complete equivalence. Xia et al. [19] proposed a PIRES+ refinement method and applied it to modeling network communication systems.
This paper proposes an object-oriented PIRES+ (OOPIRES+) and a gateway refinement operation for the formal modeling and analysis of the large-scale complex embedded systems. So far, there has been little research on the gateway refinement operations. Due to the crucial role of gateway refinement in the transmission and control of system data and information flows, it is necessary to conduct in-depth research on it. For the refinement operation of the OOPIRES+’s gateway, we studied the preservation of liveness, boundedness, reachability, functionality, and timing. This can greatly alleviate the “state space explosion” problem encountered in the modeling process of complex embedded systems. We applied this refinement operation to the modeling of smart home control systems, and we found that it has great guiding significance for the research of embedded system modeling.
The structure of this paper is as follows: Section 2 proposes the related concepts of OOPIRES+. Section 3 presents the gateway refinement operation of OOPIRES+ and investigates the preservation of liveness, boundedness, reachability, functionality, and timing. In Section 4, a smart home remote control system is modeled and analyzed by using the OOPIRES+ gateway refinement operation. Section 5 summarizes the contributions of the refinement method.

2. Relevant Concepts of OOPIRES+

This section provides the relevant concepts of OOPIRES+.
Definition 1 ([19]). 
N = P , T ; F I , F O , I , M  is said to be a PIRES+ model, where  P = p 1 , p 2 , , p m  is the place set,  T = t 1 , t 2 , , t n  is the transition set,  F I P × T  is the input arc set,  F O T × P  is the output arc set,  I P × T  is the inhibitor arc set, and M is the marking.
Definition 2 ([19]). 
For  t T , there exists a transition function,  f : τ p 1 × τ p 2 × × τ p n τ q , where  p 1 , p 2 , , p n · t , q t · . For  t T , there exists a minimum transition delay,  d , and a maximum transition delay,  d + , both of which are non-negative real numbers.
Figure 1 shows an example of the PIRES+ model.
Here, P = p 1 , p 2 , p 3 , p 4 , p 5 , and T = t 1 , t 2 , t 3 , t 4 ; F I = p 1 , t 1 , p 2 , t 2 , p 3 , t 3 , p 4 , t 4 , p 5 , t 4 ; F O = t 1 , p 2 , t 1 , p 3 , t 2 , p 4 , t 3 , p 5 , t 4 , p 1 ; I = p 2 , t 3 ; and M 0 is the initial marking, where M 0 p 1 = 4 , 0  and  M 0 p 2 = M 0 p 3 = M 0 p 4 = M 0 p 5 = . The transition functions of transitions t 1 , t 2 , t 3 , and t 4 are f 1 , f 2 , f 3 , and f 4 , respectively. The transition delays of transitions t 1 , t 2 , t 3 , and t 4 are a 1 , b 1 , a 2 , b 2 , a 3 , b 3 , and a 4 , b 4 , respectively.
Definition 3. 
An OOPIRES+ object subnet is a six-tuple  O P S N = P , T ; F , I , Q , W , where  P = p 1 , p 2 , , p m  is the place set of  O P S N , represented by  O P S N P ; T = t 1 , t 2 , , t n  is the transition set of  O P S N , represented by  O P S N T ; F  represents the flow relationship of  O P S N , including  F I  and  F O , where  F I P × T Q × T  is the set of input arcs and  F O T × P T × Q  is the set of output arcs;  I P × T  is the inhibitor arc set of  O P S N ; and  Q = q 1 , q 2 , , q r  is the message place set of  O P S N , represented by  O P S N Q , including input place  Q I  and output place  Q O .
For each transition ( t ), there are a transition function ( f ) and a transition delay ( d and d + ) associated with it. Object subnets are connected by the gateway, g . Gateways are classified into input gateways and output gateways according to their positions relative to subnets. As the gateway can be used to preprocess data before flowing into the next object subnet, here, the gateway ( g ) is also assigned the attributes of the gateway function, f g , and the gateway delay, d g , d g + .
Figure 2 shows an example of the OOPIRES+ object subnet.
Here, P = p 1 , p 2 , p 3 , p 4 , and T = t 1 , t 2 , t 3 , t 4 ; F I = q 1 , t 1 , p 1 , t 2 , p 2 , t 3 , p 3 , t 4 , p 4 , t 4 ; F O = t 1 , p 1 , t 1 , p 2 , t 2 , p 3 , t 3 , p 4 , t 4 , q 2 , ; I = p 2 , t 2 ; Q = q 1 , q 2 , where q 1 is the input message place, and q 2 is the output message place; and g 1 and g 2 are the input gateway and the output gateway of the object subnet OPSN 1 . Moreover, f 1 , f 2 , f 3 , and f 4 are transition functions of transitions t 1 , t 2 , t 3 , and t 4 , respectively. Their corresponding transition delays are a 1 , b 1 , a 2 , b 2 , a 3 , b 3 , and a 4 , b 4 , respectively. In addition, f g 1 and f g 2 are the gateway functions of gateways g 1 and g 2 , and their corresponding gateway delays are a g 1 , b g 1 and a g 2 , b g 2 .
Definition 4. 
An OOPIRES+ net system is a four-tuple  O P N = O P S N , G , F , M , where  O P S N = O P S N 1 , O P S N 2 , , O P S N s  is the object subnet set of OOPIRES+;  G = g 1 , g 2 , , g t  is the set of all gateways;  F  includes  F I  and  F O , where  F I Q × G , F O G × Q ; M  is the marking; and the initial marking is  M 0 .
Definition 5. 
Suppose that  O P N = O P S N , G , F , M  is an OOPIRES+ net system,  M R M 0 , and  t *  is the inhibitor place set of transition,  t .
(i)
If  t *  and   · t Q , then  t  is called enabled under  M  if  p · t t * : M p W p , t ,  p t * : M p = , and  q Q : M q W q , t ;
(ii)
If   t * =  and    · t Q , then  t  is called enabled under  M  if  p · t : M p W p , t  and  q Q : M q W q , t ;
(iii)
If  t *   and    · t Q =  and, then  t  is called enabled under  M  if  p · t t * : M p W p , t ,  p t * : M p = ;
(iv)
If   t * =  and    · t Q = , then  t  is called enabled under  M  if   p · t : M p W p , t ;
(v)
The system marking changes after the firing of transition  t : M M , where
M p = M p W p , t p · t t · t * M p + W t , p p t · · t   o r   p t · t * M p W p , t + W t , p M p p · t t · t * o t h e r s M q = M q W q , t p · t M q + W t , q p t · M q o t h e r s
Definition 6. 
Suppose an OOPIRES+ net system is  O P N = O P S N , G , F , M 0 , where  M 0  is the initial marking,  t O P S N T , and g G . Then, we have the following:
(i)
If  M R M 0 ,  M R M ,  M [ t > , then  t  is said to be live. If  M R M 0 ,  M R M M [ g > , then  g  is said to be live.
(ii)
If  t O P S N T , g G t , and  g  are live, then the OOPIRES+ net system OPN is said to be live.
Definition 7. 
Suppose an OOPIRES+ net system is   O P N = O P S N , G , F , M 0 , where  M 0  is the initial marking,  p O P S N P , and  q O P S N Q . Then, we have the following:
(i)
Place  p  is said to be bounded if  k > 0 ,  M R M 0 : M p k . Message place  q  is said to be bounded if  l > 0 ,  M R M 0 : M q l .
(ii)
If  p O P S N P , q O P S N Q , p , and  q  are bounded, then the OOPIRES+ net system  O P N  is said to be bounded.
Definition 8. 
Assuming that  O P S N 1  and  O P S N 2  are two OOPIRES+ object subnets, then  O P S N 1 and O P S N 2  are said to have the same reachability if and only if the following takes place:
(i)
The pre-set place’s number of input gateway and the post-set place’s number of output gateway of  O P S N 1  are the same as those of  O P S N 2 .
(ii)
If the number of tokens in pre-set places of the input gateway of  O P S N 1  is equal to that of  O P S N 2 , then the number of tokens in post-set place of the output gateway of  O P S N 1  is equal to that of  O P S N 2 .
Definition 9. 
Assuming that  O P S N 1  and  O P S N 2  are two OOPIRES+ object subnets, then  O P S N 1  and  O P S N 2  are said to have the same functionality if and only if the following takes place:
(i)
O P S N 1  and  O P S N 2  have the same reachability.
(ii)
If the token type of tokens in pre-set places of the input gateway of  O P S N 1  is equal to that of  O P S N 2 , then the token type of tokens in the post-set place of output gateway of  O P S N 1  is equal to that of  O P S N 2 .
Definition 10. 
Assuming that  O P S N 1  and  O P S N 2  are two OOPIRES+ object subnets,  O P S N 1  and  O P S N 2  are said to have the same timing if and only if the following takes place:
(i)
O P S N 1  and  O P S N 2  have the same reachability.
(ii)
If the token time of tokens in pre-set places of the input gateway of  O P S N 1  is equal to that of  O P S N 2 , then the token time of tokens in the post-set place of output gateway of  O P S N 1  is equal to that of  O P S N 2 .

3. OOPIRES+ Gateway Refinement Operation and Property Analysis

In this section, the gateway refinement operation of OOPIRES+ is proposed, and the preservation of liveness, boundedness, reachability, functionality, and timing of the original net system by this refinement operation is investigated.
Figure 3 is a schematic diagram of the gateway refinement operation of the OOPIRES+ net system.
Definition 11. 
Gateway refinement operation of the OOPIRES+ net system  R e   f g A , O P S N A + G A ¯ : The gateway,  g A , of the OOPIRES+ net system  O P N = O P S N , G , F , M  is refined into a subnet and a gateway set,  G A ¯ = g A 1 ¯ , g A 2 ¯ ; that is,  g A  is replaced by the subnet,  O P S N A , and the gateway set  G A ¯ = g A 1 ¯ , g A 2 ¯ . Then, a new OOPIRES + net system,  O P N B = O P S N B , G B , F B , M B , is obtained, where we have the following:
(i)
O P S N B = O P S N O P S N A ;
(ii)
G B = G G A ¯ g A ;
(iii)
f g B = f g A 2 ¯     f s     f g A 1 ¯   =   f g A  (here,   is the function composition operator), where  f g A 1 ¯ ,  f g A 2 ¯ , and  f g A  are the gateway functions of  g A 1 ¯ ,  g A 2 ¯ , and  g A , respectively;  f s : τ p 1 × τ p 2 × × τ p n τ q ,  p 1 , p 2 , , p n O P S N A Q A I , and  q O P S N A Q A O .
(iv)
d g B = d g A 1 ¯ + d s + d g A 2 ¯ = d g A , and  d g B + = d g A 1 ¯ + + d s + + d g A 2 ¯ + = d g A + , where  d g A 1 ¯ ,  d g A 2 ¯ , and  d g A  are the minimum gateway delays of  g A 1 ¯ ,  g A 2 ¯ , and  g A , respectively;  d g A 1 ¯ + ,  d g A 2 ¯ + , and  d g A +  are the maximum gateway delays of  g A 1 ¯ ,  g A 2 ¯ ,  g A , respectively; and  d s  and  d s +  are the minimum and the maximum transition delays of  O P S N A T .
(v)
F B  includes  F B I  and  F B O , where  F B I = F I F A I q , g A 1 ¯ | q · g A q , g A 2 ¯ | q · g A 2 ¯ { q , g A | q · g A } , and  F B O = F O F A O g A 2 ¯ , q | q g A · g A 1 ¯ , q | q g A 1 · ¯ { g A , q | q g A · } ;
(vi)
M B p = M 0 p p O P S N P M A 0 p p O P S N A P .
Definition 12. 
The closed net system of the OOPIRES+ subnet  O P S N = P , T ; F , I , Q , W  is defined as a three-tuple  O P N = O P S N , G , p ; that is, the gateway set,  G = g 1 , g 2 , and message place,  p , are added to  O P S N , where  g 1  is the input gateway of  O P S N , g 2  is the output gateway of  O P S N , and  p = g 2 p · =   g 1 .
Definition 13. 
The extended subnet of the gateway,  g , is a three-tuple  g = g , Q , F  ; that is, a message place set,  Q , and a flow relationship,  F , are added to the gateway,  g , where  Q  includes  Q I  and  Q O , and  F = { q 1 , g , g , q 2 | q 1 Q I , q 2 Q O } .
In the following, we investigate the preservation of liveness, boundedness, reachability, functionality, and timing of the gateway refinement operation of the OOPIRES+ net system.
It is assumed that the OOPIRES+ net system OPN B = OPSN B , G B , F B , M B is obtained from the OOPIRES+ net system OPN = OPSN , G , F , M by using the gateway refinement operation Re   f g A , OPSN A + G A ¯ .
Theorem 1. 
O P N B  is live if and only if  O P N  and the closed net system  O P N A = O P S N A , G A , p A  of  O P S N A  are live.
Proof. 
( ) For the net system OPN , since OPN is live, according to Definition 6, t OPSN T and g G , for M R M 0 , there exists   M R M , such that   M [ t > and   M [ g > , and then t and g are live. For the closed net system OPN A , since OPN A is live, according to Definition 6, t OPSN A T and g G A , and for M R M 0 , there exists   M R M , such that   M [ t > and   M [ g > ; then, t and g are live. Since OPN B is obtained from OPN by using OPSN A and G A ¯ to replace g A , OPSN B T = OPSN T , OPSN A T , OPN B G = OPN G , OPN A G A . According to Definition 12, for t OPSN B T , g G B , M R M B 0 ,   M R M , such that   M [ t > ,   M [ g > , t , and g are live. Therefore, the net system OPN B is live.
( ) Suppose that OPN B is live. Without loss of generality, assume that OPN is not live, and then t OPSN T or g G , M R M 0 ,   M R M , such that ¬   M [ t > or ¬   M [ g > . Since OPSN T OPSN B T and G G B , then t OPSN B T or g G B , M R M B 0 ,   M R M , ¬   M [ t > or ¬   M [ g > , so OPN B is not live. This contradicts the hypothesis. Therefore, OPN and OPN A are live. □
Theorem 2. 
O P N B  is bounded if and only if  O P N  and the closed net system  O P N A = O P S N A , G A , p A  of  O P S N A  are bounded.
Proof. 
( ) Since the net system OPN is bounded, according to Definition 7, p OPSN P q OPSN Q , k > 0 , M R M 0 , such that M p k M q k . Since the closed net system OPN A is bounded, according to Definition 7, p OPSN A P p A q OPSN A Q , M R M A 0 , k A > 0 , such that M p k A M q k A . Let k B = max k , k A and then p OPSN B P q OPSN B Q , M R M B 0 , such that M p k B M q k B . Thus, OPN B is bounded.
( ) Suppose that OPN B is bounded. Without loss of generality, assume that OPN is not bounded, and then, for M R M 0 , p OPSN P or q OPSN Q , for k > 0 , M p > k or M q > k . Since OPSN P OPSN B P and OPSN Q OPSN B Q , for M R M B 0 , p OPSN B P or q OPSN B Q , k B > 0 , M p > k or M q > k , so OPN B is not bounded. This contradicts the hypothesis. Therefore, OPN and OPN A are both bounded. □
Theorem 3. 
O P N B  and  O P N  have the same reachability.
Proof. 
According to gateway refinement operation, Re   f g A , OPSN A + G A ¯ , of the OOPIRES + system, in OPSN A + G A ¯ and g A , the number of pre-set places and post-set places of G A ¯ and g A is the same, and the number of tokens in the pre-set places of G A ¯ is equal to that of g A . According to Definition 11, the tokens’ number in the post -set places of G A ¯ is equal to that of g A . According to Definition 8, the reachability of g A and OPSN A + G A ¯ is the same. Since OPN g A = OPN B OPSN A + G A ¯ , the reachability of OPN B and OPN is the same. □
Theorem 4. 
O P N B  and  O P N  have the same functionality.
Proof. 
According to Theorem 3, net system OPN B and OPN have the same reachability. In OPSN A + G A ¯ and g A , the token type of tokens in the pre-set places of G A ¯ is the same as that of g A . According to Definition 11, f g B = f g A 2 ¯ f s f g A 1 ¯ = f g A ; therefore, the token type of tokens in post-set places of G A ¯ is the same as that of g A . By Definition 9, OPSN A + G A ¯ and g A have the same functionality. Since OPN B OPSN A + G A ¯ = OPN g A , OPN B and OPN have the same functionality. □
Theorem 5. 
O P N B  and  O P N  have the same timing.
Proof. 
According to Theorem 3, net systems OPN B and OPN have the same reachability. In OPSN A + G A ¯ and g A , the token time of tokens in the pre-set places of G A ¯ is the same as that of g A . According to Definition 11, d g A 1 ¯ + d s + d g A 2 ¯ = d g A , d g A 1 ¯ + + d s + + d g A 2 ¯ + = d g A + ; therefore, the token time of tokens in post-set places of G A ¯ is the same as that of g A . By Definition 10, OPSN A + G A ¯ and g A have the same timing. Since OPN B OPSN A + G A ¯ = OPN g A , then OPN B and OPN have the same timing. □

4. Applications

This section applies the gateway refinement method of the object-oriented PIRES+ (OOPIRES+) to the modeling and analysis of smart home remote control systems.
The smart home remote control system is mainly composed of five functional modules: mobile control module, PC control module, instruction data transmission module, function echo feedback module, and system function control module. When users want to manage their smart homes, they can give instructions to the smart home devices connected to the network, one by one, through the mobile phones or PC terminals. Instructions are summarized by the mobile control module or PC control module and uploaded to the cloud for storage. The instructions are transmitted to the system function control module through the instruction data transmission module, achieving management and control of the smart home, and ultimately completing the feedback of the instructions.

4.1. Construct OOPIRES+ Model for Smart Home Remote Control System

In this subsection, the smart home remote control system’s OOPIRES+ model is constructed. We first provide the OOPIRES+ abstract model and then apply the above refinement operation method to obtain its refined OOPIRES+ model.
As shown in Figure 4, the abstract OOPIRES+ net system model OPN = OPSN , G , F , M of the smart home remote control system is proposed, which includes instructions transmission module OPSN 1 , function feedback module OPSN 2 , and gateways g A and g AA . The meaning of the internal transition of OPSN 1 and OPSN 2 is as follows: t 1 , receive current instructions; t 2 , remote transmission of instructions; t 3 , instruction transmission completed; t 4 , receive functional feedback; t 5 , functional feedback transmission; and t 6 , screen status display.
Figure 5 shows the object subnet model OPSN A , which includes system function control module OPSN 3 and gateways g A 1 ¯ and g A 2 ¯ . According to the received instructions, OPSN A completes the control of subsystems. The meaning of the internal transition OPSN 3 is as follows: t A 1 , apply for control permission; t A 2 , confirm system status; t A 3 , confirm control permission; and t A 4 , complete instruction execution. Moreover, t A 1 ~ t Am corresponds to control systems, which include the lighting control system, monitoring control system, and electrical control system, and realizes corresponding instruction functions.
Figure 6 shows the object subnet OPSN AA , including mobile terminal control module OPSN 4 , PC control module OPSN 5 , and the gateways g AA 1 ¯ and g AA 2 ¯ . According to the operator’s intention, this module sends instructions to the functional control terminal through different devices. The meaning of the internal transitions of OPSN 4 and OPSN 5 is as follows: t AA 1 , apply to activate mobile devices; t AA 2 , summarize current instructions; t AA 3 , check network connectivity; t AA 4 , upload instructions to the cloud; t AA 5 , complete cloud upload; t AA 6 , apply to enable PC devices; t AA 7 , check synchronization on PC devices; t AA 8 , confirm synchronization on PC devices; t AA 9 , summarize current instructions; and t AA 10 , instruction cloud synchronization. Moreover, t AA 1 ~ t AAm and t AA 1 ~ t AAm are used to realize the collection of system instructions on a mobile phone and PC terminal.
Next, the object subnets OPSN A and OPSN AA are used to carry out refinement operations on g A and g AA in the net system abstract model OPN , and the smart home remote control system OPN B is obtained (as shown in Figure 7). The system begins to issue control instructions to smart home devices from OPSN 4 or OPSN 5 . OPSN 1 receives the instructions and transmits them remotely to OPSN 3 . OPSN 3 receives the instructions and executes them. OPSN 2 is used to control the screen display and remind the users of their smart home status.

4.2. Property Preservation Analysis of the OOPIRES+ Model

In this subsection, the property preservations of the smart home remote control system’s OOPIRES+ model are analyzed.

4.2.1. Liveness and Boundedness Preservation

As can be seen from Figure 5, the net system OPN is live and bounded, and the corresponding closed net systems can be obtained by adding message places on the basis of the models of OPSN A and OPSN AA in Figure 5 and Figure 6. It is easy to see that the closed net systems are also live and bounded. The net system OPN B is obtained from the net system OPN by using OPSN A and OPSN AA to replace g A and g AA , respectively. Therefore, according to Theorems 1 and 2, the net system OPN B is also live and bounded. As can be seen from Figure 4 and Figure 7, OPN and OPN B are both live and bounded. In addition, the liveness and boundedness of OPN (Figure 4) and OPN B (Figure 7) can also be verified by the modeling tool Tina 3.7.0, and the verification results are shown in Figure 8 and Figure 9.

4.2.2. Reachability, Functionality, and Timing Preservation

In Figure 4 and Figure 7, the pre-set places of g A and g A 1 ¯ are q 2 , and the post-set places of g A and g A 2 ¯ are q 3 . Since g A and g A 1 ¯ have the same number of pre-set places and the same number of tokens, and after the refinement operation, g A and g A 2 ¯ have the same number of post-set places and the same number of tokens, g A ’s extended subnet has the same reachability as subnet OPSN A . Since the token type of tokens in the pre-set places of g A and g A 1 ¯ is the same; the gateway function of g A is equal to the function of OPSN A ; and, after the refinement operation, the token type of tokens in the post-set places of g A and g A 2 ¯ is the same, g A ’s extended subnet has the same functionality as subnet OPSN A . Since the token time of tokens in the pre-set places of g A and g A 1 ¯ is the same; the gateway delay of g A is equal to the delay of OPSN A ; and, after the refinement operation, the token time of tokens in the post-set places of g A and g A 2 ¯ is the same, g A ’s extended subnet has the same timing as subnet OPSN A . Similarly, the extended subnet of g AA and the subnet OPSN AA have the same reachability, functionality, and timing. Thus, by Theorems 3, 4, and 5, OPN B and OPN have the same reachability, functionality, and timing. According to Figure 4 and Figure 7, it is easy to see that OPN B and OPN have the same reachability, functionality, and timing.
Note that the gateway refinement method can be used for the modeling and validation of various embedded-system instances, such as intelligent transportation, smart cities, smart homes, etc. The modeling and verification of the smart home remote control system is only one of many system examples. The application of the refinement method to model and validate different system instances may vary, and a specific analysis should be conducted on specific issues. However, the basic modeling and validation process is similar.

5. Conclusions

For embedded system modeling, common formal modeling methods, such as the extended finite-state machine method, data flow diagram method, communication process method, etc., can describe the characteristics of embedded systems from different perspectives but do not form a unified standard. Classical Petri nets lack a hierarchical structure and the concept of time, making it impossible to fully describe embedded systems. PRES+ improved the accuracy of embedded system modeling, but there are still issues with the inability to describe event priorities and fully express complex program control and data flow. PIRES+ can consider the system and behavior uniformly, but it is not easy to reflect the division of functional modules.
In response to the problem of formal modeling and analysis of large-scale complex embedded systems, object-oriented technology is combined with PIRES+, and an object-oriented PIRES+ (OOPIRES+) and a gateway refinement operation method are proposed. This paper investigates the preservation of the liveness, boundedness, reachability, functionality, and timing of the original net system by the gateway refinement operation and presents the preservation conditions for the above important properties of the refinement operation, which can effectively alleviate the “state space explosion” problem of OOPIRES+. The application in the refined modeling and analysis of smart home remote control systems also demonstrates the effectiveness and practicality of the proposed refinement method. The research results of this paper will also provide a new method for modeling and analysis of large complex embedded systems.
The limitation of the gateway refinement approach is that the operation must meet the constraints of gateway replacement, gateway function, gateway delay, and so on. The next research work may consider proposing a wider range of conditions for the study of OOPIRES+ gateway refinement operations or other refinement operations (such as a subnet refinement operation).

Author Contributions

Conceptualization, C.X.; methodology, C.X.; validation, C.X., M.Q. and Y.S.; formal analysis, C.X. and M.Q.; investigation, C.X.; resources, C.X.; writing—original draft preparation, C.X.; writing—review and editing, M.Q., Y.S. and M.G.; supervision, C.X.; project administration, C.X.; funding acquisition, C.X. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Natural Science Foundation of Shandong Province (Grant No. ZR2022MF348).

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Roberto, B.; Montserrat, M.; María, E.B.G.; Ana, F.G. An Event Mesh for Event Driven IoT Applications. Int. J. Interact. Multimed. Artif. Intell. 2022, 7, 54–59. [Google Scholar]
  2. Marwedel, P. Embedded System Design—Embedded Systems Foundations of Cyber-Physical Systems, and the Internet of Things, 4th ed.; Springer: Cham, Switzerland, 2021. [Google Scholar]
  3. Tausan, N.; Markkula, J.; Kuvaja, P.; Oivo, M. Choreography in the embedded systems domain: A systematic literature review. Inf. Softw. Technol. 2017, 91, 82–101. [Google Scholar] [CrossRef]
  4. Stoutchini, A.; Benini, L. StreamDrive: A dynamic dataflow framework for clustered embedded architectures. J. Signal Process. Syst. 2019, 91, 630–640. [Google Scholar]
  5. Firdaus, A.F.; Meribout, M. A new parallel VLSI architecture for real-time electrical capacitance tomography. IEEE Trans. Comput. 2016, 65, 30–41. [Google Scholar] [CrossRef]
  6. Ding, Z.; Yang, R.; Cui, P.; Zhou, M.C.; Jiang, C. Variable Petri nets for mobility. IEEE Trans. Syst. Man Cybern. Syst. 2022, 52, 4784–4797. [Google Scholar] [CrossRef]
  7. Ciccozzi, F.; Malavolta, I.; Selic, B. Execution of UML models: A systematic review of research and practice. Softw. Syst. Model. 2019, 18, 2313–2360. [Google Scholar] [CrossRef]
  8. Moutinho, F.; Gomes, L. Asynchronous-channels within Petri net-based GALS distributed embedded systems modeling. IEEE Transections Ind. Inform. 2014, 10, 2024–2033. [Google Scholar] [CrossRef]
  9. Andrzej, B.; Tomasz, R.; Dariusz, R. Timed colored Petri net-based event generators for web systems simulation. Appl. Sci. 2022, 12, 12385. [Google Scholar]
  10. Borstel, F.D.V.; Villa-Medina, J.F.; Gutiérrez, J. Development of mobile robots based on wireless robotic components using UML and hierarchical colored Petri nets. J. Intell. Robot. Syst. 2022, 104, 70. [Google Scholar] [CrossRef]
  11. Gutierrez, A.; Bressan, M.; Jimenez, J.F.; Alonso, C. Real-time emulation of boost inverter using the systems modeling language and Petri nets. Math. Comput. Simul. 2019, 158, 216–234. [Google Scholar] [CrossRef]
  12. Jiang, W.; Zhou, K.-Q.; Sarkheyli-Hägele, A.M.; Zain, A. Modeling, reasoning, and application of fuzzy Petri net model: A survey. Artif. Intell. Rev. 2022, 55, 6567–6605. [Google Scholar] [CrossRef]
  13. Cortés, L.A.; Eles, P.; Peng, Z. Modeling and formal verification of embedded systems based on a Petri net representation. J. Syst. Archit. 2003, 49, 571–598. [Google Scholar] [CrossRef]
  14. Karlsson, D.; Eles, P.; Peng, Z. Formal verification of component-based designs. J. Des. Autom. Embed. Syst. 2007, 11, 49–90. [Google Scholar] [CrossRef]
  15. Karlsson, D.; Eles, P.; Peng, Z. Model validation for embedded systems using formal method-aided simulation. LET Comput. Digit. Tech. 2008, 2, 413–433. [Google Scholar] [CrossRef]
  16. Bandyopadhyay, S.; Sarkar, S.; Sarkar, D.; Mandal, C. SamaTulyata: An efficient path based equivalence checking Tool. In Automated Technology for Verification and Analysis, Proceedings of the 15th International Symposium, ATVA 2017, Pune, India, 3–6 October 2017; D’Souza, D., Narayan Kumar, K., Eds.; Lecture Notes in Computer Science; Springer: Cham, Switzerland, 2017; Volume 10482, pp. 109–116. [Google Scholar]
  17. Bandyopadhyay, S.; Sarkar, D.; Mandal, C. Equivalence checking of petri net models of programs using static and dynamic cut-points. Acta Inform. 2019, 56, 321–383. [Google Scholar] [CrossRef]
  18. Xia, C.; Li, C. Property preservation of Petri synthesis net based representation for embedded systems. IEEE/CAA J. Autom. Sin. 2021, 8, 905–915. [Google Scholar] [CrossRef]
  19. Xia, C.; Wang, Z.; Wang, Z. The refinement of Petri net with inhibitor arcs based representation for embedded systems. Electronics 2022, 11, 1389. [Google Scholar] [CrossRef]
  20. Zhao, N.; Yu, Y.; Wang, J.; Xie, Z.W.; Yang, Z.D.; Cheng, L. An extended object-oriented Petri net supporting the description and evolution of components: EOOPN. Clust. Comput. 2019, 22, 2701–2708. [Google Scholar] [CrossRef]
  21. Hu, H.; Yu, J.; Li, Z.; Chen, J.; Hu, H. Modeling and analysis of cyber–physical system based on object-oriented generalized stochastic Petri net. IEEE Trans. Reliab. 2021, 70, 1271–1285. [Google Scholar] [CrossRef]
  22. Padberg, J.; Urášek, M. Rule-based refinement of Petri nets: A Survey. In Petri Net Technology for Communication-Based SystemsEhrig; Reisig, H., Rozenberg, W., Weber, G.H., Eds.; Springer: Berlin/Heidelberg, Germany, 2023; pp. 161–196. [Google Scholar]
  23. Wang, S.; You, D.; Zhou, M.; Seatzu, C. Characterization of admissible marking sets in Petri nets with uncontrollable transitions. IEEE Trans. Autom. Control. 2016, 61, 1953–1958. [Google Scholar] [CrossRef]
  24. Bernardinello, L.; Kılınç, G.; Mangioni, E.; Pomello, L. Modeling distributed private key generation by composing Petri nets. In Transactions on Petri Nets and Other Models of Concurrency IX; Koutny, M., Haddad, S., Yakovlev, A., Eds.; Springer: Berlin/Heidelberg, Germany, 2014; pp. 19–40. [Google Scholar]
  25. Huang, H.; Cheung, T.-y.; Mak, W.M. Structure and behavior preservation by Petri-net-based refinements in system design. Theor. Comput. Sci. 2004, 328, 245–269. [Google Scholar] [CrossRef]
  26. Lakos, C.; Lewis, G. Incremental state space construction of colored Petri nets. In Proceedings of the International Conference on Application and Theory of Petri Nets, Virtual Event, 23–25 June 2021; Colom, J.-M., Koutny, M., Eds.; Springer: Berlin/Heidelberg, Germany, 2021; pp. 263–282. [Google Scholar]
  27. Van Hee, K.M.; Sidorova, N.; van der Werf, J.M. Business process modeling using Petri nets. In Transactions on Petri Nets and Other Models of Concurrency VII; Jensen, K., Koutny, M., Balbo, G., Wolf, K., Eds.; Springer: Berlin/Heidelberg, Germany, 2013; pp. 116–161. [Google Scholar]
  28. Mejía, G.; Niño, K.; Montoya, C.; Sánchez, M.A.; Palacios, J.; Amodeo, L. A Petri net based framework for realistic project management and scheduling: An application in animation and videogames. Comput. Oper. Res. 2016, 66, 190–198. [Google Scholar] [CrossRef]
Figure 1. An example of the PIRES+ model.
Figure 1. An example of the PIRES+ model.
Electronics 12 03977 g001
Figure 2. An example of the OOPIRES+ object subnet.
Figure 2. An example of the OOPIRES+ object subnet.
Electronics 12 03977 g002
Figure 3. Gateway refinement operation schematic diagram of the OOPIRES+ net system.
Figure 3. Gateway refinement operation schematic diagram of the OOPIRES+ net system.
Electronics 12 03977 g003
Figure 4. Abstract model OPN of the system.
Figure 4. Abstract model OPN of the system.
Electronics 12 03977 g004
Figure 5. The object subnet OPSN A .
Figure 5. The object subnet OPSN A .
Electronics 12 03977 g005
Figure 6. The object subnet OPSN AA .
Figure 6. The object subnet OPSN AA .
Electronics 12 03977 g006
Figure 7. The refined smart home remote control system OPN B .
Figure 7. The refined smart home remote control system OPN B .
Electronics 12 03977 g007
Figure 8. Verification result of liveness and boundedness of OPN .
Figure 8. Verification result of liveness and boundedness of OPN .
Electronics 12 03977 g008
Figure 9. Verification result of liveness and boundedness of OPN B .
Figure 9. Verification result of liveness and boundedness of OPN B .
Electronics 12 03977 g009
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Xia, C.; Qin, M.; Sun, Y.; Guo, M. Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems. Electronics 2023, 12, 3977. https://doi.org/10.3390/electronics12183977

AMA Style

Xia C, Qin M, Sun Y, Guo M. Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems. Electronics. 2023; 12(18):3977. https://doi.org/10.3390/electronics12183977

Chicago/Turabian Style

Xia, Chuanliang, Mengying Qin, Yan Sun, and Maibo Guo. 2023. "Property Analysis of Gateway Refinement of Object-Oriented Petri Net with Inhibitor-Arcs-Based Representation for Embedded Systems" Electronics 12, no. 18: 3977. https://doi.org/10.3390/electronics12183977

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop