Comparison of 2L + 2M and 6L SVPWM for Five-Phase Inverter to Reduce Common Mode Voltage

Abstract

Multiphase drives have received a lot of interest because of their several features over traditional three-phase systems for high-power applications. Pulse-width modulation (PWM) approaches are necessary to regulate the supply for multiphase ac drives. As a result, it is vital to continually improve the modulation and control approaches used to upgrade output power converters’ quality. This paper offers a comparative analysis of the 2L + 2M and 6L space vector pulse-width modulation (SVPWM) techniques applied to a five-phase two-level voltage source inverter (VSI) fed an inductive (R-L) load. The comparative evaluation is based on measuring the inverter switching losses, the total harmonic distortion (THD) values, and the common mode voltage (CMV) under different operation scenarios. A system model is carried out by MATLAB/Simulink. An experimental prototype is constructed in the lab to validate the theoretical analysis. Simulation results for the system based on the two SVPWM techniques are obtained at different modulation indices and different output frequencies and are confirmed by the experimental results. It has been found that the peak-to-peak CMV of the 6L method is 80% lower than that of the 2L + 2M method. Moreover, 6L SVPWM offers better DC-link utilization compared to 2L + 2M SVPWM.

1. Introduction

Multiphase power electronic converters and drive systems have recently gained popularity due to various benefits over typical three-phase systems for high-current/high-power applications [1,2]. The multiphase topologies of ac drives over three-phase systems, in particular, allow for amplitude reduction, a fault-tolerance capability, an increase in the torque-pulsation frequency, and a decrease in the rotor harmonic losses in electrical machines. As a result, the rating of the semiconductor switches in power electronic converters is reduced [3,4,5,6]. They are highly suited for abundant applications, including marine electric propulsion, electrical and hybrid vehicles, locomotive traction, aircrafts, wind electric systems, etc. [7,8,9,10]. However, in recent years, applications have been built on a five-phase approach [11,12,13]. Due to the recent increased growth in multiphase drive systems, it is necessary to continuously enhance the modulation and control approaches used to enhance the goodness of output power converters [14,15,16].

A two-level multiphase voltage source inverter (VSI) is the most common power electronic converter for these applications, without regard to the sort of ac machine or the number of machine phases [17]. However, the voltage quality and the total harmonic distortion (THD) of the output voltage of two-level VSIs is poor. Hence, many researchers present multilevel VSIs [18,19,20,21]. These multilevel VSIs showed a lower THD and a better voltage quality than conventional two-level VSIs. However, multilevel VSIs require more semiconductor switches than two-level VSIs besides the requirements of a complex control.

To manage the supply for the multiphase ac drives, adopting pulse-width modulation (PWM) techniques is required [22]. For multiphase voltage source inverters, a variety of PWM approaches are studied and described in the literature [22,23,24,25,26,27,28,29].

Different PWM algorithms inevitably result in different behaviors in terms of the performance metrics that may be utilized to create output sinusoidal waveforms, to minimize inverter switching losses, and to decrease the harmonic distortion. Several approaches have been considered for multiphase converters to generate the required sinusoidal output voltage. PWM techniques based on continuous carriers (CPWM) and continuous space vectors (SVPWM) were developed in [22,23]. These methods include sinusoidal PWM (SPWM), elimination of fifth harmonic SPWM, triangular zero-sequence elimination PWM, and four active space trajectory PWM. A comparison between the continuous CPWM and SVPMW techniques with respect to their similarities and distinctions was investigated in [24]. Discontinuous PWM techniques are also developed in [25,26] to be suitable for multiphase converters based on the two-large (2L) and the two-large and two-medium (2L + 2M) modulation techniques, and a comparison between the distinct continuous and discontinuous PWM schemes was reported in [29] based on the 2L + 2M and the four-large (4L) modulation approaches.

The majority of these methods are linked with modest common mode voltage values (CMV) and high dv/dt rates. This has major consequences for machine drives. It produces an increase in the bearing current in a motor drive, which damages the bearing and shortens the motor’s life. Furthermore, the CMV can exacerbate electromagnetic interference (EMI) problems. As a result, the system’s reliability suffers [20,30,31]. Therefore, it is essential to minimize the CMV level and dv/dt rates in the inverter circuit.

A wide range of physical and computer program methods have been offered to lower the CMV. Most physical techniques include filters or adding additional legs in inverter circuits, which make the structure bulkier and more expensive. The most popular method to minimize the CMV is software solutions using enhanced PWM techniques [32].

Different techniques are used to suppress the CMV, such as multicarrier SPWM, space vector modulation (SVM), shifting phase techniques, and model predictive control (MPC) [33,34,35,36]. However, the approaches described above result in an increased leakage current and system cost. Two-dimensional, three-dimensional, and four-dimensional SVM schemes were developed to reduce the CMV and obtain sinusoidal output voltage [37,38,39]. The controlled continuous and noncontinuous SVPWM methods were introduced in [40] to minimize the switching losses in a VSI fed five-phase induction motor drives. The six-large (6L) SVPWM technique was introduced in [41] to diminish the bearing current. Some of these methods increase the time calculation of switching. A modified SVPWM approach that reduces the CMV compared with conventional SVPWM was developed in [42]. However, the modified method increased the THD of both the phase voltage and current.

In general, with the different PWM approaches, SVPWM gives a better performance for all types of power converter circuits. In addition, SVPWM can perform significantly better than MPC in controlling a five-phase VSI fed a load without requiring knowledge of the load model. The majority of enhanced PWM methods are improved SVPWM approaches that use voltage vectors with a negligible CMV effect [43].

The 6L SVPWM technique was described in [41] with a single focus on the influence of the bearing current and shaft voltage. The comparison in [41] did not take into account the effect on the switching losses, the THD of the output current, and the output voltage. Furthermore, the comparison was performed at the unity modulation index. To establish a fair comparison between the 6L approach presented in [41] and the 2L + 2M method introduced in [29], a thorough comparison at various modulation indices and characteristics, such as the switching losses, THD, and CMV, must be performed.

This paper presents a comparative study of the 2L + 2M and 6L SVPWM techniques applied to a five-phase two-level VSI fed an inductive (R-L) load. In this study, the CMV, inverter switching, conduction, and total losses as well as the output voltage THD are used as measuring tools to investigate the performance of the studied SVPWM methods at different modulation index values and different output frequencies. Several simulation and experimental results of the 2L + 2M and 6L SVPWM techniques controlling a five-phase two-level VSI fed an R-L load at different modulation indices and different output frequency values are presented under different situations.

After the introduction section, this article is ordered as follows: Section 2 discusses the essentials of the 2L + 2M and 6L SVPWM techniques, and Section 3 and Section 4 introduce the simulation and experimental results, respectively. Finally, the conclusion is presented in Section 5.

2. PWM Techniques for a Five-Phase VSI

Two-level VSIs are widely utilized in motor drives to convert the DC input voltage to an AC output voltage with a controlled frequency and controlled ac voltage magnitudes using different PWM techniques.

Figure 1 shows a graphic representation of a two-level five-phase VSI. The top and bottom switches on each leg could not be closed at the same time, as this would shorten the DC supply. Each leg is represented by a one or a zero: one if the top switch is on and zero if the bottom switch is on. The five-phase VSI has 32 (2⁵) allowed switching voltage vectors for connecting the output load endings to the dc-link voltage. The switching voltage vectors are divided into ten zones, each extending the angle of the (π/5) radian in the α–β plane as illustrated in Figure 2. The thirty-two space vectors are split into thirty active vectors ($V_1-V_{30}$) and two null vectors $\left(V_{\mathrm{z}}\right)$. The active voltage vectors can be divided into three levels according to their voltage vector magnitude. The active and zero vectors and their magnitudes with respect to the DC-link voltage can be as follows: ten large vectors (0.6472$V_{DC})$, ten medium vectors (0.4$V_{DC}$), ten small vectors (0.2472$V_{DC})$, and two null vectors (0), respectively [40], where $V_{DC}$ is the average value of the DC-link voltage.

This section discusses two SVPWM techniques that use these voltage space vectors in different patterns to achieve the command sinusoidal output voltage.

2.1. 2L + 2M SVPWM Technique

In this method, two large and two medium voltage vectors are used with the zero vectors to achieve the command output voltage vector. The command output voltage vector ($V_o^{*}$) can be configured using the adjacent voltage vectors ($V_{\alpha } ,V_{\beta } , V_z$) as determined by Equation (1).

$$V_O^{*}=d_{\alpha }{V}_{\alpha }+d_{\beta }{V}_{\beta }+d_z{V}_z$$

(1)

The active- and zero-vector duty cycles ($d_{\alpha } ,d_{\beta } , d_z$) are calculated as in Equations (2)–(4).

$$d_{\alpha }=m_v.\sin \left(\frac{\pi }{5}-{\theta }_v\right)$$

(2)

$$d_{\beta }=m_v.\sin \left({\theta }_v\right)$$

(3)

$$d_z=1-d_{\alpha }-d_{\beta }$$

(4)

where$m_v$ represents the required output voltage modulation index value and ${\theta }_v$ is the angle of the command voltage vector within the actual decagon zone [44,45]. The highest value of the command voltage vector does not exceed 0.6155$V_{DC}$ [44,45]. The switching pattern of the 2L + 2M method uses the outer and intermediate vectors, which minimize the switching event number. Therefore, the corresponding large-, medium-, and zero-vector duty cycles in the α–β plane are as follows:

$$d_{\alpha l}=d_{\alpha }\frac{V_l}{V_l+V_m}$$

(5)

$$d_{\alpha m}=d_{\alpha }\frac{V_m}{V_l+V_m}$$

(6)

$$d_{\beta l}=d_{\beta }\frac{V_l}{V_l+V_m}$$

(7)

$$d_{\beta m}=d_{\beta }\frac{V_m}{V_l+V_m}$$

(8)

$$d_z=1-d_{\alpha l}-d_{\alpha m}-d_{\beta l}-d_{\beta m}$$

(9)

This subdivision devotes 61.8% of the whole active time to large vectors and 38.2% to medium vectors. As a result of this subdivision, the maximum value of the fundamental output voltage does not pass 0.5257$V_{DC}$ [44,45].

To reduce the count of switching, the switching pattern and space vector sequence for the approach employing 2L + 2M space vectors for the first zone are as those in Equation (10).

Table 1. The switching vectors of the 2L + 2M method for the inverter in all zones to reduce switching losses.

Sector No.	${\mathit{V}}_{\mathit{\alpha }\mathit{m}}$	${\mathit{V}}_{\mathit{\alpha }\mathit{l}}$	${\mathit{V}}_{\mathit{\beta }\mathit{m}}$	${\mathit{V}}_{\mathit{\beta }\mathit{l}}$	${\mathit{V}}_{\mathit{z}1}$	${\mathit{V}}_{\mathit{z}2}$
1	V11 (10000)	V1 (11001)	V12 (11101)	V2 (11000)	V31 (00000)	V32 (11111)
2	V13 (01000)	V2 (11000)	V12 (11101)	V3 (11100)
3	V13 (01000)	V4 (01100)	V14 (11110)	V3 (11100)
4	V15 (00100)	V4 (01100)	V14 (11110)	V5 (01110)
5	V15 (00100)	V6 (00110)	V16 (01111)	V5 (01110)
6	V17 (00010)	V6 (00110)	V16 (01111)	V7 (00111)
7	V17 (00010)	V8 (00011)	V18 (10111)	V7 (00111)
8	V19 (00001)	V8 (00011)	V18 (10111)	V9 (10011)
9	V19 (00001)	V10 (10001)	V20 (11011)	V9 (10011)
10	V11 (10000)	V10 (10001)	V20 (11011)	V1 (11001)

reveals the switching vectors that reduce the switching losses in diverse zones. The switching state V₁₅ (00100) in Table 1 signifies that inverter switches S₂, S₄, S₅, S₈, and S₁₀ are turned on, while switches S₁, S₃, S₆, S₇, and S₉ are turned off.

Figure 3 illustrates the switching pattern for the top switches of the five-phase VSI in the first zone. It is worth noting that just one of the top switches’ states will be altered among two side by side switching states.

$$\begin{gathered} 0.5 d_{z1}\to 0.5 d_{\alpha m}\to 0.5 d_{\beta l}\to 0.5 d_{\alpha l}\to 0.5 d_{\beta m}\to d_{z2}\to 0.5 d_{\beta m}\to 0.5 d_{\alpha l} \\ \to 0.5 d_{\beta l}\to 0.5 d_{\alpha m}\to 0.5 d_{z1} \end{gathered}$$

(10)

$$d_{z1}=d_{z2}=0.5 d_z$$

(11)

2.2. 6L SVPWM Technique

As previously indicated, each switching cycle must have a minimum of five vectors. More vectors might be employed, but the switching losses must be considered. The switching losses are relatively substantial in five large (5L) vectors. An extra vector may be added to maintain the switching losses at as low as is feasible. In each switching cycle, six neighboring large vectors with no zero vectors are employed. A cycle will include five switching events using 6L vectors, while 4L and 5L vectors will have switching counts of seven and six, respectively [41].

The switching pattern of the 6L method uses the outer vectors, which minimize the switching event number. If the vector group chosen is 9, 10, 1, 2, 3, and 4, as illustrated in Figure 4, the corresponding large-vector duty cycles in the α–β plane are as follows [41]:

$$d_9=0.5-\frac{\left(15+5 g_0\right) V_{\alpha }+\left(g_1+2 g_2\right) V_{\beta }}{2 V_{DC} g_1^{ 2}}$$

(12)

$$d_{10}=\frac{10 V_{\alpha }-\left(3 g_1+g_2\right) V_{\beta }}{V_{DC} g_1^{ 2}}$$

(13)

$$d_1=\frac{\left(5 g_0-5\right) V_{\alpha }+\left(g_1+2 g_2\right) V_{\beta }}{V_{DC} g_1^{ 2}}$$

(14)

$$d_2=\frac{10 V_{\alpha }+\left(g_1-3 g_2\right) V_{\beta }}{V_{DC} g_1^{ 2}}$$

(15)

$$d_3=\frac{\left(2 g_1+4 g_2\right) V_{\beta }}{V_{DC} g_1^{ 2}}$$

(16)

$$d_4=d_9$$

(17)

where the values of the three constants $g_0$, $g_1,$ and $g_2$ are $\sqrt{5}$,$4\mathit{sin}\left(2\pi ∕5\right)$, and $4\mathit{sin}\left(\pi ∕5\right)$, respectively.

The current sector for a reference voltage of magnitude $V_{ref}^{ *}$ and angle θ is given by Equation (18), where the ceil function rounds numbers towards positive infinity to the closest integer and the angle θ lies between 0 and $2\pi$.

The current voltage sector’s $V_{\alpha }$ and $V_{\beta }$ values could be determined as in Equations (19) and (20), respectively.

$$k=ceil\left(\theta ∕\frac{\pi }{5}\right)$$

(18)

$$V_{\alpha }=V_{ref}^{ *} cos \left(\theta -\left(k-1\right) \frac{\pi }{5}\right)$$

(19)

$$V_{\beta }=V_{ref}^{ *} sin \left(\theta -\left(k-1\right) \frac{\pi }{5}\right)$$

(20)

The switching pattern and space vector sequence for the approach employing 6L vectors for the first sector are as those in in Equation (21).

Table 2. The 6L switching vectors for the vector group chosen are 9, 10, 1, 2, 3, and 4.

Sector No.	V9	${\mathit{V}}_{10}$	${\mathit{V}}_1$	${\mathit{V}}_2$	${\mathit{V}}_3$	${\mathit{V}}_4$
1	10011	10001	11001	11000	11100	01100
2	10001	11001	11000	11100	01100	01110
3	11001	11000	11100	01100	01110	00110
4	11000	11100	01100	01110	00110	00111
5	11100	01100	01110	00110	00111	00011
6	01100	01110	00110	00111	00011	10011
7	01110	00110	00111	00011	10011	10001
8	00110	00111	00011	10011	10001	11001
9	00111	00011	10011	10001	11001	11000
10	00011	10011	10001	11001	11000	11100

illustrates the switching vectors that reduce the switching losses in different zones.

Figure 5 illustrates the switching pattern for the top switches of the five-phase VSI in the first zone for the approach employing 6L vectors. It is also noteworthy that, between two adjacent switching states, only one of the top switches’ conditions will be altered as stated in the 2L + 2M switching pattern.

$$\begin{gathered} 0.5 d_9\to 0.5 d_{10}\to 0.5 d_1\to 0.5 d_2\to 0.5 d_3\to d_4\to 0.5 d_3\to 0.5 d_2\to 0.5 d_1 \\ \to 0.5 d_{10}\to 0.5 d_9 \end{gathered}$$

(21)

3. Simulation Results

This part describes and compares the simulation results of the 2L + 2M and 6L SVPWM approaches of the five-phase inverter. The DC supply voltage is set to 100 V, and the switching frequency is 10 kHz, with a sampling time of 1 µs. An inductive load (R = 17 ohm, and L = 0.25 H) has been tied to the five-phase output terminals of the VSI. Figure 6 compares the CMV of the two SVPWM methods at the unity modulation index and a 50 Hz output frequency. This comparison shows that the peak-to-peak CMV of the 6L method is 80% lower than that of the 2L + 2M method. This reduces the shaft voltage and the bearing current in the case of the 6L method.

Figure 7 and Figure 8 show the simulation results of the phase and line voltages of the two SVPWM methods at the unity modulation index and a 50 Hz output frequency, respectively. A 72° phase shift between each phase has been observed in the two SVPWM methods with a 0.02 s time period. The voltage quality of the line and phase voltage is not good because the two PWM methods have been applied to the conventional five-phase two-level VSI. To enhance the voltage quality and to reduce the THD of the phase and line voltages, it is recommended to apply a multilevel VSI instead of a conventional two-level VSI as discussed in this paper.

Figure 9 indicates the output five-phase currents at the unity modulation index and a 50 Hz output frequency. It has been found that the peak value of the output current in the 6L method is greater than that in the 2L + 2M approach. This means that the 6L method offers better utilization of the DC link compared to the 2L + 2M method. Figure 10 displays the percent THD of the five-phase currents and the 50 Hz output frequency for two modulation indices, e.g., 1 and 0.5. The THD of the five-phase current is comparable between the two SVPWM methods.

Figure 11 compares the switching, conduction, and total losses of the inverter for the two SVPWM methods at the unity modulation index and a 50 Hz output frequency. The conduction losses in the 6L method are 78.66% higher than those in the 2L + 2M approach. This is because of the higher current and better DC-link utilization. The switching losses, which are the significant dominant part of the inverter loss, are nearly the same between the two SVPWM methods. The total losses of the 6L method are 3.8% higher than those of the 2L + 2M method.

Figure 12 shows the output five-phase currents at the unity modulation index and a 25 Hz output frequency. As has been found at a 50 Hz output frequency, the peak value of the output current in the 6L approach is greater than that in the 2L + 2M approach at a 25 Hz output frequency. This means that the 6L method offers better utilization of the DC link compared to the 2L + 2M method. Figure 13 shows the output line voltage at the unity modulation index and a 25 Hz output frequency.

4. Comparison of Experimental and Simulation Results

The experimental setup described in Figure 14 has been used to validate the simulation results of the two SVPWM methods. The previous section compared the simulation results of the two PWMs at a high switching frequency (10 kHz) and a lower sampling time step of 1 µs. This is to obtain accurate results for the comparison. However, the conditions of the simulation results introduced in the previous section (a 1 µs solver time step and a 10 kHz switching frequency) cannot be implemented in the experimental results. This is because of the capabilities of the DS pace and the computer processor. Hence, the comparison of the simulation results and the experimental results has been performed in this section at a 1 kHz switching frequency and a 50 µs sampling time. The performance of the two SVPWM methods has been experimentally examined at a 100 V DC supply and an inductive R-L load of 17 ohm, and 0.25 H has been connected to the five-phase inverter.

Figure 15 likens the experimental and the simulation results of the CMV of the two SVPWM methods at the unity modulation index and at a 50 Hz output frequency. The simulated and experimental results are very close, and the 6L method provides an 80% lower peak-to-peak value of the CMV as has been observed in the simulation results.

Figure 16 likens the experimental and the simulation results of the phase voltages of the 2L + 2M method at the unity modulation index and a 50 Hz output frequency. There is an acceptable match between the experimental and simulation results. Figure 17 compares the experimental and the simulation results of the phase voltages of the 6L approach at the unity modulation index and a 50 Hz output frequency. There has been an acceptable match between the experimental and simulation results. Figure 18 depicts the experimental and the simulation results of the phase voltages of the 2L + 2M method at the unity modulation index and a 50 Hz output frequency. There has been an acceptable match between the experimental and simulation results. Figure 19 introduces the experimental and the simulation results of the phase voltages of the 6L method at the unity modulation index and a 50 Hz output frequency. There has been an acceptable match between the experimental and simulation results. The voltage quality of the line and phase voltage is not good because the two PWM methods have been applied to the conventional five-phase two-level VSI. To enhance the voltage quality and reduce the THD of the phase and line voltages, it is recommended to apply a multilevel VSI instead of a conventional two-level VSI as discussed in [46,47,48,49].

Figure 20 shows the measured and the simulation results of the five-phase currents of the inverters of the two SVPWM methods at the unity modulation index and a 50 Hz output frequency. It has been found that the experimental results are comparable with the simulation results. Figure 21 shows the experimental and simulation results of the five-phase currents of the two SVPWM methods at the unity modulation index and a 25 Hz output frequency. There is an excellent match between the experimental and simulation results. The distortion in the currents in the simulation and experimental results in this section (Section 4) is higher compared to the simulation results in the previous section (Section 3) because of the lower switching frequency.

5. Conclusions

This study compares the 2L + 2M and 6L SVPWM algorithms applied to a five-phase two-level voltage source inverter fed by an inductive load. The comparison is based on testing the inverter switching losses, CMV, and THD values under various operation conditions. MATLAB/Simulink creates a system model. In the laboratory, an experimental model is produced to confirm the theoretical analysis. The simulation findings for the system based on the two SVPWM approaches are produced at different modulation indices and output frequencies and are validated by the experimental data. It was found that the peak-to-peak CMV of the 6L approach is 80% lower than that of the 2L + 2M method. Furthermore, 6L SVPWM outperforms 2L + 2M SVPWM in terms of DC-link utilization.