A Study on the Gap-Fill Process Deposited by the Deposition/Etch/Deposition Method in the Space-Divided PE-ALD System

Round 1

Reviewer 1 Report

The paper reported a deposition/etch/deposition (DED) method for forming aspect ratio trench isolation with void-free gap-fill. The etch and depotion parameters on the results were presented and discussed. The paper is helpful for fabrication trench structure. Some minor revision should be made as list below.

 

1.      The schematics of the DED system shown in Figure 1 is not clear. Please give a cross-sectional schematic of the system showing the whole system.

2.      The definition of the etch uniformity should be given. Also please give the method to How to measure the etch uniformity.

3.      In the TEM images please, please indicate the structure with different composition.

4.      Please check the format of the molecular formula in the paper. The numbers should be in subscript for the molecular formula.

5.      Line 280, the format of the equation should be improved.

6.      The writing of the paper needs to be improved. The descriptions are tedious. In the conclusion section please summarize the main results and significance of the study.

Author Response

1.Please see the attachment.

2.Etch uniformity refers to the consistency of etch rate across all regions of a wafer. The difference between the most advanced and least advanced etch sites can be calculated by dividing it by the sum. The calculation formula (1) is as follows.

Etch uniformity (%) = (max E.R.-min E.R.)/ (max E.R.+min E.R.)*100% ------- (1)

                                                            (E.R.=etch rate) 

In the case of bad etch uniformity, a difference in the thickness of film at the center and the edge will be made after etching, resulting in a difference in the characteristics of a device and ultimately leading to a lower yield in the manufacturing process. In this experiment, etch uniformity was calculated by averaging the etch rate of 49 points across all regions of a 12-inch wafer.

3.Please see the attachment.

4.Please see the attachment.

5.Please see the attachment.

6.Please see the attachment.

Author Response File: Author Response.doc

Reviewer 2 Report

Dear authors, the development of the Plasma-ALD process of SiO₂ using the deposition/etch/deposition technique and the described device is very intersting. However, the report needs some improvement and corrections in the characterization part. Please find my comments below:

Line 116-118:

1) How did you measure the density of your film? You claim that the density increases with increasing temperature but I cannot find a graph or study supporting it.

2) You claim that 500 °C reactor temperature is the maximum temperature that can be used without thermally decompose the precursor. Please mention a reference for it since I'm sure that at 500 °C DIPAS will decompose.

3) Was an ALD growth study performed to determine growth rate/cycle? What are pulse and purge times for DIPAS?

 

Line 166:

Which ions were used for SIMS analysis to sputter the thin film?

Line 189 - 191:

You show detailed spectra of Si and O but what is the ratio? Is it 1:2 for Si:O which it should be for SiO₂? Did you find any impurities with XPS like C, N, etc...?

Line 275:

Please improve the chapter for electrical characterization, you should make clear what is measured and which measurement leads to which result. Define the abbreviations MOSCAP and MIS.

Line 282 - 286:

What is the error of your measuring device? The difference in dielectric constant and Breakdown field is very minor! Please add error bars to figure 9b) How often did you measure?

 

Formatting things:

Line 244 Plat --> Flat?

Line 280-281: Make a real formula, not an image

Line 289-292: should belong to chapter 4.1.2?

Line 328: 60 nm?

Figure 1: The numbering/ordering is different on top view and bottom view. Please double check the meaning

Figure 9a): Add the contacts for measuring CV and IV characteristics and applying voltage.

 

 

Author Response

1.Please see the attachment.

2.Added related references.

The reason why the evaluation was conducted at 500℃ was that it was considered an appropriate temperature considering the process margin. This is not the maximum temperature that can be used.

• DIPAS Material Safety Data Sheet (MSDS)
• h. Kim, Journal of Korean Institute of Information Tech., 6, 25-30, (2014)
• J. Lee, D. W. Seo, J. W. Choi, JKPS, 79, 638-647 (2021).

3.This study was conducted using a space-divided ALD facility. In a space-divided ALD facility, the disk is constantly rotating during the process and the top lid divides the space by spraying source, reactant gas, and purge gas onto the divided area at the beginning of the process. The principle is that a material is deposited onto a rotating disk as it passes through the source, purge, reactant, and purge region in a sequence. In this study, the rotation of the disk was set at 60 rpm.

 : Increased productivity through

 - 60rpm=ALD 60cycles per minute, 1cycle time=1sec

4.The ion used for SIMS analysis is Cs.

5.Please see the attachment

6.Please see the attachment

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8.Please see the attachment

Author Response File: Author Response.doc

Reviewer 3 Report

The present work proposes an innovative method for the deposition of silicon oxide. A deposition process using deposition-etch-deposition in the spatial PEALD system is proposed. This is very relevant work for the semiconductor industry and will undoubtedly be highly appreciated by the entire community in the area. Overall the work is very well written and outlined. The system used in the process is very well-detailed and characterized. However, I believe that some improvements are needed. First, the Abstract and the Conclusion must be reformulated. But a crucial point for improving the work is the addition of more recent references on PEALD/PA-ALD, such as https://doi.org/10.3390/nano12193497.

After these minor modifications, the article can be published.

Author Response

1.The abstract and conclusion of the thesis have been rewritten. Reference added. (https://doi.org/10.3390/nano12193497)

2.

-Abstract

This study is in regard to the development of a gap-fill process technology for isolating trench patterns. There are various gap-filling techniques in the case of trench patterns; nevertheless, a processing technology adopting the DED (Dep/Etch/Dep) method was developed in this study. After the etch step, an Ar/O₂ (1: 2) plasma treatment technology reduced the residual amount of F in the films to 0.05%. By improving the etch uniformity, the deposition uniformity after the DED process on a 12-inch flat wafer was secured within <1%, and a high quality SiO₂ thin film with a dielectric constant of 3.97 and a breakdown field of 11.41MV/cm was fabricated. The DED method can be used for gap-filling even in patterns with a high aspect ratio by changing process parameters, such as RF power and division of etch steps, according to the shape, depth, and CD size of the pattern. This study confirmed that a void-free gap-fill process can be developed in a trench pattern with a maximum aspect ratio of 40:1.

3.

-Conclusion

In this study, a processing technology for depositing and gap-filling a SiO₂ thin film using the DED method was investigated. The gap-filling process was conducted by developing a space-divided PEALD facility, and a gap-filling process was developed to deposit void-free, insulating material in a trench pattern with an aspect ratio of 40:1 after confirming the basic characteristics of the DED process in a flat wafer. To reduce the in-film F concentration that may increase during the application of DED process, an Ar/O₂ plasma treatment technology was developed and the F concentration was reduced to 0.05%. An increase in the concentration of impurities such as F in films reduces various properties of the device. A MOCAP device was fabricated to identify potential reduction of electrical characteristics that may occur during device manufacturing process. Under the DED application conditions, the dielectric constant and breakdown field of the fabricated thin film were 3.97 and 11.89 MV/cm, respectively, similar to the SiO2 thin films deposited using the conventional method. Because the DED processing technology can be adjusted according to the shape, CD size, and depth of the pattern to be gap-filled, void-free gap-filling was achieved through RF power use and division of etch steps, even for patterns with a high aspect ratio. This study highlights the importance of applying appropriate solutions as the types of materials used and the required process development technologies are becoming increasingly diversified.

Author Response File: Author Response.doc

Round 2

Reviewer 2 Report

Dear Authors,

thanks for updating the manuscript, it has been improved a lot and can be considered for publication now.