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Micromachines
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Recent Advances in CMOS Devices and Applications
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Recent Advances in CMOS Devices and Applications

A special issue of Micromachines (ISSN 2072-666X). This special issue belongs to the section "D1: Semiconductor Devices".

Deadline for manuscript submissions: closed (15 January 2023) | Viewed by 5213

Special Issue Editor

Prof. Dr. Predrag Petrović

E-Mail Website
Guest Editor
Faculty of Technical Sciences, University of Kragujevac, Svetog Save 65, 32000 Čačak, Serbia
Interests: analog signal processing; current-processing; digital signal processing; power measurements; signal estimation

Special Issue Information

Dear Colleagues,

With the very intensive development of new active blocks in CMOS technology (primarily based on current processing) that is currently ongoing, a broad field is open to their application in the development of sensor circuits. These circuits in their dimensions and primarily their consumption, enable their long autonomy in operation, and thus offer platforms for the development of new or improved IoT devices and circuits. Of particular interest are CMOS circuits and systems that can provide independent operation through the use of new materials possessing generator abilities. All the aforementioned require the design of completely new and innovative circuits, as well as the training of algorithms for processing observed values: lighting, images, mechanical stress, force, distance, pressure, temperature, etc. Special attention should be paid to the development of new active blocks, or improving existing solutions, based on reducing the number of MOS transistors and their dimensions, in accordance with achievements in the development of new integrated technologies. We will prioritize papers describing the use of such circuits in the realization of circuits for the interface, filter, reference and control of both voltage and current sources. Contemporary sensory circuits require the use of specially adapted and designed digital processing circuits—a special communication protocol that must comply with currently standards in that field.

Prof. Dr. Predrag Petrović
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Micromachines is an international peer-reviewed open access monthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2600 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • analogue active block
  • current processing
  • sensor circuits and interfaces
  • IoT

Published Papers (2 papers)

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Research

21 pages, 8281 KiB  
Article
Novel Low Power Cross-Coupled FET-Based Sense Amplifier Design for High-Speed SRAM Circuits
by G. Lakshmi Priya, Puneet Saran, Shikhar Kumar Padhy, Prateek Agarwal, A. Andrew Roobert and L. Jerart Julus
Micromachines 2023, 14(3), 581; https://doi.org/10.3390/mi14030581 - 28 Feb 2023
Viewed by 3477
Abstract
We live in a technologically advanced society where we all use semiconductor chips in the majority of our gadgets, and the basic criterion concerning data storage and memory is a small footprint and low power consumption. SRAM is a very important part of [...] Read more.
We live in a technologically advanced society where we all use semiconductor chips in the majority of our gadgets, and the basic criterion concerning data storage and memory is a small footprint and low power consumption. SRAM is a very important part of this and can be used to meet all the above criteria. In this study, LTSpice software is used to come up with a high-performance sense amplifier circuit for low-power SRAM applications. Throughout this research, various power reduction approaches were explored, and the optimal solution has been implemented in our own modified SRAM design. In this article, the effect of power consumption and the reaction time of the suggested sense amplifier were also examined by adjusting the width-to-length (W/L) ratio of the transistor, the power supply, and the nanoscale technology. The exact amount of power used and the number of transistors required by different approaches to better comprehend the ideal technique are also provided. Our proposed design of a low-power sense amplifier has shown promising results, and we employ three variations of VLSI power reduction techniques to improve efficiency. Low-power SRAMs embrace the future of memory-centric neuromorphic computing applications. Full article
(This article belongs to the Special Issue Recent Advances in CMOS Devices and Applications)
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22 pages, 41785 KiB  
Article
A Wide-Bandwidth PVT-Reconfigurable CMOS Power Amplifier with an Integrated Tunable-Output Impedance Matching Network
by Selvakumar Mariappan, Jagadheswaran Rajendran, Narendra Kumar, Masuri Othman, Arokia Nathan, Andrei Grebennikov and Binboga S. Yarman
Micromachines 2023, 14(3), 530; https://doi.org/10.3390/mi14030530 - 24 Feb 2023
Cited by 1 | Viewed by 1449
Abstract
This paper proposes a wideband CMOS power amplifier (PA) with integrated digitally assisted wideband pre-distorter (DAWPD) and a transformer-integrated tunable-output impedance matching network. As a continuation of our previous research, which focused only on linearization tuning for wideband and PVT, this work emphasized [...] Read more.
This paper proposes a wideband CMOS power amplifier (PA) with integrated digitally assisted wideband pre-distorter (DAWPD) and a transformer-integrated tunable-output impedance matching network. As a continuation of our previous research, which focused only on linearization tuning for wideband and PVT, this work emphasized improving the maximum output power, gain and PAE across the PVT variations while maintaining the linearity for a wide frequency bandwidth of 1 GHz. The DAWPD is employed at the driver stage to realize a pre-distorting characteristic for wideband linearization. The addition of the tunable-output impedance matching technique in this work provides stable output power, PAE and gain across the PVT variations, through which it improves the design’s robustness, reliability and production yield. Fabricated in CMOS 130 nm with an 8-metal-layer process, the DAWPD-PA with tunable-output impedance matching can achieve an operating frequency bandwidth of 1 GHz from 1.7 to 2.7 GHz. The DAWPD-PA attained a maximum output power of 27 to 28 dBm with a peak PAE of 38.8 to 41.3%. The power gain achieved was 26.9 to 29.7 dB across the targeted frequencies. In addition, when measured with a 20 MHz LTE modulated signal, the DAWPD-PA achieved a linear output power and PAE of 24.0 to 25.1 dBm and 34.5 to 38.8% across the frequency, respectively. On top of that, in this study, the DAWPD-PA is proven to be resilient to process-voltage-temperature (PVT) variations, where it achieves stable performances via the utilization of the proposed tuning mechanisms, mainly contributed by the proposed transformer-integrated tunable-output impedance matching network. Full article
(This article belongs to the Special Issue Recent Advances in CMOS Devices and Applications)
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