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Electronics
Special Issues
Advanced Analog and Mixed-Mode Integrated Circuits
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Special Issue "Advanced Analog and Mixed-Mode Integrated Circuits"

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: 31 December 2023 | Viewed by 788

Special Issue Editor

Dr. Dražen Jurišić

E-Mail Website
Guest Editor
Faculty of Electrical Engineering and Computing, University of Zagreb, HR-10000 Zagreb, Croatia
Interests: fractional calculus; analysis methods for fractional order circuits; design methods for fractional order circuits; circuit theory; circuits and systems for signal processing; analog filters; analog integrated circuits; fault analysis in analog filters
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

The human–machine interface of most electronic systems has mainly remained analog and presumably always will. The importance of analog circuit theory and design in electrical engineering curricula has led to a worldwide shortage of analog circuit designers. However, in examples of modern electronic systems, which consist primarily of digital circuits, a so-called analog front end, characterized by analog input and output signals, must be present to interface with the outside world. The resulting system becomes a "mixed-mode" system in which digital and analog signals must interact optimally. The analog front end (AFE) is usually the bottleneck in many mixed-mode IC system chips (even though it occupies only a small portion of the chip area).

Therefore, the mission of this Special Issue is to strengthen further research in this vital area of mixed-mode signal processing and to fill the existing knowledge gaps in the field of advanced analog and mixed-mode integrated circuits.

Dr. Dražen Jurišić
Guest Editor

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2200 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • mixed-mode systems for signal processing
  • integrated circuits
  • analog front end
  • cadence

Published Papers (1 paper)

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Research

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Article
A Design of a Dual Delay Line DLL with Wide Input Duty Cycle Range
by
Binyu Qin
,
Leilei Zhao
,
Chenyu Fang
and
Peter Poechmueller
Electronics 2023, 12(12), 2696; https://doi.org/10.3390/electronics12122696 - 16 Jun 2023
Viewed by 614
Abstract
This article describes a dual-controller dual-delay line delay lock loop (DC-DL DLL). The proposed DLL adopted a dual delay line structure, each delay line was composed of a coarse adjustment and a fine adjustment unit, and the dual delay lines had corresponding control [...] Read more.
This article describes a dual-controller dual-delay line delay lock loop (DC-DL DLL). The proposed DLL adopted a dual delay line structure, each delay line was composed of a coarse adjustment and a fine adjustment unit, and the dual delay lines had corresponding control units to reduce the mismatch between the delay lines, and it avoided the complicated design of duty cycle correction (DCC) circuit. A frequency divider was added to divide the input clock to achieve a wider input clock duty cycle adjustment. Additionally, a simple clock synthesis circuit was proposed to synthesize the required clock. The DLL design used the 25 nm process with a voltage of 1.2 V. The simulation results showed that at a working frequency of 1.6 GHz, the peak-to-peak jitter of the DC-DL DLL after locking was approximately 17.61 ps, the maximum output duty cycle error was about 1.3%, and the input duty cycle ranged from 20% to 80%, with a power consumption of 10.06 mW. Full article
(This article belongs to the Special Issue Advanced Analog and Mixed-Mode Integrated Circuits)
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