Millimeter-Wave-Integrated CMOS Radars and Communication Systems: Architecture and Circuit Designs

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Circuit and Signal Processing".

Deadline for manuscript submissions: closed (30 June 2022) | Viewed by 8385

Special Issue Editors


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Guest Editor
Dipartimento di Ingegneria Elettrica Elettronica e Informatica (DIEEI), Università di Catania, 95125 Catania, Italy
Interests: radio frequency (RF) and millimeter wave (mm wave) integrated circuits/systems; integrated radars
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Guest Editor
RF Competence Center in Automotive Product Group, STMicroelectronics, Italy
Interests: radio frequency (RF) and millimeter wave (mm wave) integrated circuits/systems; integrated radars

Special Issue Information

Dear Colleagues,

In the 2000s, radar systems became available as standard equipment even for lower cost vehicles, thanks to the diversification of radar-based applications, which now include automatic emergency braking systems, adaptive cruise control, blind spot detection, intelligent parking assistance, forward collision warning, etc. Most modern commercial radars host their key functions in two chips: a microcontroller and a SiGe BiCMOS chip which drives the TX and RX antennas, and integrates all the RF functions, the ADC/DAC conversions, and the basic baseband functions. The Holy Grail for next generation automotive radars is the implementation of a system‑on‑chip (SoC) sensor in CMOS technology. Despite the great amount of research produced in the last ten years, most CMOS radar implementations are targeted only to short/medium range applications and are very far from proposing actual solutions for a long-range radar sensor. Technical problems are still present and mm-wave designers from academia and industry are working on these. This bottleneck is still represented by the implementation of a high-performance mm‑wave radio front-end. Research efforts are now being made to integrate all the sensors into CMOS technology, which will provide higher data processing capacity in the digital domain, lower power consumption, and costs. Since nanoscale CMOS is also able to cope with communication applications up to the mm-wave spectrum (e.g., 5G), this poses CMOS as the dominant process over BiCMOS in the next future.

This Special Issue will host the latest results in the field of integrated mm-wave CMOS ICs for radar and communication, with a focus on circuit design, architectures, component modelling, electromagnetic (EM) simulation, SoC integration, advanced package-to-chip co‑design, and antenna-to-chip co-design.

The topics of interest include, but are not limited to:

  • Mm-wave CMOS front-end circuits (LNAs, mixers, VGAs, T/R switches, amplifiers, filters, demodulators)
  • CMOS Oscillators and frequency synthesizers (VCOs, frequency dividers, multipliers, PLLs, charge pumps)
  • CMOS transmitters and power amplifiers for mm-wave applications
  • Integrated radar sensors
  • mm-wave communication circuits and systems-on-chip

Prof. Dr. Egidio Ragonese
Dr. Angelo Scuderi
Guest Editors

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Keywords

  • radar sensors
  • mm-wave CMOS ICs
  • CMOS power amplifiers
  • CMOS low noise amplifiers (LNA) mm-wave mixers
  • CMOS oscillators for mm-wave systems
  • radar transceivers
  • mm-wave antennas for integrated radars
  • mm-wave packaging

Published Papers (3 papers)

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Research

9 pages, 3226 KiB  
Article
A Compact Transformer-Based E-Band CMOS Power Amplifier with Enhanced Efficiencies of 15.6% PAE1dB and 6.5% PAE at 6 dB Power Back-Off
by Zhennan Wei, Fengyi Huang, Youming Zhang, Xusheng Tang and Nan Jiang
Electronics 2022, 11(11), 1679; https://doi.org/10.3390/electronics11111679 - 25 May 2022
Viewed by 1414
Abstract
This paper presents a compact E-band power amplifier (PA) implemented in a 40 nm CMOS process. The neutralization technique is adopted to improve reverse isolation, stability and power gain. The linearity of the PA is improved by operating the output stage in the [...] Read more.
This paper presents a compact E-band power amplifier (PA) implemented in a 40 nm CMOS process. The neutralization technique is adopted to improve reverse isolation, stability and power gain. The linearity of the PA is improved by operating the output stage in the deep class-AB region. Transformer-based matching networks (TMNs) are used for impedance transformation, and optimized for output power and efficiency. At 81 GHz, the presented PA achieves a maximum output 1 dB compressed power (P1dB) of 11.2 dBm and a saturated output power (Psat) of 12.7 dBm with 1 V supply. The power-added efficiencies at P1dB (PAE1dB) and 6 dB power back-off (PBO) are 15.6% and 6.5%, respectively. Full article
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9 pages, 2559 KiB  
Article
Two-Path 77-GHz PA in 28-nm FD-SOI CMOS for Automotive Radar Applications
by Claudio Nocera, Giuseppe Papotto and Giuseppe Palmisano
Electronics 2022, 11(8), 1289; https://doi.org/10.3390/electronics11081289 - 18 Apr 2022
Cited by 2 | Viewed by 2058
Abstract
This paper presents a 77 GHz two path power amplifier (PA) for automotive radar applications. It was fabricated in 28-nm fully depleted silicon-on-insulator CMOS technology, which provides transistors with a transition frequency of about 270 GHz and a general-purpose low cost back-end-of-line. The [...] Read more.
This paper presents a 77 GHz two path power amplifier (PA) for automotive radar applications. It was fabricated in 28-nm fully depleted silicon-on-insulator CMOS technology, which provides transistors with a transition frequency of about 270 GHz and a general-purpose low cost back-end-of-line. The proposed PA consists of a 50 Ω input buffer followed by two power units, which are made up of a current-reuse common source driver for improved efficiency and a stacked cascode power stage for enhanced output power. A peak detector was also embedded into the PA for output power monitoring. The designed PA achieved a saturated output power as high as 17.4 dBm at 77 GHz with an excellent power added efficiency of 19%, while drawing 150 mA from a 2 V power supply. The core die size was 500 μm × 300 μm. Full article
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9 pages, 3863 KiB  
Article
40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors
by Giorgio Maiellaro, Giovanni Caruso, Salvatore Scaccianoce, Mauro Giacomini and Angelo Scuderi
Electronics 2021, 10(17), 2114; https://doi.org/10.3390/electronics10172114 - 31 Aug 2021
Cited by 3 | Viewed by 3934
Abstract
This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on [...] Read more.
This paper presents a 40 GHz voltage-controlled oscillator (VCO) and frequency divider chain fabricated in STMicroelectronics 28 nm ultrathin body and box (UTBB) fully depleted silicon-on-insulator (FD-SOI) complementary metal-oxide–semiconductor (CMOS) process with eight metal layers back-end-of-line (BEOL) option. VCOs architecture is based on an LC-tank with p-type metal-oxide–semiconductor (PMOS) cross-coupled transistors. VCOs exhibit a tuning range (TR) of 3.5 GHz by exploiting two continuous frequency tuning bands selectable via a single control bit. The measured phase noise (PN) at 38 GHz carrier frequency is −94.3 and −118 dBc/Hz at 1 and 10 MHz frequency offset, respectively. The high-frequency dividers, from 40 to 5 GHz, are made using three static CMOS current-mode logic (CML) Master-Slave D-type Flip-Flop stages. The whole divider factor is 2048. A CMOS toggle flip-flop architecture working at 5 GHz was adopted for low frequency dividers. The power dissipation of the VCO core and frequency divider chain are 18 and 27.8 mW from 1.8 and 1 V supply voltages, respectively. Circuit functionality and performance were proved at three junction temperatures (i.e., −40, 25, and 125 °C) using a thermal chamber. Full article
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