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Electronics
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Design and Development of Digital Embedded Systems
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Design and Development of Digital Embedded Systems

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Systems & Control Engineering".

Deadline for manuscript submissions: 20 May 2024 | Viewed by 4202

Special Issue Editors

Dr. Mariano López-García

E-Mail Website
Guest Editor
Electronic Engineering Department, Universitat Politecnica de Catalunya, 08800 Vilanova i la Geltrú, Spain
Interests: biometrics; side-channel attacks; FPGA; embedded systems; crypto-processors
Special Issues, Collections and Topics in MDPI journals
Dr. Enrique Cantó Navarro

E-Mail Website
Guest Editor
Department of Electronic Engineering, Electrical and Automatics, Universitat Rovira i Virgili, 43007 Tarragona, Spain
Interests: algorithm acceleration; biometrics coprocessors; FPGA; embedded system
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

By combining both hardware and software programming techniques, digital embedded systems are able to perform a wide range of dedicated functions in real time. This interesting feature has led to these systems gaining popularity, since they are key components in electronic devices ranging from simple wearables or smartphones to more complex systems including medical equipment or robots. The aim of this Special Issue is to focus on the design of digital embedded systems, providing emphasis on those aspects related to design techniques, real-time systems, processors and applications.

Submissions for this Special Issue on “Design and Development of Digital Embedded Systems” are welcome on any scope related, but not limited, to the following areas:

  • Embedded systems applied to cryptography, biometrics, neural networks, artificial intelligence, signal processing and security.
  • Implementations of embedded systems on FPGA.
  • Hardware/software co-design techniques and applications.
  • Real-time systems.
  • Processor specific applications.
  • Industrial applications.
  • Embedded systems and emerging technologies.

Dr. Mariano López-García
Dr. Enrique Cantó Navarro
Guest Editors

Manuscript Submission Information

Manuscripts should be submitted online at www.mdpi.com by registering and logging in to this website. Once you are registered, click here to go to the submission form. Manuscripts can be submitted until the deadline. All submissions that pass pre-check are peer-reviewed. Accepted papers will be published continuously in the journal (as soon as accepted) and will be listed together on the special issue website. Research articles, review articles as well as short communications are invited. For planned papers, a title and short abstract (about 100 words) can be sent to the Editorial Office for announcement on this website.

Submitted manuscripts should not have been published previously, nor be under consideration for publication elsewhere (except conference proceedings papers). All manuscripts are thoroughly refereed through a single-blind peer-review process. A guide for authors and other relevant information for submission of manuscripts is available on the Instructions for Authors page. Electronics is an international peer-reviewed open access semimonthly journal published by MDPI.

Please visit the Instructions for Authors page before submitting a manuscript. The Article Processing Charge (APC) for publication in this open access journal is 2400 CHF (Swiss Francs). Submitted papers should be well formatted and use good English. Authors may use MDPI's English editing service prior to publication or during author revisions.

Keywords

  • embedded systems
  • hardware/software co-design
  • real-time systems
  • processors

Published Papers (5 papers)

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Research

19 pages, 836 KiB  
Article
Interrupt Latency Accurate Measurement in Multiprocessing Embedded Systems by Means of a Dedicated Circuit
by Sara Alonso, Leire Muguira, José Ignacio Garate, Carlos Cuadrado and Unai Bidarte
Electronics 2024, 13(9), 1626; https://doi.org/10.3390/electronics13091626 - 24 Apr 2024
Viewed by 242
Abstract
Modern multiprocessing embedded applications require, in many cases, two different environments on the same platform: one that meets real-time requirements and another one with a general purpose operating system. Although several technologies can be used, two of the most popular are virtualization based [...] Read more.
Modern multiprocessing embedded applications require, in many cases, two different environments on the same platform: one that meets real-time requirements and another one with a general purpose operating system. Although several technologies can be used, two of the most popular are virtualization based on hypervisors and asymmetric multiprocessing software. However, using these tools introduces latency, which must be measured to verify compliance with real-time requirements. With the aim of facilitating these measurements, this work provides a hardware tool that is more precise and easier to use than other existing software solutions. The paper also studies the interrupt latency generated by different hypervisors and asymmetric multiprocessing frameworks in a Zynq UltraScale+ platform. This research work facilitates the accurate study of the temporal response of multiprocessor embedded systems, which allows for evaluating their suitability for applications with real-time requirements. Full article
(This article belongs to the Special Issue Design and Development of Digital Embedded Systems)
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16 pages, 5555 KiB  
Article
Implementation of EnDat Interface Master Using Configurable Logic Block in MCU
by Kyungah Kim, Duc M. Tran and Joon-Young Choi
Electronics 2024, 13(6), 1101; https://doi.org/10.3390/electronics13061101 - 17 Mar 2024
Viewed by 487
Abstract
In this study, we propose an implementation method of the Encoder Data (EnDat) interface master for slave encoders using only a configurable logic block (CLB) and a serial peripheral interface (SPI) integrated into microcontroller units. By programming the CLB device to execute logic [...] Read more.
In this study, we propose an implementation method of the Encoder Data (EnDat) interface master for slave encoders using only a configurable logic block (CLB) and a serial peripheral interface (SPI) integrated into microcontroller units. By programming the CLB device to execute logic functions and finite state machines designed for the EnDat interface master operation, we realize the EnDat and SPI clocks that are required for the EnDat interface master operation. This approach is cost-efficient because additional hardware components, such as a field-programmable gate array or a complex programmable logic device, are unnecessary for the master implementation. We build a one-axis feed drive system that is powered by an AC motor and equipped with an EnDat linear encoder for measuring table speed and position. By performing various experiments for table position and speed control based on the built feed drive system, we verify the performance and practical usefulness of the implemented EnDat interface master. The maximum EnDat clock frequency without the propagation delay compensation is achieved by 2 MHz, which can cope with 16 kHz control cycle frequency. The usefulness is demonstrated by showing the table speed and position control performance that are acceptable in real applications. Full article
(This article belongs to the Special Issue Design and Development of Digital Embedded Systems)
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26 pages, 628 KiB  
Article
How Shifting Focus from Register to Data Functionality Can Enhance Register and Bus Management
by Michał Kruszewski
Electronics 2024, 13(4), 719; https://doi.org/10.3390/electronics13040719 - 09 Feb 2024
Viewed by 816
Abstract
Bus and register management is one of the crucial aspects of application-specific integrated circuit-, system-on-chip-, or field-programmable gate array-based designs. The problems related to it are well known, and multiple tools or approaches are already trying to solve or mitigate them. However, all [...] Read more.
Bus and register management is one of the crucial aspects of application-specific integrated circuit-, system-on-chip-, or field-programmable gate array-based designs. The problems related to it are well known, and multiple tools or approaches are already trying to solve or mitigate them. However, all available solutions share the same register-centric paradigm. A user defines registers and then manually lays out the data into the registers. Such an approach has its limitations. A description does not contain information on data spanning multiple registers or data forming a broader context, for example, procedure arguments. It also does not contain information on the purpose of the data. As a result, the generated access code is low-level and usually needs an extra wrapper, which leaves room for potential human mistakes. For instance, it is the user’s responsibility to guarantee proper access order to registers or to provide an atomic change of data wider than a single register width. This article proposes a new approach, the functionality-centric approach. In the functionality-centric approach, the user defines the data with the type of their functionality. The registers and bus hierarchy are later implicitly inferred. By defining the functionality of the data placed in the registers, it is possible to generate more access code, increase code robustness, improve system design readability, and shorten the implementation process. Full article
(This article belongs to the Special Issue Design and Development of Digital Embedded Systems)
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15 pages, 1169 KiB  
Article
A Hardware Realization Framework for Fuzzy Inference System Optimization
by Saeid Gorgin, Mohammad Sina Karvandi, Somaye Moghari, Mohammad K. Fallah and Jeong-A Lee
Electronics 2024, 13(4), 690; https://doi.org/10.3390/electronics13040690 - 08 Feb 2024
Viewed by 535
Abstract
Fuzzy inference systems (FISs) are a key focus for decision-making in embedded systems due to their effectiveness in managing uncertainty and non-linearity. This study demonstrates that optimizing FIS hardware enhances performance, efficiency, and capabilities, improving user experience, heightened productivity, and cost savings. We [...] Read more.
Fuzzy inference systems (FISs) are a key focus for decision-making in embedded systems due to their effectiveness in managing uncertainty and non-linearity. This study demonstrates that optimizing FIS hardware enhances performance, efficiency, and capabilities, improving user experience, heightened productivity, and cost savings. We propose an ultra-low power FIS hardware framework to address power constraints in embedded systems. This framework supports optimizations for conventional arithmetic and Most Significant Digit First (MSDF) computing, ensuring compatibility with MSDF-based sensors. Within the MSDF-computing FIS, fuzzification, inference, and defuzzification processes occur on serially incoming data bits. To illustrate the framework’s efficiency, we implemented it using MATLAB, Chisel3, and Vivado, starting from high-level FIS descriptions and progressing to hardware synthesis. A Scala library in Chisel3 was developed to connect these tools seamlessly, facilitating design space exploration at the arithmetic level. We applied the framework by realizing an FIS for autonomous mobile robot navigation in unknown environments. The synthesis results highlight the superiority of our designs over the MATLAB HDL code generator, achieving a 43% higher clock frequency, and 46% and 67% lower resource and power consumption, respectively. Full article
(This article belongs to the Special Issue Design and Development of Digital Embedded Systems)
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22 pages, 9232 KiB  
Article
FPGA-Based Optimization of Industrial Numerical Machine Tool Servo Drives
by Andrzej Przybył
Electronics 2023, 12(17), 3585; https://doi.org/10.3390/electronics12173585 - 24 Aug 2023
Cited by 1 | Viewed by 1470
Abstract
This paper presents an analysis of the advantages stemming from the application of field-programmable gate arrays (FPGAs) in servo drives used within the control systems of industrial numerical machine tools. The method of improving the control system that allows for increasing the precision [...] Read more.
This paper presents an analysis of the advantages stemming from the application of field-programmable gate arrays (FPGAs) in servo drives used within the control systems of industrial numerical machine tools. The method of improving the control system that allows for increasing the precision of machining, as well as incorporating new functionalities and streamlining diagnostic processes, is described. As demonstrated, the utilization of digital controllers with robust computational power and high-performance real-time communication interfaces is essential for achieving these objectives. This study underscores the limitations of commonly employed digital controllers in servo drives, which are constructed based on microcontrollers or signal processors collaborating with application-specific integrated circuits (ASICs). In contrast, the proposed FPGA-based solution offers substantial computational power and significantly reduced latencies in the real-time communication interface compared to other examined alternatives. This enables the realization of the planned objectives, specifically the enhancement of technical parameters and diagnostic capabilities of machine tools. Furthermore, the research indicates that FPGA-based digital controllers exhibit relatively low power consumption and a simplified design of the electronic printed circuit board in comparison to other analyzed digital platforms. These features can contribute to heightened reliability and diminished production costs of such controllers. Additional conclusions drawn from the study indicate that FPGA-based controllers provide greater developmental possibilities and their production is marked by potential resilience to challenges associated with the availability of electronic components in the market. Full article
(This article belongs to the Special Issue Design and Development of Digital Embedded Systems)
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