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Chips, Volume 2, Issue 4 (December 2023) – 3 articles

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17 pages, 3872 KiB  
Review
Winner-Take-All and Loser-Take-All Circuits: Architectures, Applications and Analytical Comparison
by Ehsan Rahiminejad and Hamed Aminzadeh
Chips 2023, 2(4), 262-278; https://doi.org/10.3390/chips2040016 - 08 Nov 2023
Viewed by 935
Abstract
Different winner-take-all (WTA) and loser-take-all (LTA) circuits are studied, and their operations are analyzed in this review. The exclusive operation of the current conveyor, binary tree, and time-domain WTA/LTA architectures, as the most important architectures reported in the literature, are compared from the [...] Read more.
Different winner-take-all (WTA) and loser-take-all (LTA) circuits are studied, and their operations are analyzed in this review. The exclusive operation of the current conveyor, binary tree, and time-domain WTA/LTA architectures, as the most important architectures reported in the literature, are compared from the perspectives of power consumption, speed, and precision. Full article
(This article belongs to the Special Issue State-of-the-Art in Integrated Circuit Design)
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19 pages, 568 KiB  
Article
A Survey of Automotive Radar and Lidar Signal Processing and Architectures
by Luigi Giuffrida, Guido Masera and Maurizio Martina
Chips 2023, 2(4), 243-261; https://doi.org/10.3390/chips2040015 - 08 Oct 2023
Viewed by 2447
Abstract
In recent years, the development of Advanced Driver-Assistance Systems (ADASs) is driving the need for more reliable and precise on-vehicle sensing. Radar and lidar are crucial in this framework, since they allow sensing of vehicle’s surroundings. In such a scenario, it is necessary [...] Read more.
In recent years, the development of Advanced Driver-Assistance Systems (ADASs) is driving the need for more reliable and precise on-vehicle sensing. Radar and lidar are crucial in this framework, since they allow sensing of vehicle’s surroundings. In such a scenario, it is necessary to master these sensing systems, and knowing their similarities and differences is important. Due to ADAS’s intrinsic real-time performance requirements, it is almost mandatory to be aware of the processing algorithms required by radar and lidar to understand what can be optimized and what actions can be taken to approach the real-time requirement. This review aims to present state-of-the-art radar and lidar technology, mainly focusing on modulation schemes and imaging systems, highlighting their weaknesses and strengths. Then, an overview of the sensor data processing algorithms is provided, with some considerations on what type of algorithms can be accelerated in hardware, pointing to some implementations from the literature. In conclusion, the basic concepts of sensor fusion are presented, and a comparison between radar and lidar is performed. Full article
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20 pages, 736 KiB  
Article
Design and Performance Analysis of Hardware Realization of 3GPP Physical Layer for 5G Cell Search
by Khalid Lodhi, Jayant Chhillar, Sumit J. Darak and Divisha Sharma
Chips 2023, 2(4), 223-242; https://doi.org/10.3390/chips2040014 - 07 Oct 2023
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Abstract
5G Cell Search (CS) is the first step for user equipment (UE) to initiate communication with the 5G node B (gNB) every time it is powered ON. In cellular networks, CS is accomplished via synchronization signals (SS) broadcasted by gNB. 5G 3rd generation [...] Read more.
5G Cell Search (CS) is the first step for user equipment (UE) to initiate communication with the 5G node B (gNB) every time it is powered ON. In cellular networks, CS is accomplished via synchronization signals (SS) broadcasted by gNB. 5G 3rd generation partnership project (3GPP) specifications offer a detailed discussion on the SS generation at gNB, but a limited understanding of their blind search and detection is available. Unlike 4G, 5G SS may not be transmitted at the center of carrier frequency, and their frequency location is unknown to UE. In this work, we demonstrate the 5G CS by designing 3GPP compatible hardware realization of the physical layer (PHY) of the gNB transmitter and UE receiver. The proposed SS detection explores a novel down-sampling approach resulting in a 60% reduction in on-chip memory and 50% lower search time. Via detailed performance analysis, we analyze the functional correctness, computational complexity, and latency of the proposed approach for different word lengths, signal-to-noise ratio (SNR), and down-sampling factors. We demonstrate end-to-end 5G CS using GNU Radio-based RFNoC framework on the USRP-FPGA platform and achieve 66% faster SS search compared to software. The 3GPP compatibility and demonstration on hardware strengthen the commercial significance of the proposed work. Full article
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