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Review

Advances in Modeling and Suppression Methods of EMI in Power Electronic Converters of Third-Generation Semiconductor Devices

1
National Rail Transit Electrification and Automation Engineering Technique Research Center, Southwest Jiaotong University, Chengdu 611756, China
2
School of Electrical and Electronic Engineering, Harbin University of Science and Technology, Harbin 150080, China
3
Beijing Sinohytec Co., Ltd., Beijing 100084, China
4
State Key Laboratory of Automotive Safety and Energy, Tsinghua University, Beijing 100084, China
5
Department of Electrical Engineering Complexes, Novosibirsk State Technical University, Novosibirsk 630073, Russia
6
School of Mechanical Engineering, University of Science and Technology Beijing, Beijing 100083, China
7
Shunde Innovation School, University of Science and Technology Beijing, Foshan 528399, China
*
Authors to whom correspondence should be addressed.
Electronics 2023, 12(11), 2348; https://doi.org/10.3390/electronics12112348
Submission received: 25 March 2023 / Revised: 16 May 2023 / Accepted: 20 May 2023 / Published: 23 May 2023

Abstract

:
With the development of high-frequency, miniaturized, and lightweight power electronic devices, third-generation semiconductor devices are more and more used in the main circuits of power electronic converters. The electromagnetic interference (EMI) generated by their fast switching can affect the performance of power electronic converters. Therefore, it is necessary to investigate the modeling and suppression methods of conducted noise in power electronic converters of third-generation semiconductor devices. This paper describes the EMI sources and coupling paths of EMI in third-generation semiconductor devices used in power electronic converters. The modeling methods of EMI are summarized from the perspectives of power devices and coupling paths. The suppression methods of conducted noise are summarized by suppressing EMI sources and improving coupling path characteristics. This paper provides a reference for the electromagnetic compatibility design of power electronic converters for third-generation semiconductor devices.

1. Introduction

Traditional power electronic converters use semiconductor devices represented by silicon to realize energy conversion, but such devices have issues such as large loss, large volume, slow switching speed, and poor voltage and current resistance [1]. Therefore, power electronic devices composed of first-generation semiconductor devices have the issues of low conversion efficiency, large volume, and low operating frequency [2].
The third-generation semiconductor devices composed of silicon carbide (SiC) and gallium nitride (GaN) have higher blocking voltages, higher operating temperatures, and higher switching speeds than Si-based power electronic devices [3]. Taking a standard SiC device as an example, it is noteworthy that its blocking voltage is one order of magnitude higher than that of a Si device, its drift layer is thinner, its on-resistance is lower, there is no bipolar charge storage mechanism in it, and its switching dynamic behavior is greatly improved [4]. Compared with Si devices, SiC devices can reduce switching losses by 70% at the same switching voltage change rate. When third-generation semiconductor devices are used in new energy systems, their low loss characteristics can reduce the volume and weight of heat dissipation systems, and their high switching frequency characteristics can reduce the volumes and weights of passive devices. Therefore, third-generation semiconductor devices further promote the trend of high frequency usage and miniaturization in power electronics, and further improve the performance of power converters, which are considered to be the key driving forces for “carbon peak and carbon neutralization”.
The third generation of semiconductors can greatly improve operating frequency, reduce the volumes of devices and radiators, and increase power density in converters [5]. However, it must be noted that the high-frequency switching device is the main high-frequency noise source in a converter. The switching device generates electromagnetic interference (EMI) through the capacitive loop formed between the insulating sheet, the radiator, and the ground, bringing threats to the stable operation of the new energy system [6]. Therefore, the questions of how to improve the performance of third-generation semiconductor devices, reduce EMI caused by high switching frequency, and improve the electromagnetic compatibility of these systems have become the focuses of recent research.
This paper analyzes the EMI sources and coupling paths used in the third-generation semiconductor devices within power electronic devices. The EMI measurement and modeling methods used on third-generation semiconductor devices are reviewed. On this basis, the methods of suppressing EMI are summarized.
The structure of this paper is as follows. Section 2 analyzes the EMI mechanism and testing and analysis methods used on third-generation semiconductor devices in power electronic devices. Section 3 summarizes the methods of EMI modeling. Section 4 summarizes the EMI suppression methods. In Section 5, the electromagnetic compatibility research on power electronic devices is explored.

2. EMI Mechanism and Testing and Analysis Methods Used on Third-Generation Semiconductor Devices

2.1. The Generation Mechanism and Coupling Path of EMI

The EMI caused by third-generation semiconductor devices is mainly concentrated in two aspects, noise sources and coupling paths, as shown in Figure 1.

2.1.1. The Generation Mechanism of EMI Source

The high dv/dt caused by the high-frequency switching of a third-generation semiconductor device is the main source of EMI in a power electronic device. In addition, the parasitic capacitors between the ports and the loop stray inductors during the switching can cause the high-frequency oscillation of the gate source at high/low levels, as shown in Figure 2 [7].In these capacitors, the high-frequency oscillation accounts for a small proportion when the gate-source is at high or low level, and the dv/dt of the switching device is the main source of EMI.
In their study on EMI sources, Zhang et al. [8] pointed out that the fast-switching speed, high switching frequency, and ringing of SiC devices will increase the spectrum of EMI sources. Because SiC devices have a higher switching speed, higher switching frequency, and higher ringing than Si devices, the EMI noise generated by SiC devices will be higher than that generated by Si devices. Han et al. [9] analyzed the influence of third-generation semiconductor devices on the conducted noise characteristics of a system when applied in three-phase inverters. It was found that the high switching speed characteristic mainly affected the conducted noise in the high-frequency band of the system, and that the high switching frequency characteristic would improve the EMI in the whole conducted noise band. Wen and Dalal et al. [10,11] pointed out that the displacement current may be increased by several orders of magnitude due to the fast-switching transient and increased voltage amplitude of SiC MOSFET. When the displacement current is equivalent to the rated current of SiC MOSFET, the EMI and switching loss performance of the converter will be seriously deteriorated.

2.1.2. Propagation Characteristics and Coupling Path Analysis

The EMI of third-generation semiconductor devices is not only related to the switching behavior of power devices, but is also related to the parasitic coupling paths of power electronic devices. The peak of the EMI test spectrum usually comes from coupling path impedance resonance. The impedance characteristics of the coupling path are related to the circuit topology, grounding mode, and impedance characteristics of the system devices. Third-generation semiconductor devices do not change the EMI coupling path impedance characteristics of converter systems. Therefore, the analysis of the converter coupling path is still based on the analysis method used on first-generation semiconductors in power electronic devices. Based on the different EMI coupling channels, EMI is usually divided into common mode (CM) noise and differential mode (DM) noise, which correspond to the CM EMI coupling path and DM EMI coupling path, respectively.
CM noise is mainly formed by the interaction between the instantaneous dv/dt during the switching process and the parasitic capacitance inside a system. The parasitic capacitors in the system are mainly composed of the power source, the cable from the new energy system to the ground, and the radiator from the power electronic device to the ground. At the moment the switch turns on or turns off, dv/dt will act on the parasitic capacitors in the system to generate a large charge and discharge current, forming a CM current, and its flow path will flow through the ground and ground capacitors. A schematic diagram of this process is shown in Figure 3.
The DM noise of a power electronic device is formed by the interaction between the di/dt generated during the turn-on and turn-off processes and the stray inductors in the system. The stray inductors in the system mainly include the parasitic inductors of the pin, the inductors of the cable, etc. A diagram of the coupling path is shown in Figure 4.
As part of the research on coupling paths in power electronic devices that use third-generation semiconductors, Xie and Han [12,13] analyzed the coupling path impedance characteristics of SiC devices in Buck and Boost converters by using the transfer function method. The transfer function analysis method does not need to simplify a coupling path into CM and DM equivalent circuits. Instead, the node current equation and loop voltage equation are used on the equivalent circuit of the coupling path to analyze the impact of the transfer function characteristics of the EMI noise source of the converter system on CM and DM noise. Marlier et al. [14] used two equivalent models and a defined switching function to analyze the EMI coupling path in a system. The final results could be obtained by calculating the convolution of the switching function and the discrete results of each equivalent model. However, these studies were carried out at the system level, and the influence of the parasitic parameters of wide-bandgap devices on EMI cannot be analyzed from the perspective of packaging. Jia et al. [15] studied the influence of switching frequency, switching speed, and switching ringing on the conducted CM noise of a SiC electric vehicle powertrain. In the low-frequency band, the CM noise of the studied system increased significantly with an increase in the switching frequency. The switch ringing mainly affected the CM noise spectrum in the high-frequency band.

2.2. Analysis Method of Conducted Noise Characteristics of Third-Generation Semiconductor Devices

The noises of third-generation semiconductor devices mainly include conduction noise and radiation noise. This paper mainly discusses conduction noise. Conductive noise research focuses on two aspects of test methods and analysis, as shown in Figure 5.

2.2.1. Conducted Noise Test Methods

A typical conduction test platform mainly includes the following: a Line Impedance Stabilization Network (Line Impedance Stabilization Network, LISN), spectrum analyzer, impedance analyzer, and EMI voltage/current probe. The test platform structure of a typical electric drive system is shown in Figure 6.
Within research on the EMI test platform and methods, Adamowicz et al. [16] proposed a test technology to characterize and extract parameters of ferrite EMI suppressors by using vector network analyzers and micro-strip test fixtures. The extracted EMI suppressor parameters in their study were compared with the data table values. Bandara et al. [17] investigated CM- and DM-conducted emissions without using a LISN. Using the switching power source as the device under test, the CM and DM impedances of the actual measurement device, with and without a LISN, were extracted; the study results better illustrated the influence of LISNs. Li. et al. [18] extracted the online impedance of an electrical system by treating their inductively coupled probe and the monitored electrical system as three cascaded two-port networks. Their method simplified the setting and calibration process, and could monitor the real-time impedance of the key electrical system in the study without interrupting the normal operation of the system, providing convenience for EMI research. Aiello et al. [19] studied the EMI sensitivity of a Hall effect current sensor, and compared the EMI stability of this non-contact device with that of the resistive current sensing method. The measurement results showed that the Hall effect current sensor was more affected by EMI than the resistive current sensing method. Lemmon et al. [20] created a specially designed hardware platform for evaluating the EMI behaviors of high-power systems based on third-generation semiconductor devices using custom metrics, providing a reference for the development of peripheral structures and the design of EMI mitigation components in future research.

2.2.2. Conducted Noise Analysis Methods

Conducted noise analysis methods for power electronic devices are mainly divided into two types: the time domain analysis method and the frequency domain analysis method. Conducted noise modeling can be done in PSpice and Saber. Both analysis methods require the modeling of EMI interference sources and EMI coupling paths, with the main difference between the two being in the modeling of EMI interference sources. The time domain analysis method focuses on using a detailed physical model and conducting the time domain waveform analysis of all devices [21]. Li et al. [22] compared the experimental results of time domain analysis and frequency domain analysis. The results showed that both methods were effective as long as the modeling was appropriate. However, with the increasing demand for computing resources and simulation time, the frequency domain analysis method is recommended as the preferred method for EMI analysis. The specific discussion of this topic is covered in Section 3.2.

2.3. The Effect of Temperature on EMI

Among wide-bandgap semiconductor materials, SiC has a much wider bandgap than Si and can handle higher voltages and faster switching speeds and show better efficiency [23]. On the other hand, GaN is particularly attractive for high-pressure, high-temperature, and high-pressure applications due to its higher electric field breakdown capability, good thermal conductivity, and high electron mobility [24]. The performances of wide-bandgap materials with Si are compared in Table 1 [25].
With the diversification of the working environment, researchers have been considering the influence of environmental factors on the circuit. The concept of electromagnetic robustness of chips was proposed by Ben in 2009 [26]. This researcher combined the problem of electromagnetic capacitance with the problem of semiconductor reliability. A microprocessor chip was subjected to experiments on high and low temperature aging and hot carrier injection. The relationships between negative bias, temperature instability, and hot carrier injection, caused by aging and the electromagnetic compatibility performance of the chip, were studied. Fernandez et al. [27] concluded that the electromagnetic sensitivity of CMOS was affected by negative-bias temperature instability. The mechanism by which electromagnetic interference and thermal stress affect semiconductor devices was explained in their paper. Dienot et al. [28] tested the PWM generation circuit and verified the effect of the combined stress of electromagnetism and heat on the function of the circuit. Wang et al. [29] proposed an efficient finite-difference time-domain (FDTD) algorithm for studying the frequency- and temperature-dependent characteristics of some graphene-based structures, with the auxiliary differential equation FDTD method and its conformal modification technique integrated together for handling atomically thin and electrically dispersive periodic geometries.

3. EMI Modeling Method

3.1. EMI Modeling Process

The basic process of conducting EMI modeling is as follows. (1) The circuit topology principle of the converter is clarified and the function of the converter is analyzed. (2) The high-frequency model of the component is established and the corresponding parameters are extracted. (3) The converter model is simulated in the simulation software. (4) The simulated EMI voltage and current spectrum are obtained via mathematical analysis. A flow chart of the modeling is shown in Figure 7. The flow chart mainly focuses on the modeling of the EMI source and the modeling of the coupling path of the parasitic parameter. On this basis, an equivalent circuit model is established. The technical difficulty of modeling lies in the extraction of the parameters of each component in the model.

3.2. Research Status of EMI Modeling

The high-frequency switching of third-generation semiconductor devices is the main factor required to generate switching EMI, and so the high-frequency modeling of the switching device must accurately simulate its transient characteristics [30]. The method used to model a switching device creates a circuit behavior model and a physical model. The physical model needs to partition the device according to the structure and function of the device. Depending on the carrier motion characteristics inside each sub-region, the device is described by physical equations. After that, under certain boundary conditions, the description equations are combined according to the current path to form a complete physical model of the device. An accurate physical model is helpful in order to describe the mechanism of the device [31,32]. The circuit model is modeled from the physical level of the device, and the parameters required for modeling here are mostly extracted via mathematical fitting. The relevant model parameters have no direct physical meanings. The circuit model can model a certain state of the device switching process, and can also model the whole device switching process. The circuit modeling method is relatively simple, and its modeling accuracy depends on the accuracy of parameter extraction. If the working conditions are inconsistent with the parameter-fitting conditions, the accuracy of the model will be significantly reduced. Willemen and Hsu [33,34] proposed an analytical model of MOSFET that used the parameters obtained from the device data tables and the parasitic parameters of the external circuit to simulate the high-frequency behavior of MOSFET. Y Yuan [35] proposed a MOSFET segmented behavior model that prioritizes runtime performance and convergence behavior, and is thus suitable for computer-based simulation analysis.

3.2.1. SiC Power Device Modeling

Device layer modeling is the basis of, and key to, SiC MOSFET research. Roccaforte and Smith [36,37] established the behavior model of SiC MOSFET, which is shown in Figure 8. The model consists of a drain-source resistance and three fixed parasitic inductors, and considers the influence of the parasitic inductors of the package on the model characteristics, but does not accurately simulate the SiC MOSFET switching process.
Merkert et al. [38] improved the behavior model of SiC devices by calculating the device loss, but their model did not consider the working mechanisms of the devices. Some scholars have tried to build a physical model of SiC MOSFET to clarify the working mechanism of these devices. The two described modeling methods are shown in Table 2.
Based on the theory of semiconductor physics, Wang et al. [40] used mathematical methods to express the internal mechanism of SiC MOSFET and constructed the device physical model. However, this model is complex, and its simulation takes a long time. Adamowicz and Johannesson [16,41] proposed a circuit-level model of SiC MOSFET based on the PSpice software by adjusting the parameters and modifying the model on the basis of the software’s own MOSFET core. The modeling focus changed from the internal mechanism of the device to the external characteristics of the device, but the model did not consider the influence of temperature and power loss. Xin et al. [42] proposed a variable-temperature SiC MOSFET model. The model uses a temperature-controlled voltage source and a current source to compensate the static characteristics of SiC MOSFET, and analyzes the operating characteristics of the device at different temperatures, but does not consider real-time power loss.
Wang et al. [43] proposed a behavior-level modeling method. Their model is shown in Figure 9, and the device behavior model was established by using temperature compensation fitting. In the cited paper, the Miller capacitor between the gate and drain, which was modeled by the complex Siemens model with parameter extraction, required a large number of parameters, bringing difficulties to modeling. Sun et al. [44] added a conduction model under gate negative pressure and negative temperature based on reference [43].

3.2.2. GaN Power Device Modeling

The device equivalent circuit, which uses GaN, is shown in Figure 10 [45]. As emerging devices, there have been relatively few studies on high-frequency models involving GaN power devices.
The high-frequency equivalent model that uses GaN is shown in Figure 11. Huang et al. [46] analyzed the steady-state parameters of the device in their study and compared them with Si MOSFETs at similar voltage and current levels. Pajnic et al. [47] analyzed the output characteristics of GaN devices. Their analysis results showed that GaN devices had the characteristics of high voltage, high switching frequency and low switching loss, and were thus suitable for high-voltage and high-current converters. Xie et al. [48,49] made a lot of simplifications in the switching process of the common gate-source structure device, and believed that the parasitic inductors between the low-voltage Si MOSFET and the high-voltage GaN HEMT were key to affect the switching characteristics of the device. Carrasco et al. [50] applied GaN HEMT to single-phase inverters. The switching process of the device in application was analyzed in their paper, but the expression of voltage/current and switching loss were not further analyzed. Garsed et al. [51] proposed a simplified analytical model of the switching process in GaN devices. However, the influence of stray parameters and reverse recovery—which are quite different from the actual current and voltage stress and switching loss— on the switching process were not considered.
Liu et al. [52] established a loss analysis model for high-voltage GaN devices. Their model can accurately describe the switching process of a GaN device and can accurately analyze its output characteristics, transfer characteristics, and driving characteristics. The simulation and experiment in the paper were in good agreement. Huang et al. [53,54] analyzed the parasitic parameters inside the cascaded high-voltage GaN device in detail. By changing the installation position of the internal low-voltage Si MOSFET and the high-voltage depletion GaN device, the parasitic parameters inside the device were effectively reduced and the reliability of the device was improved in this study. Parikh and Chen [55,56] applied high-voltage GaN devices to Buck and LLC converters to evaluate their performance advantages. However, the influence of the differential packaging of GaN devices on the driving circuit was not analyzed in the paper, and the advantages of high voltage GaN devices and Si MOSFET in LLC resonant converters were not explained.

3.3. Conducted Noise Coupling Path Model

Conducted EMI propagates in the circuit in two modes: DM and CM. The coupling path includes not only the circuit composed of power devices, but also the circuit composed of parasitic elements and distributed elements [57].
The experimental results of a conducted EMI test are the sum of DM noise and CM noise. Due to the fact that EMI sources and coupling paths are different in DM noise and CM noise, it is necessary to analyze these two kinds of noise separately, and establish the DM and CM noise models of power converters. Since the modeling of the coupling path needs to be analyzed according to different circuit topologies, only the general modeling method is described here.
When modeling the conductive electromagnetic coupling loop, it is required to accurately find out the CM and DM noise coupling paths in the topology. When the converter contains multiple EMI sources and coupling paths, a multi-channel parallel analysis method should be adopted, as shown in Figure 12. Then, the circuit simulation software will be used to simulate the time domain, the time domain waveform of the noise voltage will be decomposed by Fourier, and finally, the spectrum of the conducted EMI will be obtained [58].
The main models created via conduction coupling path modeling include the time domain model and frequency domain model. The aim of the time domain model is to put a high-frequency model of all devices into the circuit in order to simulate the transient waveform, and the obtained model is relatively complex. Since the time domain model does not deeply analyze the mechanism underlying the generation and propagation of conducted EMI, it is impossible to judge which parasitic devices are the main ones, and instead, the parasitic parameters of all devices are blindly extracted [59]. Therefore, the model accuracy of the time domain model is poor. Frequency domain modeling is a modeling method used to obtain the EMI spectrum via frequency domain calculation involving the EMI source. When the frequency domain model is simulated, the high-frequency model of the EMI source should be established, and then the coupling path of the EMI should be analyzed [47]. Considering that the parasitic parameters of passive devices have a great influence on the results of frequency domain prediction, the coupling path model [60] should be established based on the high-frequency model of passive devices. Then, according to the EMI source model and the coupling path model, the EMI value of the whole loop will be obtained. Finally, the obtained DM EMI and CM noise will be superimposed, yielding the EMI spectrum of the system.

3.3.1. Time Domain Model

The time domain analysis method is based on using the physical structure or behavior model of third-generation semiconductor devices to characterize EMI sources. In this method, circuit simulation software is used to simulate a whole converter system, and the EMI spectrum distribution of the system is obtained by using discrete Fourier transform. The accuracy of the time-domain simulation model mainly depends on the accuracy of the power device model. At present, a lot of research has been carried out on the simulation model of third-generation semiconductor devices. The mainstream method involves obtaining the behavioral-level circuit simulation model by fitting a manual chart of the device data or experimentally measured parameters by using software tools. However, circuit design engineers may not be able to obtain all the experimental test parameters required to establish this model for third-generation semiconductor devices, and the stability and convergence of the current device simulation model still need to be verified when the model is applied to the simulation of EMI in power electronic devices. Due to the fast-switching speeds of third-generation semiconductor devices, the time-domain-simulation step is usually set in a few nanoseconds to simulate the transient process of switching, and so, the time-domain simulation method still has the problem of long simulation time. In summary, the time-domain simulation analysis method has the disadvantages of non-convergence and long simulation time, and so it is difficult to use it for the parametric analysis of EMI characteristics and suppression measures in power electronic devices. Within research on the time domain analysis of power electronic devices, Duan and Dillan [61,62] proposed a simple modified SiC MOSFET behavior model using the SPICE language. In their paper, the key parameters of the model were analyzed and determined in detail, and the main parameters of the switch dynamic characteristic in the model were compared with the measured results. The results showed that the modified model had higher accuracy than the actual measurement results. Duan et al. [63] modeled the EMI source and coupling path of the conducted noise of a full SiC three-phase inverter, and predicted the conducted noise at the power port by using time-domain simulation and fast Fourier transform. In the frequency range of 10 kHz–30 MHz, the simulation results were basically consistent with the measured results. On the basis of establishing a system-level conducted electromagnetic interference model for an entire SiC-based electric vehicle powertrain, Jia et al. [64]. analyzed the influence of AC cable length, AC cable type, DC cable type, and other system layout characteristics on common-mode electromagnetic interference noise through the time-domain simulation of the system-level conducted electromagnetic interference model. Zhang et al. [65]. established a conducted noise model using the measured output voltage and the model of passive devices. This model used a time-domain approach. The measured output voltage of one of the Zhangbei projects was used as the excitation source for the simulation. The model of the inductor and transformer is depicted in Figure 13, where the conducted noise amplitude on the AC side is seen to be reduced by approximately 44 dBμV/Hz.

3.3.2. Frequency Domain Analysis

The frequency domain analysis method applies the superposition principle to linearize the nonlinear power electronic circuit. The time-domain switching waveforms of the power device are obtained by conducting simple experimental tests, and the spectrum description of the EMI source is obtained via discrete Fourier transform. The frequency domain modeling method, which has the advantage of fast simulation speed, can be used to analyze the EMI characteristics of a system and optimize the design of its EMI filter. The disadvantage of this modeling method is that it allows only one EMI source to be analyzed at a time.
As part of the research on the frequency domain analysis of power electronic devices, Revol et al. [66] replaced the switches of an inverter with current or voltage sources defined in the frequency domain. Their method considered all passive devices and achieved fast and stable simulation. Their experimental results showed that the calculation results of the model were in good agreement with the experimental results in the bandwidth range of 150 kHz–30 MHz, and that the frequency domain analysis method significantly shortened the simulation time. Li et al. [67] proposed a hybrid packaging structure SiC half-bridge power module with ultra-low parasitic inductors and low parasitic capacitors to ground. The low parasitic inductors could improve the switching speed, and the low parasitic capacitors could suppress the grounding current. Liu et al. [68] proposed a new frequency-domain method to predict conducted EMI in DC-AC converters with varying switching conditions during operation. Their method was based on the equivalent module terminal behavior frequency domain EMI source model of a switching cycle at a given operating point, and the module terminal behavior models of different operating regions were superimposed in the frequency domain to predict the conducted EMI of the entire operating cycle. Duan et al. [69] proposed a frequency-domain method for predicting the DM EMI of three-phase SiC inverters. Their calculation and experimental results showed that the proposed frequency domain calculation results were in good agreement with the experimental results in the switching frequency range and the resonant frequency range. Zhou et al. [70] proposed a new frequency-domain EMI modeling technique. In their paper, based on the frequency domain model, a three-terminal behavior model for analyzing mixed model EMI was derived. Differing from the traditional behavior model, the DM and CM EMI sources were independent of each other, and this helped readers to intuitively understand the mixed model phenomenon.

3.4. Comparison of Time-Domain and Frequency-Domain Modeling Methods

The two modeling methods are shown in Table 3.
Elrayyah et al. [73] studied the EMI paths of conducted EMI in DC/AC inverters, using fast Fourier transform (FFT) to simulate the EMI spectra. However, when analyzing CM noise, the error between the high-frequency band and measurement result was large, and there was a convergence problem. Hedayati et al. [74] directly used the frequency domain analytical method to establish a prediction model: that is, the circuit equation of the EMI source and the coupling path was obtained in the paper, and this equation was converted into a transfer function by using the mathematical method. However, for more complex circuit topologies, it would be difficult to directly obtain the transfer function of EMI, and so this method is only suitable for simple topology. Tang et al. [75] proposed a prediction model of conducted EMI based on Thevenin’s theorem for a three-phase motor drive circuit and constructed the equivalent circuit of the CM conduction path and DM conduction path. The frequency domain analysis results from their study show that their method had high accuracy in predicting conducted EMI. Han et al. [9] used the spectral analysis method to analyze the CM noise of a motor drive system. A frequency domain prediction model in the range of 10 KHz–30 MHz was established. It simultaneously solved the convergence problem in the time-domain simulation and shortened the simulation time.

4. Study on EMI Suppression Methods for Power Electronic Devices

The existence of high dv/dt EMI sources and couplings in the conduction paths are the root causes of EMI in power electronic devices [76]. Therefore, the research on EMI suppression methods is mainly divided into two categories: one aims to suppress EMI sources, and the other aims to improve coupling path characteristics. The main measures to suppress an EMI source are the use of soft-switching technology, the optimization of the modulation mode, and the optimization of converter topology. The main measures to improve a coupling path involve active filtering technology, passive filtering technology, packaging optimization layout, and bridge balancing technology. These EMI suppression methods are classified as shown in Figure 14 [77].

4.1. EMI Suppression Strategy for Suppressing EMI Sources

4.1.1. Soft-Switching Technology

Soft switching improves EMI noise by reducing the dv/dt and di/dt generated by system power devices. Soft-switching technology requires a corresponding soft-switching scheme according to the circuit topology of the application. Some soft-switching characteristics in power conversion systems are susceptible to perturbations by system parameters, which can affect EMI suppression [78] Third-generation semiconductor devices work at high frequencies. Their turn-on will have higher voltage and current overshoot and oscillation than Si-based semiconductor devices. Soft-switching technology can suppress the amplitude of voltage and current overshoot and oscillation, and effectively reduce the DM noise in the high-frequency bands of power electronic devices, but it has no obvious effect on the DM noise in low-frequency bands. Kim et al. [79] proposed a closed-loop gate driver to control di/dt and dv/dt that reduces the amplitude of high-frequency conducted EMI. Xie et al. [12] proposed a soft-switching circuit to suppress conducted EMI: that is, parallel RLC circuits were added at both ends of switches to reduce the switching loss in order to achieve the purpose of suppressing EMI. It was concluded that the amplitude of low-frequency current noise under CCM was small, but the amplitude of high-frequency current noise was higher than that under DCM.

4.1.2. Optimization of Modulation

Pulse width modulation is the main factor that determines power electronic noise. Modulation technology can improve the output voltage waveform quality of the inverter and suppress the conduction noise in a system. The optimization of the modulation method aims to directly adjust the generation process of the EMI source and thereby reduce the noise in the low-frequency band. Xiang et al. [80] proposed that EMI current can be suppressed by using CCM and TCM. By comparing the influences of the two methods on EMI, it was concluded that the current noise amplitude of CCM was smaller in the low-frequency range, but the current amplitude was higher than that of TCM in the high-frequency range. Xie et al. [81] used the RPWM strategy instead of the traditional SVPWM strategy. In their study, the volume of the filter inductor was effectively reduced by combining the passive filter. Therefore, the EMI current of the whole frequency band of the controller met the requirements. Omar et al. [82] proposed the use of different pulse random modulation techniques to increase the power spectral density in order to suppress conducted EMI. Natarajan et al. [83] derived a formula for calculating the power spectral density to predict EMI. Mihalic et al. [84] compared the effects of four methods—random pulse position modulation, random pulse width modulation, fixed duty cycle random carrier frequency modulation, and variable duty cycle random carrier frequency modulation—on the power spectral density and EMI of a DC-DC synchronous rectifier. It was concluded that random pulse width modulation and fixed duty cycle random carrier frequency modulation had the best effects in terms of suppressing the DC-DC converter. Dove et al. [85] transferred harmonic power with high amplitude to other frequencies by utilizing random pulse width modulation technology, and reduced the power of the previous harmonics. According to the probability distribution function, the switching behavior of the DC-DC converter was designed to eliminate EMI optimally. Hasan et al. [86] proposed a hybrid pulse modulation technique that modulated pulse width and pulse position in each pulse modulation period. EMI was effectively suppressed in a quasi-Z source converter composed of an impedance source network and a GaN device. Vedet et al. [87] proposed a pulse width modulation strategy to eliminate the CM voltage of the three-phase AC-DC-AC converter. In this strategy, the inverter and the rectifier worked at the same switching frequency, and the inverter and the rectifier switched synchronously to offset the CM voltages of the two converters.
Compared with the filter method, the pulse width modulation method has the advantages of not increasing system cost and design difficulty, and has high versatility for systems with different power levels. Due to the change in control mode that it incorporates, this method will adversely affect inverter output voltage.

4.1.3. Converter Structure Optimization

In a converter, the PCB layout, and device structure optimization, suppress EMI by varying the noise transmission path and system impedance, respectively. By optimizing the main circuit topology of the power electronic converter, the CM EMI source of dv/dt can be offset, thereby reducing the conduction EMI. The method of counteracting the EMI source fundamentally suppresses EMI, and its EMI suppression effect is more significant than those of other methods. Based on the existing research on DAB converters, a parallel dual DAB structure based on active neutral point clamping was proposed by Xie et al. [84]. The dv/dt in their paper was offset by controlling the on-off setting of the switch to reduce the EMI caused by the CM current. However, this increased the cost and reduced the power density of the system. Kumar et al. [88] adopted a split-winding structure. The inductance windings were redistributed at the input and output terminals to optimize the potential of the nodes in the circuit. The inverse dv/dt node was established to eliminate CM noise. Xie et al. [89] proposed a CM voltage offset method that eliminated the CM voltage of the converter by inserting a compensation voltage source into the input power cable of the converter. Li et al. [90] analyzed and determined that the parasitic capacitance of power devices to the ground was the main factor affecting common-mode interference. They increased the thickness of the thermal grease between the thermal conductive sheet of the power device and the heat sink, thereby increasing the parasitic impedance of the switching device to the ground and effectively reducing the low-frequency conduction noise of the converter system. Their method can reduce the volume of the converter, and its implementation cost is low; thus, it has engineering application value.

4.2. EMI Suppression Strategy to Improve Coupling Path Characteristics

4.2.1. Active Filtering Technology

Active filtering technology detects CM current in real time. The emitter follower is used to generate reverse CM voltage or CM current. The reverse CM current is injected into the converter to suppress the conducted EMI. There are three main parts of an AEF circuit. These are the noise-sensing circuit, noise-processing active circuit, and noise-injection circuit. Conventionally, the noise-processing active circuit involves an amplifier stage that is capable of driving the injection stage. Zhang et al. [91] proposed an active common noise canceller. Their method first detected the CM voltage or current from the coupling path, then used the amplifier circuit to generate reverse voltage or current. Finally, the reverse signal was injected into the circuit. The suppression of CM noise was realized. Fan and Bendicks [92,93] solved the problem of signal path delay in an active filter system by using a synthetic cancellation signal. Their experimental results showed that the synthetic cancellation signal had an obvious suppression effect on EMI in a specific frequency range. Adapa and Mueller [94,95] proposed an active filter technology, based on the generalized predictive pulse compensation method, wherein the EMI generated by a DC-DC converter was suppressed by the half-bridge gate drive circuit. The effectiveness of the method was verified on a Buck converter with a simulated output controller.
A combination of different noise-sensing and noise-cancellation methodologies yields the conventional AEF as shown in Figure 15 [76]. In addition, according to whether noise detection is completed on the source side or on the load side, the control scheme can use feedforward or feedback. AEF itself is a single-order filter. Due to the bandwidth limitations of the Detection, Processing, and Elimination stages, AEF is designed to provide noise attenuation from the EMI frequency range (150 kHz, according to the International Radio Interference Standards Special Committee) to several MHz. In order to provide noise attenuation in a higher frequency range, another passive component must be used. This passive element is combined with AEF to form HEF. The higher the attenuation and bandwidth provided by AEF are, the smaller the additional passive components required to form HEF become. The choice of specific AEF topology depends on the source impedance and load impedance [96].

4.2.2. Passive Filtering Technology

Passive filtering technology is the most widely used EMI suppression technology in existing power electronic devices. It eliminates the resonance point of a converter by changing the impedance characteristics of the coupling path to suppress EMI conduction noise. The research on passive filters mainly focuses on three aspects: reducing filter sizes, increasing the number of DM inductors, and reducing the external leakage flux of the filters.
Fan et al. [92] proposed a method of adding a passive device absorption circuit. This method used ferrite magnetic beads and an improved gate driver to minimize EMI sources. Zhang et al. [4] proposed that the parasitic parameters of EMI filters seriously deteriorated the high-frequency performance of the filters. A method of introducing resistors into the CM coupling path to improve filter performance and reduce EMI was proposed. A conducted CM EMI suppression method based on an independent floating radiator was proposed. It suppressed high-frequency CM EMI by improving the electromagnetic source and coupling path in the central mode. Chu et al. [97] compared the EMI spectrum before and after adding the CM inductor. It is proposed here that adding CM inductance between LISN and the converter can effectively suppress the CM current. The implementation plan is shown in Figure 16. Dai et al. [98] proposed a new integrated multi-function CM choke based on an EMI filter. It combined a current transformer and a common choke into one element. This versatile CM choke eliminated the need for current transformers to optimize the topologies of hybrid EMI filters. Han et al. [9] paralleled the X-type capacitor on the input DC filter capacitor and added a pair of Y-type capacitors between the high-voltage positive and negative buses on the PCB board and the ground to suppress EMI. Their results showed that this method could effectively suppress the conducted EMI in the range of 150 kHz–108 MHz. Tanim et al. [99] suppressed CM EMI by adding a CM choke to the Wheatstone bridge. Their experimental results showed that this method had the characteristics of reducing EMI noise and having easy-to-realize soft switching. Dai et al. [100] proposed two methods to suppress CM EMI in AC-DC-AC converters. In the first, a CM choke was added. A three-phase CM choke could be installed on the grid side or on the load side, and a two-phase CM choke could be installed on the DC side. In the second method, the Y-type filter capacitor was added, and the filter capacitor CapN connected the neutral points of the filter capacitor on the rectifier side and the inverter side. The Y-type filter capacitor was connected in series with the line-equivalent inductance to form a path to reduce the CM current and suppress EMI. Hedayati et al. [101] designed CM filters based on LCL filters. Filter inductors and filter capacitors were inserted at the AC three-phase input in the study. At the same time, capacitors Cy1 and Cy2 were inserted at the middle bus of the rectifier and the inverter of the AC-DC-AC converter for filtering. In addition, the connection point of the two capacitors in the CM filter was connected with the three-phase filter capacitor of the LCL filter. The capacitor CMg was introduced between the connection point and the ground to make it as close as possible to the ground potential, thereby improving the filtering efficiency.

4.2.3. Optimization of Package Layout

The package parasitic inductors have a great influence on the EMI sources in converters. Reducing the package parasitic inductors can not only suppress the switching voltage ringing, but also improve the switching speed of power electronic devices [102]. In addition, the parasitic CM capacitors of the package determine the impedance characteristics of the CM EMI coupling path. Reducing the parasitic CM capacitance of the package is an effective means by which to reduce system EMI. Through improved thermal management and packaging material processes, higher power densities and wider temperature ranges (i.e., operating temperatures above 200 °C) can be supported. Ultra-low inductance packaging can protect components from voltage transients and suppress EMI.
Bendicks et al. [103] proposed a hybrid half-bridge SiC power module and a hybrid half-bridge for TO-247 packaged SiC devices. Their proposal effectively reduced the total number of parasitic inductors and achieved the purpose of reducing EMI. Pahlevaninezhad et al. [93] proposed a high-frequency planar transformer for DAB converters. Its embedded EMI filter could effectively eliminate CM EMI in a DAB converter. Kumar et al. [104] proposed a low-inductance bus design method for discrete devices. This method could effectively reduce the coupling inductance in the loop, and in turn, high-frequency EMI could be better suppressed.

4.2.4. Bridge Balancing Technology

Bridge balancing technology uses the Wheatstone bridge balancing principle to construct the converter as a Wheatstone bridge. The impedance of the converter is matched to meet the bridge balance conditions, thereby eliminating the CM current of the converter and suppressing conducted EMI. Bridge balancing techniques require the adjusting of impedance parameters multiple times in order to achieve bridge balancing. In addition, for occasions in which a converter is required to be common ground, bridge balancing technology will destroy the common-ground characteristics of the converter. Additionally, its actual suppression effect is debatable.
Narayanasamy et al. [105] derived two CM noise sources and their characteristics and proposed a CM noise reduction technology with a large impedance ratio balanced bridge to achieve EMI suppression. Chen et al. [106] proposed a neutral-point clamp topology with bridge balancing technology that could achieve large EMI attenuation and reduce filter parameters to reduce size and weight. Yang et al. [107] proposed a CM equivalent circuit model of a multi-unit AC/DC traction system in which two series balanced capacitors CB were incorporated at the input end, and the midpoint of the balanced capacitor was connected to the midpoint of the two DC buses to suppress EMI. Yang et al. [108] grounded the inverter casing with the inverter and the motor at the same time, and decoupled the inductor LG in series to reduce the influence of the inverter on the CM noise of the rectifier, so as to reduce the CM noise of the system. Li et al. [109] changed the traditional three-phase hexagonal AC chopper bridge arm to multiple chopper AC voltage regulation circuits and inductors in series, as shown in Figure 17. A multistage AC hexagonal chopper, which reduced the dv/dt generated by the switching device, was formed so as to effectively reduce EMI.
Table 4 summarizes the advantages, disadvantages, and use cases of several EMI suppression methods.

5. Future Prospects

In this paper, the EMI generation mechanisms, coupling paths, modeling methods, and suppression strategies of power electronic converters using third-generation semiconductors devices have been investigated and analyzed. The direction of research on EMI in power electronic converters in the future is speculated upon. This paper aims to further promote the development and application of power electronics technology under new energy structures. The questions of how to fully optimize the layouts and selection of power electronic devices based on the requirements of power electronic converters, and how to design a power electronic converter that considers high efficiency, high frequency, high power density, and low EMI, pose serious challenges when applying third-generation semiconductor power electronic devices. Research on EMI in power electronics using third-generation semiconductors can be carried out from the following perspectives.
(1)
Modeling method
EMI modeling is mostly based on the ideal circuit model of the converter. However, in practice, the control loop of the power electronic system, the layout of the PCB board, and the selection and placement of a power electronic device will change EMI. These factors will make the constructed model deviate greatly from the actual measurement results, and it is difficult to simulate its actual working conditions. Therefore, the question of how to construct accurate device and circuit models in complex backgrounds and obtain analytical waveforms with a high degree of fitting to actual measurement results is worthy of further study. The coupling path of EMI above 10 MHz is very complex. In practice, there are various non-ideal factors that pose challenges to EMI modeling in medium- and high-frequency bands. Therefore, by optimizing electromagnetic numerical simulation technologies and test schemes, one may overcome a technical bottleneck to establish a complete and accurate electromagnetic compatibility model including nonlinearity, time delay, broadband, and coupling sensitivity.
(2)
Analysis of EMI model under non-ideal conditions
In the process of model idealization, some secondary factors are usually ignored, such as the relative smallness of some EMI sources and the influence of temperature on EMI model parameters. Although the distribution of EMI after the idealization of a model can be obtained relatively easily, the ignored factors will further lead to large errors between the model and the actual measurement results, resulting in inadequate simulation and experimental fitting. Therefore, it is of practical significance to study the EMI model under non-ideal conditions and discuss the direction of the influence of secondary factors on the EMI model. As the supporter of electronic components in the system, the PCB plays the role of electrically connecting electronic components. Due to the existence of parasitic effects, when the system is actually working, its PCB will show some non-ideal states. In particular, when a high-speed signal flows through the PCB trace, the PCB becomes the main path of high-frequency noise due to the aggravation of parasitic effects. The EMI characteristics of a PCB can be studied by following these three instructions: extract PCB parasitic parameters and establish a system EMI model, use this model to analyze the relationship between the structure and the EMI noise, and optimize the PCB structure according to the results of the analysis.
(3)
Coupling path analysis and model simplification scheme
With the increasing demand for the miniaturization of power electronic devices, the operating frequencies of these devices is increasing, and the EMI caused by higher dv/dt is becoming more and more serious. EMI coupling path analysis and model simplification schemes under specific EMI sources will reduce the difficulty of EMI analysis and provide new ideas for EMI prediction. The interference model that has now been established has a large number of parasitic parameters. On the one hand, the values of these parasitic parameters are difficult to measure accurately. On the other hand, the influence of these parasitic parameters on interference is also very small. If all parasitic parameters are considered, the established model becomes too complicated. Therefore, model simplification is important. However, an oversimplified EMI model will affect the accuracy of the model. Therefore, conceptualizing an EMI coupling path simplification scheme with low complexity and high accuracy is the key issue of future EMI research.
(4)
A comparative study of EMI between the converter using Si-based and third-generation semiconductors.
Third-generation semiconductor devices have the advantages of fast switching speed, low loss, and high voltage and current stress, which are increasingly favored by designers of power electronic devices. However, due to the high switching speed of third-generation semiconductor devices, their dv/dt will be higher than that of Si-based devices, and the resulting EMI will be more complicated. Therefore, addressing the question of how to flexibly use the frequency-domain method and the time-domain method to study the specific problems of third-generation semiconductor devices and compare them with Si-based devices to clarify the influencing factors and modes of action of EMI will be a direction for future EMI research.
(5)
EMI research combined with the actual working conditions
The working states of power electronic devices are diverse. The runtime contains a variety of operating conditions. Studying the conducted noise under a certain working condition cannot explain the EMC characteristics of the drive system. It is necessary to study the conducted noise under various working conditions and establish its noise prediction simulation model. An EMI design method for the whole stage of hardware design should be developed. As for the design, the following measures are recommended: (a) the area of the power circuit should be as small as possible, and (b) the switching speed and loss in the power semiconductor device need to be balanced. For valve tower and system design, it is recommended to select the appropriate grounding, filtering, and shielding methods according to the operating conditions. It is recommended to combine the reduction of EMI sources with the weakening of EMI propagation paths. Therefore, it is of great significance in engineering to study EMI modeling and suppression methods in combination with actual operating conditions.
(6)
EMI suppression strategy formulation
The traditional EMI suppression strategy mainly relies on two measures: suppressing the EMI source and improving the coupling path. It mainly includes absorption circuits, soft-switching technology, package optimization, and filter design, and relies mainly on previous experiences. New methods are needed to further improve the performance of EMI filters without the need for additional high-voltage capacitors to improve stability or to inject transformers into power lines. These new topologies can use all analog or hybrid analog-and-digital active circuits. In addition, there have been a few studies on auxiliary power supply, power loss, and protection of AEF, so as to encourage the wide adoption of low EMI modulation and low EMI topology. While meeting the power quality requirements, an EMI source should be made as small as possible by selecting the topology and modulation appropriately. The operation of simultaneously-switching large quantum SM should be avoided. For third-generation semiconductor devices, addressing the question of how to quantitatively derive EMI content according to the spectrum characteristic curves and the spectrum analysis results, and then specify suppression strategies, is another important issue for future EMI research.

Author Contributions

Article structure designation, editing, X.W.; writing-Section 1 and Section 2, X.G.; review, J.W.; investigation, project administration, F.L.; supervision, J.D.; writing-Section 5, N.I.S.; writing-Section 3, Z.L.; writing-Section 4, S.D. and X.Z.; writing-Section 5, S.G. All authors have read and agreed to the published version of the manuscript.

Funding

This paper has been partially supported by the funding of Chengdu Guojia Electrical Engineering Co., Ltd. (No. NEEC-2022-B07).

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Main EMI sources.
Figure 1. Main EMI sources.
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Figure 2. Measured voltage waveform between drain and source. (Pink circles indicate that parasitic capacitance during switching causes high-frequency oscillations of the gate source at high/low levels).
Figure 2. Measured voltage waveform between drain and source. (Pink circles indicate that parasitic capacitance during switching causes high-frequency oscillations of the gate source at high/low levels).
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Figure 3. CM noise coupling path of an electric drive system.
Figure 3. CM noise coupling path of an electric drive system.
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Figure 4. The DM noise coupling path of an electric drive system.
Figure 4. The DM noise coupling path of an electric drive system.
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Figure 5. Conducted noise analysis and test methods.
Figure 5. Conducted noise analysis and test methods.
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Figure 6. Test platform for a typical electric drive system.
Figure 6. Test platform for a typical electric drive system.
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Figure 7. Flow of conducted noise modeling process.
Figure 7. Flow of conducted noise modeling process.
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Figure 8. SiC MOSFET behavior model [38,39].
Figure 8. SiC MOSFET behavior model [38,39].
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Figure 9. Temperature compensation behavior model [43].
Figure 9. Temperature compensation behavior model [43].
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Figure 10. GaN equivalent circuit [45].
Figure 10. GaN equivalent circuit [45].
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Figure 11. High-frequency equivalent circuit for GaN HEMT [46].
Figure 11. High-frequency equivalent circuit for GaN HEMT [46].
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Figure 12. Schematic diagram of EMI conduction multi-channel parallel modeling.
Figure 12. Schematic diagram of EMI conduction multi-channel parallel modeling.
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Figure 13. Wideband models of the passive devices: (a) transformer; (b) capacitor.
Figure 13. Wideband models of the passive devices: (a) transformer; (b) capacitor.
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Figure 14. Classification of EMI suppression methods.
Figure 14. Classification of EMI suppression methods.
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Figure 15. AEF topologies: (a) feedforward voltage-sense voltage-cancellation, (b) feedforward current-sense current-cancellation, (c) feedback voltage-sense voltage-cancellation, (d) feedback voltage-sense current-cancellation, (e) feedback current-sense current-cancellation, and (f) feedback current-sense voltage cancellation.
Figure 15. AEF topologies: (a) feedforward voltage-sense voltage-cancellation, (b) feedforward current-sense current-cancellation, (c) feedback voltage-sense voltage-cancellation, (d) feedback voltage-sense current-cancellation, (e) feedback current-sense current-cancellation, and (f) feedback current-sense voltage cancellation.
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Figure 16. Schematic of EMI suppression with CM inductors.
Figure 16. Schematic of EMI suppression with CM inductors.
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Figure 17. Schematic diagram of two AC choppers: (a) three-phase hexagonal AC chopper; (b) multistage AC hexagonal chopper.
Figure 17. Schematic diagram of two AC choppers: (a) three-phase hexagonal AC chopper; (b) multistage AC hexagonal chopper.
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Table 1. Comparison of wide-bandgap materials properties with Si.
Table 1. Comparison of wide-bandgap materials properties with Si.
PropertiesSi6H-SiC4H-SiCGaN
Thermal conductivity (W/cm K) 1.5 4.9 4.9 1.3
Band gap (eV) 1.12 3.03 3.26 3.45
Breakdown field (MV/cm) 0.3 2.5 2.2 3.3
Dielectric constant 11.9 9.66 9.7 8.5–10.4
Electron mobility (cm2/Vs) 1500 400 800 2000
Table 2. Comparison of power switch modeling methods [39].
Table 2. Comparison of power switch modeling methods [39].
Power Switch Modeling MethodPhysical ModelEquivalent Circuit Model
Basic ideasA method of semiconductor physics used to describe the internal structure of a device.The circuit equivalent method is used to describe the circuit switching process.
Advantages
  • Parasitic parameters can be explained.
  • The model is more accurate.
  • The model is simple.
  • The model is suitable for the field of power electronics.
Disadvantages
  • The model is more complex.
  • It involves a large amount of calculation.
  • There are errors in parameter extraction.
  • The accuracy of the model is low.
Table 3. Comparison of conducted EMI modeling methods [71,72].
Table 3. Comparison of conducted EMI modeling methods [71,72].
Modeling MethodTime Domain ModelingFrequency Domain Modeling
Modeling approachThe high-frequency model of the EMI source is put into the circuit to simulate the transient waveform.The superposition principle is used to linearize the circuit, and the spectrum description of the EMI source is obtained by using discrete Fourier transform.
Advantages
  • It performs the simultaneous analysis of multiple EMI sources.
  • The model is simple.
  • Only one EMI source can be analyzed by the model.
Disadvantages
  • The model is complex.
  • Parameter extraction is difficult.
  • The simulation time is long.
  • The simulation speed is fast.
  • Multiple EMI sources need to be equivalently processed.
  • The model accuracy is low.
Table 4. Comparison of EMI suppression strategies.
Table 4. Comparison of EMI suppression strategies.
ClassificationSuppression StrategyAdvantagesDisadvantagesApplication ScenariosInhibition EffectCost
Suppress sources of EMISoft-switching technology
  • It has a simple structure.
  • It has an easy design.
  • It has a low cost.
  • Its EMI suppression is not good.
Scenarios where EMI suppression is lowIt has an insufficient inhibition effect.Low
Optimization of the modulation method
  • It improves power density.
  • It limits narrowband power.
  • It uses DM EMI suppression.
  • It has limited effectiveness in limiting wide bands.
  • It is not applicable with resonant converters.
  • It is limited by specific topologies or control methods.
  • The effects of suppressing CM EMI are limited.
Scenarios where EMI suppression is lowIts inhibition effect is limited.Relatively Low
Optimization of the transformer structure
  • It uses fundamental EMI suppression.
  • It is easy to implement.
  • It needs complex modeling and calculation.
  • It is mainly used to suppress CM EMI.
Scenarios where EMI suppression is lowIts inhibition effect is significant.Middle
Change the coupling pathActive filtering technology
  • It has a low cost.
  • It uses fewer devices used.
  • Its operation is simple.
  • Operation and calculation are complex.
  • Its suppression effect is not as good as that of passive filters.
  • New EMI will be introduced.
Scenarios where EMI suppression is lowIt has an insufficient inhibition effect.Low
Passive filtering technology
  • It has a simple structure
  • It has a good inhibition effect.
  • The weight of the equipment is large.
  • It has a high cost.
  • It has a large size.
  • It has a limited ability to suppress high-frequency EMI.
Scenarios with high suppression standardsIts suppression effect is good.High
Optimized package placement
  • It effectively suppresses high-frequency EMI.
  • Its equipment structure is complex.
  • Its operation is difficult.
Scenarios with high suppression standardsIts inhibition effect is good.Relatively High
Bridge balancing technology
  • It effectively suppresses CM noise.
  • Its design is difficult.
  • Its operation is difficult.
  • It involves complex modeling and calculation.
Suppresses CM EMIIt has a good inhibition effect.Relatively Low
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Wu, X.; Gao, X.; Wang, J.; Li, Z.; Du, S.; Gao, S.; Li, F.; Du, J.; Shchurov, N.I.; Zhang, X. Advances in Modeling and Suppression Methods of EMI in Power Electronic Converters of Third-Generation Semiconductor Devices. Electronics 2023, 12, 2348. https://doi.org/10.3390/electronics12112348

AMA Style

Wu X, Gao X, Wang J, Li Z, Du S, Gao S, Li F, Du J, Shchurov NI, Zhang X. Advances in Modeling and Suppression Methods of EMI in Power Electronic Converters of Third-Generation Semiconductor Devices. Electronics. 2023; 12(11):2348. https://doi.org/10.3390/electronics12112348

Chicago/Turabian Style

Wu, Xiaogang, Xinjia Gao, Jiulong Wang, Zheng Li, Shirui Du, Shuchun Gao, Feiqiang Li, Jiuyu Du, Nickolay I. Shchurov, and Xinyang Zhang. 2023. "Advances in Modeling and Suppression Methods of EMI in Power Electronic Converters of Third-Generation Semiconductor Devices" Electronics 12, no. 11: 2348. https://doi.org/10.3390/electronics12112348

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