Advances in Microwave Large-Signal Metrology: From Vector-Receiver Load-Pull to Vector Signal Network Analyzer and Time-Domain Load-Pull Implementations (Invited Paper)

Abstract

Radiofrequency (RF) power amplifiers (PAs) are important elements of modern communication systems. The most important components in PAs are the transistors, which are operated under large-signal regimes in such applications. Designing and optimizing PAs are challenging tasks that demand the highest accuracy on large-signal measurements at both device and circuit levels. Large-signal power transistor characterization demands the development and utilization of high-frequency and low-frequency load-pull systems. Furthermore, the static and dynamic characterization of two-input PAs requires the development of new measurement systems that consist of an nonlinear vector network analyzer (NVNA) and an arbitrary waveform generators (AWG). This paper reviews the research activities, achievements, and current research goals at CICESE Research Center in Mexico in the large-signal microwave metrology field.

1. Introduction

Although advances in wireless communications are usually driven by developments in digital coding, modulation techniques, and the liberation of new fragments of the electromagnetic spectrum, the elements that remain present in every communication system are the power amplifiers (PAs) [1,2,3]. The most important elements in a PA are the transistors, which are operated under large-signal regimes in such applications [4]. Hence, characterizing the nonlinear behavior of power devices, either transistors or amplifiers, is of paramount importance for PA design and optimization [5,6].

Characterization of the large-signal behavior of power devices using only S-parameters is insufficient since the representation of their performance by means of S-parameters is only valid when describing their small-signal behavior [7]. In this paper, a review of several solutions aimed to assess the large-signal behavior of power devices is presented, from vector-receiver load-pull systems to the implementation of measurement systems dealing with wideband modulated signals, and time-domain load-pull solutions.

The paper is organized as follows. Section 2 presents the foundations of vector-receiver load-pull (VRLP) systems; a description of their calibration procedure is presented and the impact of the calibration techniques on devices’ characterization is studied. Section 3 shows a measurement system that uses a vector receiver jointly with arbitrary waveform generators to characterize devices’ performance under modulated signal excitations, hence transforming a conventional vector receiver into a vector signal analyzer. In Section 4, a low-frequency time-domain harmonic load-pull system is built by substituting the mixer-based vector receiver used in VRLP systems by a four-channel oscilloscope to capture voltage and current waveforms at the device’s intrinsic plane. Such a system is used to evaluate and compare the RF capabilities of power transistors fabricated in different technologies. Section 5 is devoted to presenting a final summary along with the current research goals being pursued at CICESE Research Center in Mexico in the field of microwave large-signal metrology.

2. Vector-Receiver Load-Pull Systems: Description and Calibration Procedure

The demand for enhanced performance from microwave power devices requires operating them in their large-signal regime. The characterization of nonlinear devices requires complex measurement systems, where the most utilized are the load-pull systems [8,9,10]. In legacy power-based load-pull systems, measurement accuracy relied on pre-calibrated impedance tuners and power receivers [11,12]. By comparison, VRLP systems (Figure 1) measure the impedances presented to the device under test (DUT) and the power at its ports in real-time [13,14] using a calibrated vector receiver [15].

2.1. System Calibration

Characterizing devices using a VRLP system requires removal of the effects of the system’s elements using calibration methods [16,17,18,19]. The calibration of a system such as the one depicted in Figure 1 comprises two parts: relative calibration, used to determine ratios of parameters, and power calibration, used to determine the power levels at the DUT ports. Relative calibration may be carried out using two-port calibration techniques, whereas power calibration is performed using a power reference device (e.g., power meter) connected at a coaxial plane located close to the calibration plane. In this section, a complete mathematical formulation of the calibration procedure, developed using the ABCD-parameters matrix formalism [18,19], is presented.

2.1.1. Relative Calibration

At present, vector network analyzers (VNAs) allowing access to the instrument receivers are used as the vector receiver (VR) in load-pull systems (Figure 2a). Thus, VNA calibration techniques, such as the thru-reflect-line (TRL) [20,21,22], thru-reflect-match (TRM) [23,24], and short-open-load with unknown thru (SOLT) [25] may be used to carry out the relative calibration of VRLP systems. This calibration relates ratioed quantities measured at the VR (U1-U2 planes), to ratioed quantities at the calibration plane (D1-D2 planes), as depicted in Figure 2b. The voltage and current quantities at the vector receiver ports, $V_k^U$, and $I_k^U$; $k=1,2,$ are defined as a function of the measured traveling waves, $A_k^U$, and $B_k^U$, as [7]:

$$V_k^U=\sqrt{Z_0}\left(1+\frac{B_k^U}{A_k^U}\right)A_k^U=\sqrt{Z_0}\left(\frac{A_k^U}{B_k^U}+1\right)B_k^U$$

(1)

$$I_k^U=\frac{1}{\sqrt{Z_0}}\left(1-\frac{B_k^U}{A_k^U}\right)A_k^U=\frac{1}{\sqrt{Z_0}}\left(\frac{A_k^U}{B_k^U}-1\right)B_k^U$$

(2)

where Z₀ represents the measurement system impedance. Using the eight-term error model, $V_k^U$ and $I_k^U$ are defined as a function of the voltage and current quantities at the calibration reference plane, $V_k$ and $I_k$, as:

$$\left(\begin{array}{c}{V}_1\\ I_1\end{array}\right)=T_A^{-1}\left(\begin{array}{c}{V}_1^U\\ I_1^U\end{array}\right)$$

(3)

$$\left(\begin{array}{c}{V}_2\\ -I_2\end{array}\right)=T_B\left(\begin{array}{c}{V}_2^U\\ I_2^U\end{array}\right)$$

(4)

$T_A$ and $T_B$ are ABCD-parameters matrices denoting the networks connecting U1-U2 planes to D1-D2 planes. As shown in Appendix A, these matrices are defined as:

$$T_A=D_X\left(\begin{array}{cc}\overline{A_X}& \overline{B_X}\\ \overline{C_X}& 1\end{array}\right){\left(\begin{array}{cc}-Z_B& Z_A\\ 1& 1\end{array}\right)}^{-1}$$

(5)

$$T_B=D_Y\left(\begin{array}{cc}-Z_B& Z_A\\ 1& 1\end{array}\right)\left(\begin{array}{cc}\overline{A_Y}& \overline{B_Y}\\ \overline{C_Y}& 1\end{array}\right)$$

(6)

where Z_A and Z_B represent the impedance of a calibration structure used in a particular calibration technique. In the TRL technique, Z_A = Z_B = Z_L, where Z_L represents the characteristic impedance of the line used as calibration structure [18,22]. In the TRM technique, Z_A equals the impedance of the load used as the match standard at port one, and Z_B equals the impedance of the load used at port two [19,24]. Seven out of the eight error terms in Equations (5) and (6), namely $\overline{A_X}$, $\overline{B_X}$, $\overline{C_X}$, $\overline{A_Y}$, $\overline{B_Y}, \overline{C_Y}$, $D_X{D}_Y$, may be determined from measurements of either TRL or TRM calibration structures;

Table A1. Calculation of error terms in TRL and TRM calibration techniques. The sequence is intended to be organized in the table from left to right.

Calibration Terms	$\overline{{\mathit{B}}_{\mathit{X}}}$	$\overline{{\mathit{A}}_{\mathit{X}}}/\overline{{\mathit{C}}_{\mathit{X}}}$	$\overline{{\mathit{C}}_{\mathit{X}}}$	$\overline{{\mathit{A}}_{\mathit{Y}}},\overline{{\mathit{B}}_{\mathit{Y}}},\overline{{\mathit{C}}_{\mathit{Y}}},{\mathit{D}}_{\mathit{X}}{\mathit{D}}_{\mathit{Y}}$
TRL [22] (ZA = ZB = ZL)	Thru-Line	Thru-Line	Thru-Reflecting loads	Thru
TRM [24] (ZA = ZM1; ZB = ZM2)	Match P1	Thru-Match P2	Thru-Reflecting loads	Thru

in Appendix A summarizes the measurements necessary to determine them on both TRL and TRM techniques.

Let $R_z$ be the ratio of $Z_B$ to $Z_A$ ($R_z=Z_B/Z_A$). By substituting Equations (5) and (6) in Equations (3) and (4), and developing the resultant equations, the following expressions for the voltages and currents at the calibration plane may be obtained as:

$$V_1=-\frac{Z_A}{D_X{\Delta }_X}\left[\left(R_Z+\overline{C_X}\right)-\left(\overline{B_X}{R}_Z+\overline{A_X}\right)Y_1^U\right]V_1^U$$

(7)

$$I_1=\frac{1}{D_X{\Delta }_X}\left[\left(1-\overline{C_X}\right)-\left(\overline{B_X}-\overline{A_X}\right)Y_1^U\right]V_1^U$$

(8)

$$V_2=Z_A{D}_Y\left[\left(\overline{C_Y}-\overline{A_Y}{R}_Z\right)-\left(1-\overline{B_Y}{R}_Z\right)Y_2^U\right]V_2^U$$

(9)

$$I_2=-D_Y\left[\left(\overline{C_Y}+\overline{A_Y}\right)-\left(1+\overline{B_Y}\right)Y_2^U\right]V_2^U$$

(10)

where ${\Delta }_X=\overline{A_X}-\overline{B_X} \overline{C_X}$ and $Y_k^U=I_k^U/V_k^U$; k = 1,2. From Equations (7)–(10), it may be noticed that any ratioed quantity at the calibration plane (e.g., $V_2/I_2$ depends only on the seven terms calculated from the relative calibration, the value of Z_A and Z_B, and ratioed quantities measured at the VR (e.g., $I_2^U/V_2^U$, $V_2^U/V_1^U$). Let us consider three quantities commonly used in large-signal characterization: the input impedance ($Z_{IN}=V_1/I_1$), the load impedance ($Z_{LD}=-V_2/I_2$), and the voltage gain ($G_V=V_2/V_1$), which may be expressed as follows:

$$Z_{IN}=-Z_A\frac{\left(R_Z+\overline{C_X}\right)-\left(\overline{B_X}{R}_Z+\overline{A_X}\right)Y_1^U}{\left(1-\overline{C_X}\right)-\left(\overline{B_X}-\overline{A_X}\right)Y_1^U}$$

(11)

$$Z_{LD}=Z_A\frac{\left(\overline{C_Y}-\overline{A_Y}{R}_Z\right)-\left(1-\overline{B_Y}{R}_Z\right)Y_2^U}{\left(\overline{C_Y}+\overline{A_Y}\right)-\left(1+\overline{B_Y}\right)Y_2^U}$$

(12)

$$G_V=D_X{D}_Y\cdot {\Delta }_X\frac{\left(\overline{C_Y}-\overline{A_Y}{R}_Z\right)-\left(1-\overline{B_Y}{R}_Z\right)Y_2^U}{\left(R_Z+\overline{C_X}\right)-\left(\overline{B_X}{R}_Z+\overline{A_X}\right)Y_1^U}\cdot \frac{V_2^U}{V_1^U}$$

(13)

Although Z_LD is not a power-dependent quantity, Z_IN and G_V, along with other gain metrics (e.g., power gain), are power dependent. Nevertheless, such dependency cannot be captured using information provided by the relative calibration process.

2.1.2. Power Calibration

To complete the calibration, we must determine the power at the calibration plane for which ratioed quantities obtained from the relative calibration are defined. Expressions for the power at the D1 and D2 planes, P_IN and P_OUT, are obtained from the analysis of the structures depicted in Figure 2b as:

$$P_{IN}={\left|V_1\right|}^2\mathrm{Re}\left(Y_{IN}\right),$$

(14)

$$P_{OUT}={\left|V_2\right|}^2\mathrm{Re}\left(Y_{LD}\right).$$

(15)

Y_IN = 1/Z_IN and Y_LD = 1/Z_LD are determined from the relative calibration. Thus, |V₁|and |V₂| must be determined. As shown in Equations (7) and (9), this requires calculating the value of |D_X| and |D_Y|; the procedure presented next describes how to determine these terms.

In most practical cases, power devices are characterized in non-connectorized environments (e.g., in-fixture, on-wafer). In these conditions, a power reference cannot be connected at the calibration plane. A more general procedure consists in connecting the power reference at a coaxial plane near the calibration plane, while a thru connection is performed at the D1-D2 planes. (For the sake of clarity, power calibration is described for the case in which a zero-length thru connection is connected at the calibration plane. A similar procedure may be derived for cases in which the test ports are connected through transmission lines of arbitrary length [16,17], with no major modifications.) (Figure 3a) [13,16,17]. As shown in Figure 3b, there is a two-port network connecting the D1-D2 plane to a coaxial plane (C₀). Let T_C, defined as:

$$T_C=D_C\left(\begin{array}{cc}\overline{A_C}& \overline{B_C}\\ \overline{C_C}& 1\end{array}\right),$$

(16)

be the ABCD-parameters matrix representing such two-port network, such that:

$$\left(\begin{array}{c}{V}_1\\ I_1\end{array}\right)=\left(\begin{array}{c}{V}_2\\ -I_2\end{array}\right)=T_C\left(\begin{array}{c}{V}_C\\ I_C\end{array}\right).$$

(17)

By substituting Equation (16) in (17), Equation (18) may be derived:

$$\overline{A_C}{Z}_C+\overline{B_C}-\overline{C_C}{Z}_C{Z}_{IC}=Z_{IC},$$

(18)

$Z_{1C}=V_1/I_1=-V_2/I_2$ represents the impedance at the calibration plane’s input impedance when a load of known impedance $Z_C=V_C/I_C$ is attached at the plane (C₀) as shown in Figure 3. Then, by using the connection of three loads at such a plane and using Equation (18), one can form a system of equations, which, after being solved, allows determination of the values of $A_C,B_C$ and $C_C$.

The next step in the power calibration is to connect a power reference (power meter) at the plane C₀. First, the impedance of the power meter ($Z_{PR}$) may be determined by solving Equation (18) for the term $Z_C$ as:

$$Z_{PR}=\left(Z_{IC,PR}-\overline{B_C}\right)/\left(\overline{A_C}-\overline{C_C}{Z}_{IC,PR}\right),$$

(19)

where $Z_{1C,PR}$ denotes the input impedance at plane D1-D2, when the input impedance at the calibration plane and a power meter of impedance Z_PR is connected at the plane C₀. By analyzing the structure presented in Figure 3b, and using Equation (16), one can derive the following expression:

$$V_1=V_2=D_C\left(\overline{A_C}{Z}_{PR}+\overline{B_C}\right)V_{PR},$$

(20)

where V_PR represents the voltage at the power reference. Let $P_{PR}={\left|V_{PR}\right|}^2\mathrm{Re}\left(Y_{PR}\right)$, $Y_{PR}^{}=1/Z_{PR}$, be the power measured at the power reference; from Equation (20) the following expression is obtained:

$$\left|V_1\right|=\left|V_2\right|=\left|D_C\right|\left|\overline{A_C}{Z}_{PR}+\overline{B_C}\right|\sqrt{P_{PR}/\mathrm{Re}\left(Y_{PR}^{}\right)}.$$

(21)

Since the two-port network represented by T_C is assumed to be reciprocal [16,17], the determinant of T_C should be identical to the unity, and the value of $\left|D_C\right|$ = $\sqrt{1/\left|\overline{A_C}-\overline{B_C}\overline{C_C}\right|}$.

Finally, the following expressions for |D_X| and |D_Y| may be determined by solving Equations (7) and (9) for D_X and D_Y, respectively, and using Equation (21) in the obtained equations:

$$\left|D_X\right|=\frac{\left|Z_A\right|}{\left|D_C\right|}\frac{\left|\left(R_Z+\overline{C_X}\right)-\left(\overline{B_X}{R}_Z+\overline{A_X}\right)Y_1^U\right|}{\left|{\Delta }_X\right|\left|\overline{A_C}{Z}_{PM}+\overline{B_C}\right|\sqrt{P_{PM}/\mathrm{Re}\left(Y_{PM}\right)}}\left|V_1^U\right|,$$

(22)

$$\left|D_Y\right|=\frac{\left|D_C\right|}{\left|Z_A\right|}\frac{{\left|\overline{A_C}{Z}_{PM}+\overline{B_C}\right|}^2\sqrt{P_{PM}/\mathrm{Re}\left(Y_{PM}\right)}}{\left|\left(\overline{C_Y}-\overline{A_Y}{R}_Z\right)-\left(1-\overline{B_Y}{R}_Z\right)Y_2^U\right|}\frac{1}{\left|V_2^U\right|}.$$

(23)

From Equations (7), (14) and (22), it is noted that power calibration relates P_IN to an absolute quantity measured at the VR, $\left|V_1^U\right|$. Similarly, Equations (9), (15) and (23), establish a relationship between P_OUT and an absolute quantity measured at the VR, $\left|V_2^U\right|$.

2.2. Large-Signal Characterization of Power Devices

In this section, two cases of devices’ large-signal characterization are presented. The first shows the usefulness of the TRL calibration implemented using lines of arbitrary impedance. In the second case, a transistor is measured in a system calibrated using the TRM calibration procedure, implemented using nonsymmetrical loads. In both cases, a Keysight PNA-X N5245A is used as a vector receiver, and a mechanical tuner is used to vary the load impedance.

2.2.1. Characterization of Devices in Systems Calibrated Using the TRL Technique

With the aim of measurement, packaged transistors are accommodated in low-impedance transmission lines; the higher the device’s periphery, the lower the line’s impedance. Thus, the test fixtures used to accommodate these devices use impedance transformers to adapt transmission lines of low impedance to $Z_0$ (Figure 4a).

A 45 W transistor from Wolfspeed (CGH40045) was mounted in a fixture that comprises Klopfestein impedance transformers, with the aim of adapting transmission lines of 10 Ω characteristic impedance to 50 Ω transmission lines (Figure 4a). The system was calibrated at 3 GHz using the TRL calibration structures shown in Figure 4b–d, and contours of constant $P_{OUT}$ at the DUT plane were measured. The actual value of Z_L was assumed to be purely real (10 Ω).

Figure 5 shows contours of constant output power determined using Z_L = 10 Ω in the system calibration, along with output power contours determined using several erroneous Z_L values. As noted from Equation (12), since in the TRL technique R_L = 1, errors in Z_L represent proportional errors in Z_LD. Hence, the impedance for maximum power (Z_OPT) may be either underestimated or overestimated when the wrong value of Z_L is used during the system calibration. Similar linear dependence of Z_IN as a function of Z_L was reported in [18].

The impact of errors in Z_L in determining the large-signal gain is also addressed. From Equation (13), it may be noted that the calculation of the voltage gain (G_V) is not dependent on Z_L. Thus, the gain defined in terms of the incident (A₁) and transmitted (B₂) waves was evaluated as:

$$G_D=\frac{B_2}{A_1}=\frac{V_2-Z_0{I}_2}{V_1+Z_0{I}_1}=\frac{1+Z_0/Z_{LD}}{1+Z_0/Z_{IN}}{G}_V.$$

(24)

The G_D calculation depends on Z_L through Z_IN and Z_LD. The plots shown in Figure 6 show the amplitude and angle of G_D determined using different Z_L values in the calibration. It was observed that the calculation of the phase is more sensitive to Z_L than the magnitude.

2.2.2. Characterization of Devices in Systems Calibrated Using the TRM Technique

This section shows the usefulness of the proposed calibration procedure, allowing nonsymmetrical loads of arbitrary impedance to be used as a standard in the TRM technique. A VRLP system was calibrated at the center frequency of 3.5 GHz using the calibration structures shown in Figure 7b–d. The load (match) standard is formed by a 50 Ω resistor at port one and two 50 Ω resistors (connected in parallel) at port two. The loads at ports one and two were characterized using a network analyzer calibrated using the TRL technique [21,22]. The impedance of these loads was determined at 3.5 GHz as 53 + j13 Ω and 26 + j10 Ω, respectively.

Contours of constant Pout obtained from the measurement of a packaged transistor from the Wolfspeed (CGH40010) were measured, and the importance of taking into account the electrical characteristics of the match standard on the calculation of output power contours was analyzed.

First, to evaluate the accuracy of the TRM procedure, the results were compared to those obtained using the TRL calibration. The TRL procedure was implemented using the thru and reflecting loads used in the TRM technique and an additional transmission line. Figure 8 shows output power contours determined using these two techniques. The contours calculated using both procedures present high correlation, thus showing the accuracy of the proposed procedure.

Then, the impact of not taking into account the electrical characteristics of the match structure on the determination of output power contours was experimentally studied by considering the following three cases [19]:

• The value of Z_M1 and Z_M2 were considered as nonsymmetrical, but purely real and identical to their DC values (Z_M1 = 50 Ω; Z_M2 = 25 Ω). Figure 9a shows the calculated contours of constant $P_{OUT}$. These contours considerably differ from those shown in Figure 8a,b.
• Contours of constant output power determined by considering that the match structure is formed by two loads of identical impedance of 53 + j13 Ω are shown in Figure 9b.
• Similarly, contours of constant $P_{OUT}$, shown in Figure 9c, were determined considering that the match standard is formed by two loads of identical impedance. The impedance of these loads is assumed to be identical to Z_M1 = Z_M2 = 26 + j10 Ω.

For the case considered in this paper (Z_M2 < Z_M1), as shown in Figure 9b,c, ignoring the asymmetry of the match standard caused a contraction in the calculated impedance map. On the other hand, the load impedance map rotates when the imaginary part of the match standard impedance is ignored, as presented in Figure 9a. More results in which simultaneous rotation and contraction, caused by ignoring both asymmetry and frequency-dependence of Z_M2 and Z_M1, are shown in [19].

3. Large-Signal Characterization Using Modulated Signals

Modern communication systems are empowered by the use of complex modulation formats (e.g., Orthogonal Frequency-Division Multiplexing, OFDM) in order to meet data rate and spectral efficiency requirements. However, using these modulation formats results in the appearance of intermittent peaks that generate high Peak to Average Power Ratio (PAPR) levels. In order to obtain a desired performance (efficiency, linearity) at peak and average power levels, transmitter configurations using multiple amplifiers, e.g., Doherty, Chireix, have to be used. The principle of operation of these transmitter configurations is similar: the load of an amplifier, referred to as main, is modulated by an auxiliary amplifier, guaranteeing maximum swing in voltage and current independently of the signal input power.

Figure 10 shows the measurement system developed in [26,27], which aims to capture both static and dynamic behavior of the two amplifiers in a transmitter based on Doherty or Cheirex principles, as well as the behavior of the whole transmitter. In this system, the modulated baseband signals used to drive the inputs of the amplifiers are upconverted to RF frequency using a dual-channel AWG (Keysight M8190A). In the AWG, the IQ modulation is performed in the digital domain, thus avoiding signal distortion typically caused by analog IQ modulators. Highly linear amplifiers are used to boost the signals created by the AWG in order to properly drive the transmitter’s inputs. Bi-directional couplers along with Keysight PNA-X’s external receivers (including the H85 option) are used to sample the incident and reflected waveforms at both the inputs and the output of the transmitter, as depicted in Figure 10. In order to capture both CW and modulated signals, the PNA’s Spectrum Analyzer option was used. Independent DC supplies were utilized to bias the gate and drain of the two amplifiers, and two digital multimeters were used to measure the current at the output of the main and peaking amplifiers.

3.1. Calibration of the Measurement System

In order to accurately characterize dual-input devices using the testbed shown in Figure 10, the system has to be calibrated using the procedure introduced in [26,27]. Since the system comprises three ports (two inputs and one output), three-port relative calibration along with absolute power calibration are required. The calibration reference planes are denoted in Figure 10 with green lines. For the relative calibration, the well-known short-open-load-reciprocal (SOLR) calibration technique [25] was used (center frequency = 2.08 GHz, span = 500 MHz, tone spacing = 5 kHz). The phase of the different tones, comprising the signals at the input and output ports of the transmitter, are calculated by utilizing the PNA-X’s spectrum analyzer option. It is worth mentioning that, in this system, no phase reference is required for the measurement to be performed, as in the case of the well-known Nonlinear Vector Network Analyzer.

The calibrated PNA-X’s receivers realize a five-channel Vector Signal Analyzer. Then, the system proposed in [27] is referred to as Vector Signal Network Analyzer (VSNA). The amplitude- and phase-corrected signals at the PNA-X are captured by calculating ${\varphi }_r^{cal}\left(i\right)$, the differences between the signal at the VSNA and the reference OFDM signal at the AWG’s input, for the i tones at the frequency ${\omega }_i$ as:

$${\varphi }_r{}^{CAL}\left(i\right)={\varphi }_r{}^{raw}\left(i\right)-{\varphi }_{AWG}\left(i\right)+\left({\omega }_i-{\omega }_{LO}\right){\Delta }_{{\tau }_r}+{\Delta }_{{\varphi }_{LO}}{,}_r$$

(25)

where ${\Delta }_{{\tau }_r}$ represents the delay in each PNA-X’s receiver and ${\Delta }_{{\varphi }_{LO}}{,}_r$ represents the local oscillator phase. Since, in practice, ${\varphi }_r^{CAL}\left(i\right)$ is nearly identical for all the receivers, the average phase correction ${\varphi }_{avg}^{CAL}\left(i\right)$ over the receivers can be used to simplify Equation (25) as:

$${\varphi }_r{}^{CAL}\left(i\right)={\varphi }_{avg}^{CAL}\left(i\right)+\delta {\varphi }_r{}^{CAL}\left(i\right)$$

(26)

with $\delta {\varphi }_r{}^{CAL}\left(i\right)$ defined as the residual phase correction for the channel r.

In Figure 11 an example of the amplitude and phase correction for three receivers is shown.

The signal under analysis is an OFDM signal, with 64 QAM, tone spacing = 5 kHz, bandwidth = 500 MHz, and a sampling frequency = 1 GHz, where the average phase correction for the five receivers of the VNA is the term ${\varphi }_{avg}^{CAL}\left(i\right)$ and the term $\delta {\varphi }_r{}^{CAL}\left(i\right)$ represent the residual phase correction for the channel $r$.

The amplitude and phase corrections obtained for each receiver are shown in Figure 11a,b. For their extraction, an OFDM signal was used (bandwidth 500 MHz, 64 QAM), with tone spacing of 5 kHz, sampling frequency of 1 GHz, an average power of 18.87 dBm and PAPR 10.78 dB.

Figure 12 shows the phases of the 100,000 subcarriers (original and received) along with the relative errors for each subcarrier. For the sake of clarity, the phase of each subcarrier after alignment and after residual phase correction are also presented. The nearly constant difference between the original and the aligned phases (${\Delta }_{{\varphi }_{LO}}$) is used to define a phase offset between local oscillators of the AWG and the developed VSNA.

Figure 13 shows a flowchart that summarizes the post-processing calibration performed by the VSNA on the raw data.

In order to assess the accuracy of the VSNA, a comparison of its performance against a commercial VSA was performed.

Table 1. Average SNR and EVM captured using the VSNA and VSA. (From [27] with permission, © 2022 IEEE).

	VSNA/VSA
BW	10 MHz		20 MHz		100 MHz		120 MHz
avg SNR (dB)	43.29	29.76	43.02	29.40	40.94	28.52	41.08	27.50
avg EVM (dB)	−45.15	−35.91	−44.68	−34.38	−40.81	−29.12	−40.61	−27.37
avg EVM (%)	0.55	1.60	0.58	1.90	0.91	3.49	0.93	4.28

shows the SNR and EVM values calculated after correction for the case of several OFDM signals. The comparison was performed over different signal bandwidths. The results show that the EVM obtained using the VSNA is about 10 dB smaller than that obtained using the VSA, while the SNR is about 10 dB higher for all the cases analyzed.

3.2. HD-OPA Dynamic Characterization

To demonstrate the usefulness of the measurement testbed previously described, the static and dynamic behavior of a hybrid Doherty-Outphasing PA (HDOPA), shown in Figure 14, were extracted. Details about the design of the HDOPA were reported in [28]. However, for completeness, it is briefly described in this section. It consists of two power amplifiers, designed to operate at 2.1 GHz center frequency, the main PA working as class-F and the peaking PA as class-C, and an output power combiner. GaN-HEMT transistors model CGH40010, 10 W from Cree Inc. were used as active devices. The passive elements of the PA were designed and fabricated on Rogers substrate (RT Duroid 5880).

The Look-Up Table, shown in

Table 2. LUT of the hybrid Doherty-Outphasing PA for maximum efficiency. (From [27] with permission, © 2022 IEEE).

$$\begin{gathered} {\mathit{P}}_{\mathit{o}\mathit{u}\mathit{t}} \\ \left(\mathbf{dBm}\right) \end{gathered}$$	$$\begin{gathered} {\mathit{P}}_{\mathit{i}\mathit{n},1} \\ \left(\mathbf{dBm}\right) \end{gathered}$$	$$\begin{gathered} {\mathit{P}}_{\mathit{i}\mathit{n},2} \\ \left(\mathbf{dBm}\right) \end{gathered}$$	θ (degree)	$$\begin{gathered} {\mathit{\varphi }}_{\mathit{O}\mathit{P}\mathit{A}} \\ \left(\mathbf{degree}\right) \end{gathered}$$
27.38	13.71	11.36	21.04	−51.83
29.51	16.21	13.87	22.50	−51.22
31.03	17.95	15.69	19.15	−52.68
32.21	19.41	17.03	22.33	−50.81
34.29	21.91	19.83	32.82	−43.14
34.83	22.56	20.73	32.91	−41.59
36.36	23.83	22.28	42.88	−35.39
38.68	25.60	24.93	52.72	−28.54
40.25	26.73	26.94	62.23	−24.56
42.76	28.40	29.82	100.69	−16.62
43.26	28.39	29.81	110.69	−16.34
43.69	28.39	29.81	120.69	−16.10
43.99	28.38	29.80	130.69	−16.10

, was extracted using the measurement system reported in Figure 10. It provides the highest drain efficiency, which is applied to the original discrete time modulated signal $x\left(n\right)=\left|x\left(n\right)\right|\exp \left[j{\varphi }_x\left(n\right)\right]$. The input signals to the main and peaking PA are $x_1\left(n\right)$ and $x_2\left(n\right)$, which are given by:

$$x_1\left(n\right)=\sqrt{P_{in,1}\left[P_{out}\left(n\right)\right]} e^{j\left({\varphi }_x^{\prime }\left(n\right)+\frac{1}{2}\theta \left[P_{out}\left(n\right)\right]\right)}$$

(27)

$$x_2\left(n\right)=\sqrt{P_{in,2}\left[P_{out}\left(n\right)\right]} e^{j\left({\varphi }_x^{\prime }\left(n\right)-\frac{1}{2}\theta \left[P_{out}\left(n\right)\right]\right)}$$

(28)

where ${\varphi }_x^{\prime }={\varphi }_x-{\phi }_{OPA}\left[P_{out}\left(n\right)\right]$ and $P_{in,i}\left[P_{out}\left(n\right)\right],$ $\theta \left[P_{out}\left(n\right)\right]$ are the incident power at the DUT input ports and the outphasing angle between its inputs, respectively. Figure 15 shows the HD-OPA drain efficiencies versus its power obtained from simulation (black line) and measurement testbed (blue line), and the measured optimal drain efficiency is depicted with the red line. For the DUT simulation, the Harmonic Balance of the Advanced Design System (ADS) was used. The measurements were taken by sweeping the outphasing angles between 20 to 130 degrees for several incident power levels at the DUT inputs.

Table 2 shows the LUT extracted to obtain the optimal drain efficiency; it contains the input power levels $P_{in,1/2}$ and the outphasing angle θ needed to drive the PA for each output power $P_{out}$.

The static and the dynamic behavior of the DUT are shown in Figure 16, represented with red and blue dots, respectively. From Figure 16 it is observed that the dynamic curves agree fairly well with the static ones, despite the existence of memory effects.

The HD-OPA dynamic gain behavior, reported in Figure 16, is obtained by applying the LUT from Table II to an original 10 MHz OFDM signal. The slight upper shift of the dynamic gain is believed to be due to the dynamic bias effect [29].

The VSNA proposed in [27] allows obtaining the static and dynamic curves of multiple-input PAs using the same test setup, without modifying the system for different measurement needs.

4. Low-Frequency Active Harmonic Load-Pull: An Experimental Study of the RF Capabilities of Power Transistors

Efficiency, power, and linearity are the key metrics used to evaluate the performance of RF power amplifiers. These metrics are typically determined using high-frequency harmonic load-pull systems, either passive or active. However, regarding the assessment of the maximal performance related to transistor technology used in power amplifier applications under different amplifier operation modes, it is required to identify the voltage and current waveforms occurring at the transistor’s current generator plane.

Two methods are used to identify these waveforms: from simulations using CAD tools [30] or from large-signal measurements [31,32,33,34]. In order to study the behavior of a power amplifier using CAD tools, nonlinear transistor models are required; thus, the capabilities of the transistor model to represent the device large-signal behavior heavily impacts the accuracy of this method [35]. By comparison, waveform measurements using commercial high-frequency (HF) load-pull systems [31,32] require the use of state-of-the-art measurement equipment, such as a nonlinear vector network analyzer or a large-signal network analyzer [36]. Further, both linear and nonlinear de-embedding procedures are needed since the effect of the device parasitic and the nonlinear capacitive networks have to be removed in order to access the intrinsic current generator. At low frequencies, the effect of reactive parasitic elements can be neglected, and the transistor’s equivalent circuit may be simplified to that shown in Figure 17.

4.1. Time-Domain Low-Frequency Load-Pull System

In Figure 17, the schematic diagram and picture of the time-domain LF active harmonic load-pull system developed in [35] is shown. In [35] the system operation was extensively described; in this paper a brief review of the measurement system functionality is provided. The main elements of the system are a four-channel oscilloscope and directional couplers, which allow sensing of the waves at the input and output ports of the DUT, along with other elements that allow the system to properly operate, such as bias networks, DC power supplies, and driver power amplifiers to boost the signals at the DUT ports. The DUT voltage ($v_{gs}\left(t\right)$, $v_{ds}\left(t\right)$) and current ($i_{ds}\left(t\right)$) waveforms may be expressed as a function of the incident ($v_{gs}^i\left(t\right)$, $v_{ds}^i\left(t\right)$) and reflected ($v_{gs}^r\left(t\right)$, $v_{ds}^r\left(t\right)$) sensed voltage waveforms as:

$$v_{gs}\left(t\right)=v_{gs}^i\left(t\right)+v_{gs}^r\left(t\right),$$

(29)

$$v_{ds}\left(t\right)=v_{ds}^i\left(t\right)+v_{ds}^r\left(t\right),$$

(30)

$$i_{ds}\left(t\right)=\left(v_{ds}^r\left(t\right)-v_{ds}^i\left(t\right)\right)/Z_0,$$

(31)

where Z₀ is the measurement system impedance (typically 50 Ω).

4.2. Experimental Results

In this paper, three examples of the usefulness of the time-domain low-frequency active harmonic load-pull system, shown in Figure 18, are presented. In the first, the load lines of a GaN-HEMT transistor are measured at four different drain-source voltages, and for two different gate-source voltages, as reported in Figure 19. It can be noted that, as the quiescent bias point shifts to large drain-source voltages, the knee voltage increases, and the drain-source current decreases. These phenomena, reported by P. Tasker [31] and A. Raffo [33,34], are produced by traps and are known as knee walkout and current collapse, respectively. Figure 20 shows the load-lines measured for a SiC MESFET biased as Class-B mode at four different drain-source voltages. Notice that SiC MESFET is free of knee walkout and current collapse, but the knee voltage in SiC is larger than that observed in GaN. A large knee voltage typically limits the maximum achievable power and efficiency of a transistor in a power amplifier.

.

As a second example of the usefulness of the measurement system shown in Figure 18, the behavior of transistors under harmonically-tuned operation modes was studied. An example, Class-F, is presented. According to theory, the Class-F [37] operation mode should be biased as Class-AB mode but loading the intrinsic current generator with a short circuit and an open circuit at the second and third harmonic, respectively [38]. In Figure 21, the impedance design space of the Class-F modes for the fundamental, second, and third harmonics for a GaN-HEMT and SiC-MESFET are presented.

Figure 22 shows the load lines along with the current and voltage waveforms of a GaN-HEMT measured when loading the transistor with the impedances for maximum output power. Note that the half-rectified shape of the drain-source current waveform and the rectangular shape of the drain-source voltage waveform are consistent with the theory [38]. Figure 23 shows the same set of load lines along with the current and voltage waveforms of a SiC-MESFET. These intrinsic load-lines cannot be determined directly from time-domain HF load-pull measurements.

A recently published work [36] reports an experimental study about Class-J power amplifiers using the test bench shown in Figure 17. The Class-J amplifier [32,39] is generated by appropriately manipulating the fundamental (reactive load instead of resistive load) and second harmonic (reactance instead of short circuit) impedances. The reactive load at the fundamental is the main difference between Class-J and Class-F amplifiers. The third example is the Class-J amplifier. Figure 24 shows the impedance design space (fundamental and second harmonics), synthesized using the load-pull system shown in Figure 24, for the Class-J amplifier.

Figure 25 shows measurements of the current and voltage waveforms at the current generator plane, when the fundamental load is the optimal load and when the transistor is biased as Class-B, and varying the amplitude and phase of the second harmonic impedance.

Figure 26 shows the output power and drain efficiency of a Class-J amplifier. According to the theory of resistive reactive Class-J [32], the output power and drain efficiency must be independent of the α parameter but dependent on the β parameter. However, small variations in Pout versus α are observed. According to experimental results published in [36], when α is close to ±1, the current reduction seems to be the origin of the small variations in the output power with α.

5. Conclusions

The design of high-performance power amplifiers is greatly benefited by the use of advanced measurement systems, which need to be calibrated correctly to operate efficiently. In this paper, the complete process to achieve large-signal characterization of power transistors and amplifiers is presented, from calibration of the VRLP system to its use in the implementation of systems allowing the characterization of devices under modulated signal excitation, and systems allowing the implementation of time-domain active load-pull systems. The goal of CICESE’s RF and Microwave Research Group is to generate knowledge in the field of large-signal RF metrology with the aims of characterizing power transistors and designing power amplifiers. Current activities are focused on the study of continuous mode Class-J and Class-F power amplifiers, using the measurement systems described in previous sections. In the following order, our current goals are: (1) to develop high- and low-frequency active harmonic load-pull systems, (2) to design continuous mode Class-J and Class-F amplifiers using non-linear de-embedding, and (3) to study and characterize dual-input power amplifiers, stimulated with modulated signals using a vector signal analyzer and vector network analyzer.