Hydrogen-Terminated Single Crystal Diamond MOSFET with a Bilayer Dielectric of Gd₂O₃/Al₂O₃

Abstract

In this paper, two dielectric layers of Al₂O₃ and Gd₂O₃ were prepared by an atomic layer deposition (ALD) and magnetron sputtering deposition (SD), respectively. Based on this, a metal-oxide-semiconductor field-effect transistor (MOSFET) was successfully prepared on a hydrogen-terminated single-crystal diamond (H-diamond), and its related properties were studied. The results showed that this device had typical p-type channel MOSFET output and transfer characteristics. In addition, the maximum current was 15.3 mA/mm, and the dielectric constant of Gd₂O₃ was 24.8. The effective mobility of MOSFET with Gd₂O₃/Al₂O₃ was evaluated to be 182.1 cm²/Vs. To the best of our knowledge, the bilayer dielectric of Gd₂O₃/Al₂O₃ was first used in a hydrogen-terminated diamond MOSFET and had the potential for application.

1. Introduction

Diamond has many excellent electrical properties, such as an ultra-wide band gap (5.45 eV), high breakdown voltage (>10 $\mathrm{MV}/\mathrm{cm}$), high carrier mobility (electron: 4500 ${\mathrm{cm}}^2/\mathrm{Vs}$, hole: 3800 ${\mathrm{cm}}^2/\mathrm{Vs}$), the highest thermal conductivity (22 $\mathrm{W}/\mathrm{K}\cdot \mathrm{cm}$), effective resistance, etc. [1,2,3,4,5,6,7,8,9,10]. All of these characteristics make a diamond a promising semiconductor material. In this way, electronic devices made of this material can withstand higher voltage and temperature, and their parasitic parameters are smaller, especially parasitic capacitance and conduction resistance. Compared with other semiconductors, it is more suitable for application at a high frequency, high power, high temperature, and harsh environment. Due to the high activation energy of dopants commonly used in the semiconductor industry, such as boron (380 $\mathrm{meV}$) and phosphorus (570 $\mathrm{meV}$), the carrier densities of diamonds are low at room temperature [8]. To solve this problem, the δ-doping technique has been used to manufacture diamond metal oxide semiconductor field effect transistors (MOSFETs) [11,12,13]. However, the δ-doping technique has not been widely used because of its complex doping process and low carrier mobility. In practical applications, a two-dimensional hole gas (2DHG) layer was formed due to the hydrogen termination on its surface, with a sheet density of 10¹³ ${\mathrm{cm}}^{-2}$ and mobility of 30–200 ${\mathrm{cm}}^2/\mathrm{Vs}$, by which a hydrogen-terminated MOSFET device was developed. The C-H bonds on the H-diamond surface are easily affected by their external environment and lead to bond fracture, influencing its related properties [8]. Therefore, a dielectric layer can be deposited to protect the surface, and the commonly applied dielectric materials for this are Al₂O₃, Ta₂O₅, ZrO₂, HfO₂, Y₂O₃, LaAlO₃ and so on [14,15,16,17,18,19,20,21]. The above dielectric layers can be prepared by atomic layer deposition (ALD) and magnetron sputtering (SD). However, the plasma discharge affects 2DHG during SD [21]. Therefore, ALD technology is typically used to deposit an Al₂O₃ layer to protect the H-diamond.

MOSFET devices have a wide range of applications in integrated circuits as well as in 5G/WiMAX/WLAN communications [22,23]. In MOSFET, a high dielectric constant (high-k) can control large charge responses and high-density carriers at a small bias voltage, which indicates that the preparation of a high dielectric constant (high-k) on h-diamond is promising [17,19,20]. In the selection of the new high-k dielectric layer, the first point is that the k value of the dielectric layer should be high and thermodynamically have good stability to ensure that the device can work under harsh conditions; its band bias as an insulator whose contact with the semiconductor should exceed 1 eV can reduce carrier injection; the dielectric layer in the MOS structure should form a good electrical interface with the semiconductor; and finally, the dielectric layer should have lower volume electrical defects. Gadolinium oxide (Gd₂O₃) is a promising dielectric for the H-diamond MOSFET with a high dielectric constant (9–14) and large band gap (5.3 $\mathrm{eV}$) [24,25,26]. In addition, due to its stable properties, the dielectric layer and the semiconductor film base were better bonded with a lower density of interfacial states, and the leakage current of the device was small, which is now widely used in dynamic random memory and other fields. To our knowledge, Gd₂O₃ as the dielectric layer has not been reported for its utilization in H-diamond MOSFETs.

In this work, we fabricated single-crystal H-diamond MOSFET, Al₂O₃ was used as a buffer layer by ALD technology, and Gd₂O₃ was applied by SD technology to form a double dielectric layer structure. Then, the electric properties were investigated at room temperature.

2. Material and Methods

One 3 × 3 × 0.5 mm³ high-pressure and high-temperature (HPHT) synthesized (001) single-crystal diamond was used as a substrate.

Figure 1 shows the device preparation process of Gd₂O₃ and Al₂O₃ dual dielectric layer H-diamond MOSFETs. Before this, impurities on the diamond substrate were removed by acid cleaning (H₂SO₄:HNO₃ = 31.2:36, at 250 °C) to ensure the consistency of the device’s performance. Then, a 200 nm undoped single-crystal diamond was grown on the HPHT substrate by a microwave plasma CVD system. The methane flow rate was then set to zero and treated with hydrogen to form 2DHG, as shown in Figure 1b. Next, the source and drain images were prepared on the substrate surface by traditional photolithography. After that, a 150 nm Au film was plated on the substrate surface by electron beam deposition (EB), and a source leakage electrode was obtained by stripping, as shown in Figure 1c. The distance between the source and drain was 20 μm (L_SD = 20 μm). Then, the device channel was covered with photoresist, and the sample was treated with UV/Ozone to isolate the device. After isolation, 20 nm Al₂O₃ was deposited using the ALD system. The precursors in the above process were water vapor and TMA. The ALD process was divided into 5 nm (80 °C) and 15 nm (250 °C) steps. Then, 52.3 nm Gd₂O₃ was deposited by SD at room temperature (RT), as shown in Figure 1f. The deposition pressure, power and time were 0.5 Pa, 75 W and 30 min, respectively. Finally, the 150 nm Al electrode was deposited on the device by EB, and the complete MOSFET device was finally obtained after stripping, as is shown in Figure 1g. The length (L_G) and width (W_G) of the gate were 20 μm and 100 μm, respectively. The section diagram of the device is shown in Figure 1h.

The electrical properties of the Gd₂O₃/Al₂O₃ H-diamond MOSFETs were investigated using an RT probe system in the air. This system has two test channels, AC and DC, and can be used for the performance testing of various electronic devices. In this work, the output characteristics, transfer characteristics, and C–V characteristics of MOSFETs were mainly tested.

3. Results and Discussion

Figure 2a shows the output characteristics curve (I_D-V_GS) of the H-diamond MOSFET with Gd₂O₃/Al₂O₃ dielectric layers. In this figure, V_DS varied from 0 to −20 V. The V_GS was from −10 to 4 V with the step of 1 V. The device in the figure shows the characteristics of p-type MOSFET, indicating that 2DHG was successfully generated on the H-diamond. The variable resistor, as of the region and the saturation region of the MOSFET, can be clearly observed in the output characteristic curve. In the figure, we can see that the maximum current (I_D) was −15.3 $\mathrm{mA}/\mathrm{mm}$ at V_DS = −20 V and V_GS = 10 V. Figure 2b shows the current characteristics of MOS dielectric layers on the device under operating conditions at gate leakage with a source-drain voltage V_DS ranging from 0 to −20 V and gate control voltage V_GS from −3 to 3 V in steps of 1 V. For the MOSFET, the device gate leakage current was at a small level when the gate voltage was in the range of −3 to 3 V and between 5 × 10⁻⁸ mA/mm and −5 × 10⁻⁸ mA/mm. This meant that the current leakage from the gate to the channel in the operating state was small, and the interference to the device was small. In addition, the device had good saturation characteristics and low current jitter during testing. This indirectly indicates that the dielectric layers (Gd₂O₃/Al₂O₃) were stable, and the device had a small leakage current.

Figure 3a shows the transfer characteristic curve (I_D-V_GS) of the device in the logarithmic coordinate system at V_DS = 10 V. In the figure, the maximum value of I_D was 30 $\mathrm{mA}/\mathrm{mm}$ at V_GS = −20 V, and the minimum value was 6.3 × 10⁻⁸ $\mathrm{mA}/\mathrm{mm}$. Therefore, the ON/OFF ratio of this device could reach at least 5 × 10⁸. This on/off ratio was more than sufficient in practical applications. The subthreshold swing (SS) was 315 mV/dec, as extracted from Figure 3a. The subthreshold swing of the device was too large to cause the MOSFET switching rate to slow down, possibly due to poor interfacial state characteristics at the interface between the semiconductor and dielectric layers. Figure 3b shows the extrinsic transconductance (g_m) versus V_GS curves at V_DS = 10 V. The maximum external transconductance was 2.01 mS/mm at V_GS = −10.63 V.

Figure 4 shows the transfer characteristic curves of the device in linear coordinates at V_DS = 10 V. Using the method in Reference [8], the threshold voltage (V_TH) was 1.12 V.

Figure 5a shows the gate area capacitance–voltage (C-V) curves at a 100 KHz frequency. In the figure, the red line and the black line represent the C–V curves of the voltage when scanned from 6 to −6 V and −6 to 6 V, respectively. Both curves showed typical regions of accumulation and depletion, and 0.146$\mathsf{\mu }\mathrm{F}/{\mathrm{cm}}^2$ was the maximum value of capacitance (C_OX). In order to more accurately calculate the dielectric constant of Gd₂O₃, the same process was used to prepare MOSFETs of the Al₂O₃ dielectric layer of the same thickness and their C–V characteristics were measured. Here, we used Equation (1) to calculate the dielectric constant:

$$\mathrm{k}=\frac{\mathrm{Cd}}{{\mathsf{\epsilon }}_{\mathrm{o}}\mathrm{S}}$$

(1)

where k, d, C, ${\mathsf{\epsilon }}_{\mathrm{o}}$ and S are the dielectric constant, thickness, capacitance, electrostatic force constant and area, respectively. According to Equation (1), the overall dielectric constant of the double dielectric layer was calculated to be 11.9. As for ALD-Al₂O₃ MOSFET, the dielectric constant (k_Al2O3) was calculated as 4.9. Similarly, the dielectric constant of SD-Gd₂O₃ was 24.8. This value was larger than the dielectric constant of Gd₂O₃ (9~14), as recorded previously in the literature [24,25,26].

As shown in the blue line in Figure 5a, the flat band voltage (V_FB) was calculated to be −0.62 V using the method in reference [14]. Based on this, we could calculate the flat band capacitance (C_FB) to be 0.137 μF/cm².ΔV_FB is the hysteresis voltage (−0.12 V) obtained by C_FB in Figure 5a. Therefore, the trapped charge densities (Q_t) in SD-Gd₂O₃/ALD-Al₂O₃ could be calculated as 1.08 × 10¹¹ cm⁻² by Equation (2). The gate metal in this device was Al, and its work function was 4.28 eV. The work function of the hydrogen terminal diamond is 4.9 eV, from which the flat-band voltage (V_FB0) in the ideal state was calculated to be −0.62 V. The flat-band voltage obtained using the forward capacitance voltage characteristic was 0.62 V. Using Equation (3), it could be calculated that the fixed charge density in the device was 1.04 × 10¹² cm⁻² and the fixed charge type was negative, which had no compensating effect on 2DHG in the hydrogen terminal diamond and was the reason behind why the device behaved normally on this type. In Figure 5a, we calculate the carrier density (p) as 7.08 × 10¹² cm⁻² using Equation (4), V_GS = −6 V. Figure 5b shows the accumulation of the device carrier concentration with voltage.

$${\mathrm{Q}}_{\mathrm{t}}=\frac{{\mathrm{C}}_{\mathrm{OX}}{\mathsf{\Delta }\mathrm{V}}_{\mathrm{FB}}}{\mathrm{q}}$$

(2)

$${\mathrm{Q}}_{\mathrm{f}}=\frac{{\mathrm{C}}_{\mathrm{OX}}({\mathrm{V}}_{\mathrm{FB}0}-{\mathrm{V}}_{\mathrm{FB}1})}{\mathrm{q}}$$

(3)

$$\mathrm{p}=\frac{1}{\mathrm{q}}\int {\mathrm{CdV}}_{\mathrm{GS}}$$

(4)

Figure 6a shows the relationship between carrier mobility (μ_eff) and V_GS. μ_eff was calculated by Formula (4) to be 182.1 ${\mathrm{cm}}^2/\mathrm{Vs}$ when V_GS was 1 V. Comparing this with Figure 5b, it can be seen that as the gate voltage increased, the carrier concentration accumulated and increased, but the effective carrier mobility of the channel decreased. When the carrier concentration increased, the collision probability of the carriers in the semiconductor increased, leading to an increase in scattering and resulting in an effective carrier mobility decrease.

$${\mathrm{I}}_{\mathrm{D}}=\frac{{\mathsf{\mu }}_{\mathrm{eff}}{\mathrm{W}}_{\mathrm{G}}{\mathrm{C}}_{\mathrm{OX}}}{2{\mathrm{W}}_{\mathrm{L}}}{\left({\mathrm{V}}_{\mathrm{GS}}-{\mathrm{V}}_{\mathrm{TH}}\right)}^2$$

(5)

Figure 6b shows the leakage current density (J) of the sample in a logarithmic coordinate. In the figure, V_GS varies from −5 V to 5 V. When the voltage changed within this range, MOSFET showed a very small leakage current. The leakage current density was basically less than 3 × 10⁻⁷ A/cm² at V_GS = −5 V and 9 × 10⁻⁷ A/cm² at V_GS = 5 V. In the figure it can be seen that when the gate voltage was −5 V, the device leakage current took the maximum value of 1 × 10⁻⁷ A/cm². Additionally, in the other voltage ranges, the current density leaking from the gate varied from 0.5 × 10⁻⁷ A/cm² to −0.5 × 10⁻⁷ A/cm². The leakage current magnitude was at a better level among equivalent studies. This indicates that the insulating properties of the films prepared in this experiment using magnetron sputtering and atomic layer deposition were better.

The device in this work is a planar MOSFET, and the on-state resistance R_on of the device in the operating state could be divided into two parts: the first part was the high resistance state region covered by the gate channel, and the other part was the low resistance state part R_SD not covered by the gate. The resistance of the low resistance state part was generated due to the resistance of the electrode and the hydrogen terminal diamond. The equation to calculate the effective carrier mobility (μ_eff) at the channel based on the on-resistance is:

$${\mathrm{R}}_{\mathrm{on}}={\mathrm{R}}_{\mathrm{Au}}+{\mathrm{R}}_{\mathrm{h}}+\frac{{\mathrm{L}}_{\mathrm{G}}}{{\mathrm{W}}_{\mathrm{G}}{\mathsf{\mu }}_{\mathrm{eff}}{\mathrm{C}}_{\mathrm{ox}}\left|{\mathrm{V}}_{\mathrm{GS}}-{\mathrm{V}}_{\mathrm{TH}}\right|}$$

(6)

The on-state resistance at each gate voltage of the device could be extracted in the unsaturated region of the output characteristic curve. For the prepared devices, the electrode resistance R_Au and the hydrogen terminal diamond resistance R_h in the uncovered part were determined values, and the fixed slope value and intercept could be obtained by fitting the device with on-state resistance R_on and 1/|V_GS − V_TH| to calculate the effective carrier mobility of the hydrogen terminal diamond and the source-drain series resistance R_SD of the device, Figure 7 shows the on-state resistance R_on and 1/|V_GS − V_TH| fitting relationship for MOSFET.

When fitting the part of 1/|V_GS − V_TH| that was linearly related to the on-resistance R_on in the range from 0 to 0.5 V⁻¹, the fitted relations for the devices could be obtained as:

$${\mathrm{R}}_{\mathrm{on}}=42474\times \frac{1}{\left|{\mathrm{V}}_{\mathrm{GS}}-{\mathrm{V}}_{\mathrm{TH}}\right|}+1451$$

(7)

The effective carrier mobility of the device was extracted from the slope of the fitted straight line as 20.04 cm²/Vs, and the on-state resistance was 1451 Ω.

Finally,

Table 1. Device performance comparison between this work and other works.

This Work	Dielectric Layer	Dielectric Constant	IDmax (mA/mm)	Carrier Density (cm−2)	μeff (cm2/Vs)
This work	Gd2O3/Al2O3	24.8/4.9	−15.3	7.08 × 1011	182.1
[1]	Al2O3	3.5	−790	1013	150
[14]	HfSiO4/Al2O3	9	−25	5.4 × 1011	217.7
[23]	YSZ/Al2O3	16.1	−5.5	-	80.4

shows a comparison of the parameters between this work and several previous MOSFETs, such as Al₂O₃ [1], HfSiO₄/Al₂O₃ [14], YSZ/Al₂O₃ [23]. The devices prepared in this paper are at the normal level in the related studies [27,28,29,30,31,32,33]. Moreover, the dielectric constant of Gd₂O₃ is at a high level.

4. Conclusions

In summary, a MOSFET with an SD-Gd₂O₃/ALD-Al₂O₃ bilayer dielectric was successfully fabricated on a single-crystal H-diamond. The electrical properties of the MOSFET were measured at room temperature. As can be seen from the output characteristic curves, I_Dmax was 15.3 mA/mm at V_DS = −20 V and V_GS = 10 V. Based on the transfer characteristic, V_TH and the on/off ratio were 1.12 V and 5 × 10⁸, respectively. In addition, the g_m and the subthreshold swing of the device were 2.01 $\mathrm{mS}∕\mathrm{mm}$ and 315 mV/dec, respectively. According to the C–V results, the trapped charge densities of the MOSFET in the gate dielectric layers was 1.08 × 10¹¹ cm⁻². The dielectric constants (k) of ALD-Al₂O₃ and SD-Gd₂O₃ were evaluated to be 4.9 and 24.8. The value of μ_eff was evaluated to be 182.1 cm²/Vs at V_GS = 1.0 V. Furthermore, due to the stable properties of Gd₂O₃, the leakage current density (<1 × 10⁻⁷ A/cm²) of the MOSFET was very small.