A Solar Photovoltaic Array and Grid Source-Fed Brushless DC Motor Drive for Water-Pumping Applications

Abstract

This article presents a brushless DC motor drive using a solar photovoltaic (PV) array and grid. Solar PV array-fed drive systems typically need a DC–DC converter stage in order to optimize the solar PV array-generated power utilizing a maximum power point (MPP) tracking technique. In this work, a boost DC–DC converter is used for MPP tracking purposes. This work utilizes an incremental conductance (INC) MPP-tracking algorithm. A bridgeless asymmetrical converter without a bridge rectifier is used at the grid side to improve power quality at supply mains. The presented asymmetrical converter is an amalgamation of a second order (buck boost) with a fourth-order (Cuk) converter, which lowers the net system’s order. The input inductor of the Cuk converter manages the input current profile and, thus, eradicates the need for the filter at the grid mains. The bridgeless asymmetrical converter comes with several advantages, such as rectifier removal, component reduction, and input filter elimination. The performance of the brushless DC motor is examined in this article in all three scenarios: first, when grid and solar energy are both present; second, when solar energy is the only source of energy; and third, when grid energy is the only source of energy. The dual-source-based brushless DC motor drive system has been developed on matrix-laboratory/Simulink. The results are deployed and discussed to verify the drive-system performance. The article also presents a detailed stability analysis and mathematical modeling of the presented power-quality converter and MPP tracking converter to verify different converters’ stability using a bode diagram and a pole-zero plot.

1. Introduction

The dwindling supply of fossil fuels and rising emission rates of carbon influence customers to switch to clean energy sources. The best substitute for traditional sources for a variety of appliances is solar photovoltaic (PV) generation [1]. In light of this, the past several decades have seen a significant increase in fascination with the use of PV energy for water-pumping purposes [2,3]. Initially, DC motors were used to pump the water, followed by an ac induction motor [4]. Numerous studies on electric motor drives have been conducted to enhance the effectiveness and cost-effectiveness of PV-fed pumping stations. Since the previous decade, people have opted for permanent magnet brushless DC (BLDC) motors because of their excellent efficiency, superior power density, lack of maintenance, lengthy lifespan, lack of electromagnetic interference (EMI) problems, and diminutive size [5]. The use of this machine has been found to improve functionality and ensure an almost zero-maintenance operation while also lowering both the price and the dimension of PV panels [6]. The present BLDC motor-driven pumping systems supplied by PV panels hinge only on sunlight for energy because they are a grid-isolated system. Solar PV power has significant limitations due to its sporadic nature, which leads to unstable water-pumping systems. PV water pumps are severely disrupted by adverse weather conditions, and the system is underutilized since the pump is not used to its full potential. Additionally, no sunlight during moon time causes the water-pumping plant to stop working. In order to obtain a dependable PV-powered pumping plant, these flaws must be fixed. There are not many attempts in [7,8,9,10] in this relation, but they do not involve BLDC motor drives, which use batteries as energy storage. The battery is both charged and discharged in response to full and insufficient solar radiation (or no radiation), respectively, coupled with a bidirectional control, ensuring continual full water flow. In contrast, adding battery storage to the PV-based pumping plant increases total costs as well as maintenance and shortens the life of the system [11,12]. The typical serviceable life of a lead-acid battery is between two and three years, generally [13]. Due to the aforementioned drawbacks of battery storage, researchers are now focusing on a different type of technology that might be the most ideal in every way for dependable solar-powered water-pumping plant. The reality is that these newly acknowledged technologies connect a PV-producing unit installed for water-pumping purposes to a utility grid. The main focus is to maintain continuous water pumping at a maximum capacity irrespective of the operating circumstances, including day or night. An energy-management system that determines whether to take electricity from a PV array or from the utility (when the PV array is inadequate to operate the pump) is described in [14] for a grid-connected water-pumping plant. The PV array and grid-connected inverter’s shared dc bus is connected to a water pump and a pump controller. Since there is no need for battery storage, the system’s lifespan is increased, while the cost of servicing and production is decreased. However, the designed control only allows for unidirectional power flow. Thus, any extra or unused power from the PV array that is not needed for pumping is not sent back to the utility grid. The PV installation is not being used to its full potential as a result, and consumers are liable for a power bill. Another similar arrangement [13] uses a grid inverter to feed PV energy into the utility grid first, and a pump inverter to feed water pumps from the grid. Despite being a PV pumping plant tied to the grid, it looks to be a grid-fed system. In [15], a combination approach to a PV water-pumping plant is described. In this system, a pack of batteries is charged by PVan array of photovoltaic cells using a charge controller, and then it is released to power the water pump through an inverter. A utility interface enabled by an optional switch also supports the pump. Due to the additional production and maintenance costs of battery storage, this arrangement becomes pricey. In [16,17], a portion of the PV system is used to pump water, and the remaining portion is used to feed energy to the grid. The technology is unreliable because pumping requires only PV energy and does not use any utility power. The problem with the grid-connected BLDC motor-used pumping plant is its low power-quality operation as it draws peaky main currents, and the harmonic disturbances registered are nearly 60% [18,19], which disobeys the limits instructed in a IEC-61000-3-2 standard [20]. The main issue with the PV panel-fed plant is its discontinuous behavior, while the main concern while operating with those plants is to extract maximum power whenever it is available. This research article presents a solar photovoltaic array and grid (dual) source-fed BLDC motor drive for water-pumping purposes. The grid uses a rectifier-less bridgeless configured AC–DC converter operated in DiCM (discontinuous inductor current mode) as a power-factor augmenter (PFA), and the PV array uses an incremental conductance (INC) method for maximum power point tracking purposes [21]. Several non-isolated and isolated BLDC motor-driver networks are discussed in [22,23,24,25,26,27,28]. Ref. [29] discusses a sensor-less BLDC motor driver using a canonical cell converter. The INC MPP method-based PV-fed Zeta converter is elaborated in [30]. Ref. [31] discusses boost converters in an interleaved style for driving BLDC motor. The system presented is shown in Figure 1. The system uses an AC–DC converter, eliminating the rectifier that would have four diodes contributing significantly towards switching losses. The rectifier is a non-linear component that adds nonlinearity to the system. The system uses a bridgeless configured second- and fourth-order sandwiched converter. The usage of the second order with a fourth-order converter, and sharing some elements in both the half cycles, reduces the requirement of energy-storage elements, which reduces the apparatus’s order. The elimination of a low-pass filter due to input terminal inductance reduces the requirement of two energy-storing components (one inductor and a capacitor) and, thus, reduces the system’s order. In this study, the BLDC motor performance is examined in this article in all three scenarios: first, when grid and solar energy are both present; second, when solar energy is the only source of energy; and third, when grid energy is the only source of energy. The presented PFA converter has several benefits, such as an extra backfeed diode, an inductor, a low-pass filter, a bridged rectifier, and sensor eradication. These not only reduce the conduction, as well as switching losses, but they also make the system compact.

2. PFA Converter and MPP Converter Configuration

The PFA converter in the system is used in DiCM for PFA operation, which matches the mains voltage and current profile. The MPP converter connected to the PV source performs a twin function: tracking the maximum power and converting terminal voltage to 1/(1 − d_PV) times V_PV where d_PV is the duty of the MPP converter.

2.1. Operation of PFA Converter

The PFA converter operating under DiCM was explained in the preceding section. Under DiCM, there is an aggregate of six situations for PFA converters: three occur during the main voltage’s negative semi-cycle, while the remaining three occur during the positive semi-cycle. Both of the semi-cycle processes of the PFA converter are detailed in the later part of this section to offer an additional understanding on its functioning; all six cases are elaborated due to the unsymmetrical structure and behaviour of the PFA converter. Figure 2a–f show the PFA converter’s conduction loop under various potential conditions.

DICM working of PFA converter in various scenarios:

• Main voltage’s positive semi-cycle
  • Switch S_Y is switched on.
  • Gate pulse withdrawn from Switch S_Y.
  • Inductor current I_LY vanishes with S_Y in the same state as Case 2.
• Main voltage’s positive semi-cycle

  4.

  Switch S_X is switched on.

  5.

  Gate pulse withdrawn from Switch S_X.

  6.

  Diode current I_DY finishes with S_X in off state (negative cycle DICM).

The PFA converter’s functionality during various DICM mode operations is explained as follows

(1)

Mode I—The start of the positive semi-cycle of the main voltage initiates Mode I. IGBT S_P is provided with a gate pulse throughout this time period. In addition, C_F–L_F–V_G–C_F and C_F–S_Y–L_Y–C_F are the conduction networks for this mode. The built-in anti-parallel IGBT (S_Y) diode additionally conducts during Mode I to complete the loop. In Figure 2a, a Mode I conduction path is deployed.

The following relationship is utilized for determining the inductor current:

$${\mathrm{V}}_{\mathrm{L}}=\frac{{\mathrm{Ldi}}_{\mathrm{L}}}{\mathrm{dt}}$$

(1)

The maximum flow of the current through an IGBT S_Y operating in Mode I can be calculated as:

$${\mathrm{i}}_{\mathrm{SY}\_\mathrm{peak}}=-\frac{{\mathrm{V}}_{\mathrm{CY}}{\mathrm{d}}_1{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{F}}}$$

(2)

where TS stands for time interval and d1 for the duty cycle.

(2)

Mode II—IGBT S_P is removed with an input gate pulse in Mode II. In Figure 2b, Mode II conduction loops are shown. The inductor L_Y discharges in Mode II via the load and diode D_Y. The formula can be used to calculate the diode current, which is:

$${\mathrm{i}}_{\mathrm{DY}\_\mathrm{peak}}=-\frac{{\mathrm{V}}_{\mathrm{C}0}{\mathrm{d}}_1{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{Y}}}$$

(3)

(3)

Mode III—The third and final mode of the positive semi-cycle is called DiCM. In Figure 2c, Mode III conduction loops are deployed. When the inductor’s energy storage is depleted, ModeVI begins.

(4)

Mode IV—IGBT S_N is delivered with a gate signal in Mode IV. V_G–S_X–C_F–L_F–V_G and S_X–C₀||R–L_X2–C_X–S_X comprise the Mode IV conduction network. Capacitor C_X is discharged through a load in this operating state. For greater clarity, the Mode IV loops have been deployed in Figure 2d. The following are the values for the maximum IGBT S_X current stress in Mode IV:

$${\mathrm{i}}_{\mathrm{SX}\_\mathrm{peak}}={\mathrm{i}}_{\mathrm{LF}}+{\mathrm{i}}_{\mathrm{LX}2}$$

(4)

where,

$${\mathrm{i}}_{\mathrm{LF}}=\frac{{(\mathrm{V}}_{\mathrm{G}}-{\mathrm{V}}_{\mathrm{CF}}{)\mathrm{d}}_1{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{F}}}$$

$${\mathrm{i}}_{\mathrm{LX}2}=\frac{{(\mathrm{V}}_{\mathrm{C}0}-{\mathrm{V}}_{\mathrm{CX}}{)\mathrm{d}}_1{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{X}2}}$$

(5)

Mode V—Switch S_X is disabled in Mode V, and Figure 2e shows the deployment of this mode’s conduction loop. In Mode V, Capacitor C_X charging takes place, and the Diode DX conduction is observed throughout this time. The loop in Mode V is L_F–C_X–D_X–C_F–V_G–L_F. A DC-link capacitor (C₀), in parallel with the load, is an additional loop constructed using an inductor L_X2 and a diode D_X. The maximum diode current via diode D_N can be calculated using the equation.

$${\mathrm{i}}_{\mathrm{DX}\_\mathrm{peak}}=\frac{{(\mathrm{V}}_{\mathrm{C}0}{)\mathrm{d}}_2{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{X}2}}+\frac{{\{\mathrm{V}}_{\mathrm{G}}-{(\mathrm{V}}_{\mathrm{CX}}+{\mathrm{V}}_{\mathrm{CF}}{\left)\right\}\mathrm{d}}_2{\mathrm{T}}_{\mathrm{s}}}{{\mathrm{L}}_{\mathrm{F}}}$$

(5)

where, ${\mathrm{d}}_2=\frac{\mathrm{Mode} \mathrm{V} \mathrm{duration} }{{\mathrm{T}}_{\mathrm{S}}}$.

The peak voltage across switch S_X is determined as follows:

$${\mathrm{V}}_{\mathrm{SX}\_\mathrm{peak}}={\mathrm{V}}_{\mathrm{CX}2}$$

(6)

(6)

Mode VI—In this mode, the IGBT S_X is still not conducting. This mode begins as soon as Diode D_X ceases to operate, causing the identical current to flow via Capacitor C_X and Inductor L_X2. When the supply voltage is in its negative semi-cycle, Mode VI is also known as the DICM mode. In Figure 2f, the conducting network is established during Mode VI.

The mathematical formula for the DCM mode is—${\mathrm{d}}_1{\mathrm{T}}_{\mathrm{s}}{+\mathrm{d}}_2{\mathrm{T}}_{\mathrm{s}}{<\mathrm{T}}_{\mathrm{s}}$.

Where, d_ON = d_N and d_OFF = d_P + d_DICM.

In addition,

$${\mathrm{d}}_1+{\mathrm{d}}_2+{\mathrm{d}}_{\mathrm{DICM}}=1$$

(7)

2.2. Distinctive Features of PFA Converter

The power-factor augmentation, reduced element count, improved performance, easier control, eviction of the rectifier, reverse-feeding diode eviction, and presence of load-terminal inductances (L_X2 and L_Y) to improve the load current profile over positive (+ve) as well as negative (−ve) semi-cycles of main voltages are the distinguishing characteristics of the PFA converter.

Table 1. Assessment of the described PFA AC–DC converter in comparison with different BL-configured converters for the objective of improving power factor.

S.No.	Topology	Components Count
		Switch	X	C	L	D	Total
01	BL-Luo [22]	2	00	4	5	4	16
02	BL-CSC [23]	2	00	4	3	4	13
03	BL-isolated Cuk [24]	2	02	6	5	4	19
04	BL-Landsman [25]	2	00	4	5	4	15
05	BL-SEPIC [26]	2	00	4	5	4	15
06	BL-Zeta [28]	2	00	4	5	4	15
07	BL-Cuk [27]	4	00	3	2	2	11
08	Proposed PFA Converter	2	00	3	3	2	10

, which is shown below, compares various bridgeless (B_L) converter schemes and provides total element counts across different configurations, as well as the number of inductors, capacitors, switches, diodes, and transformers employed in the drive.

2.3. MPP Converter Operation

For MPP purposes, this work uses a boost converter, which not only performs as an MPP function but also increases the voltage by multiplying the grid voltage with a fraction of (1/(1 − d_PV). The boost converter is a second-order converter with supply terminal inductance. The challenge with the MPP boost converter is to carefully analyze whether the maximum power for the solar array falls in the operating zone of the MPP boost converter. The buck and boost converters do not have a complete first quadrant available for operation unlike buck-boost converters. Therefore, the designer should check with the help of the power curve and I–V plot that the maximum power is within the range of operation of the converter. Otherwise, the MPP algo will not be able to track maximum power. The circuit of MPP converter is shown in Figure 1, and its MPP algo is discussed in later section.

2.4. Selection of PFA Converter Components

The system uses an asymmetrical converter for PFA, which requires a careful analysis to calculate the value of inductance and capacitance so that the main current during both half cycles of grid voltage are similar in shape and magnitude. The complete disappearance of the diode current (I_DX) signals the start of the PFA converter’s DICM operation during the negative semi-cycle of the main voltage. The inductor L_X2 current in this situation crosses the zero line and turns positive with an output magnitude equivalent to the capacitor C_Y current. Nevertheless, after the full power drain of the inductor L_F, the positive semi-cycle DICM operation begins. For DICM mode operation, it is essential to select an inductor L_F value that ensures the inductor discharges entirely before its positive main voltage semi-cycle was finished. However, the capacitor voltages V_CY and V_CX are constant during the cycle. The BLDC motor specifications under the test are in the Appendix A. The driver’s typical main voltage may be found with the relation

$${\mathrm{V}}_{\mathrm{G}\_\mathrm{AVG}}=\frac{(2\sqrt{2})}{\mathsf{\pi }}\times {\mathrm{V}}_{\mathrm{G}}=0.901\times 220=198.10$$

(8)

The V-sec (voltage-second) equilibrium among the inductors of the PFA converter can be used to determine the output terminal and input main ratio of the PFA converter for both cycles.

$$\left[\frac{{\mathrm{V}}_{\mathrm{C}0}}{{\mathrm{V}}_{\mathrm{G}}}\right]=\left[\frac{{\mathrm{d}}_1}{1-{\mathrm{d}}_1}\right]$$

(9)

The average input main voltage and the voltage over the DC-link capacitor appear to be important influences on the duty cycle of the PFA converter.

$${\mathrm{d}}_{\mathrm{A}}=\frac{{\mathrm{V}}_{\mathrm{C}0}}{{\mathrm{V}}_{\mathrm{G}\_\mathrm{AVG}}{+\mathrm{V}}_{\mathrm{C}0}}=\frac{300}{198.10+300}=0.6010$$

(10)

Losses and inductor size are switching frequency and inductance values. The dimensions and amplitude of the inductor grow as the switching frequency lowers. Furthermore, a lower degree of inductance has a linked issue of increasing current stress in DICM mode operating of the PFA converter because solid-state devices (switches) experience increased switching losses at greater switching frequencies. Although switching losses are significantly reduced with a lower switching frequency, the cost, dimensions, and magnitude of the inductor all increase. Therefore, considering the aforementioned factors, 20 kHz is chosen as the switching frequency for the current job. The relation evaluates the critical input inductance, L_F, for the PFA converter.

$$\begin{array}{l}{\mathrm{L}}_{\mathrm{F}}=\frac{{\mathrm{V}}_{\mathrm{G}\_\mathrm{AVG}} \times {\mathrm{d}}_1}{{2\Delta \mathrm{I}}_{\mathrm{G}}{\mathrm{f}}_{\mathrm{s}}}=\frac{{\mathrm{V}}_{\mathrm{IN}\_\mathrm{AVG}}{\mathrm{d}}_1}{2\Delta (\frac{\mathrm{P}}{{\mathrm{V}}_{\mathrm{G}\_\mathrm{AVG}}}{)\mathrm{f}}_{\mathrm{s}}}\\ \hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}=\frac{198.10 \times 0.301}{2 \times 0.1 \times (850/198.10) \times 20 \times 1000}=3.475 \mathrm{mH}\end{array}$$

(11)

The value should be greater than the computed critical value as the input inductor must function in the CCM mode. The chosen value of L_F for the current task is 4.5 mH.

Equations can be used to obtain output inductances for semi-cycles L_X2 and L_Y.

$${\mathrm{L}}_{\mathrm{Y},\mathrm{X}2}=\frac{{\mathrm{V}}_0(1-{\mathrm{d}}_1)}{{\Delta \mathrm{I}}_0{\mathrm{f}}_{\mathrm{s}}}=\frac{300\times (1-0.301)}{0.2\times (850÷300)\times 20\times 1000}\hspace{0.17em}=9.26 \mathrm{mH}$$

(12)

For the discontinuous operation of the PFA converter, the output inductor must be operated in DICM mode since its current polarity fluctuates. For this study, the 20th part of the estimated valve, or 0.196 mH, was chosen. With the following formula, the numerical value of the capacitor C_X can be determined.

$${\mathrm{C}}_{\mathrm{X}}=\frac{{\mathrm{I}}_{\mathrm{LX}1}{\mathrm{d}}_1}{{\Delta \mathrm{V}}_{\mathrm{CX}}{\mathrm{f}}_{\mathrm{s}}}=\frac{(850÷198.10)\times 0.301}{0.4\times (300+198.10)\times 20\times 1000}=0.32 \mathsf{\mu }\mathrm{F}$$

(13)

The value selected for capacitor C_X must be higher than the computed critical value in order for it to function in CCM. Therefore, C_X is set to 0.5 F for the purposes of this investigation.

The formula can be used to determine the filter-capacitor magnitude for the converter running in the positive grid voltage cycle

$${\mathrm{C}}_{\mathrm{F}}=\frac{1}{{4\mathsf{\pi }}^2{\mathrm{f}}_{\mathrm{c}}{}^2{\mathrm{L}}_{\mathrm{F}}}=\frac{1}{{4\mathsf{\pi }}^2\times {3800}^2\times 4.5\times {10}^{-3}}=431 \mathrm{nF}$$

(14)

For the current work, a cutoff frequency of 3.8 kHz has been picked since the cutoff frequency in the computation of the filter capacitance ought to fall between switching and line frequency.

Rearranging the power equation will allow you to determine the value of the DC-link capacitor (C₀).

$${\mathrm{P}}_{\mathrm{Max}}{=\mathrm{V}}_{\mathrm{Max}}\sin \left\{\right(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}\left)\mathrm{t}\right\}\times {\mathrm{I}}_{\mathrm{Max}}\sin \left\{\right(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}\left)\mathrm{t}\right\}$$

(15)

$$\begin{array}{l}{\mathrm{P}}_{\mathrm{Max}}={2\mathrm{V}}_{\mathrm{Max}}{\mathrm{I}}_{\mathrm{Max}}{\sin }^2\left\{\right(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}\left)\mathrm{t}\right\}\\ \hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}\hspace{0.17em}={\mathrm{V}}_{\mathrm{Max}}{\mathrm{I}}_{\mathrm{Max}}\{1-\cos 2(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}\left)\mathrm{t}\right\}\end{array}$$

(16)

The following formula might be rewritten as follows since the DC–Link capacitor manages the second harmonic portion

$${\mathrm{V}}_{\mathrm{C}0}\times {\mathrm{i}}_{\mathrm{C}0}=-{\mathrm{V}}_{\mathrm{Max}}{\mathrm{I}}_{\mathrm{Max}}\cos \left\{2\right(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}\left)\mathrm{t}\right\}$$

(17)

$${\mathrm{C}}_0=\frac{{\mathrm{i}}_{\mathrm{C}0}}{2(2\mathsf{\pi }\times {\mathrm{f}}_{\mathrm{L}}{)\Delta \mathrm{V}}_0}=\frac{\mathrm{P}}{{\mathrm{V}}_0}\times \left[\frac{1}{{4\mathsf{\pi }\mathrm{f}}_{\mathrm{L}}{\Delta \mathrm{V}}_0}\right]$$

(18)

where ΔV₀ is the allowed voltage ripple across the DC-link capacitor. Equation (17) can be used to compute the value of the DC link capacitance C₀.

$$\begin{array}{l}{\mathrm{C}}_0=\frac{\mathrm{P}}{{\mathrm{V}}_0}\times \frac{1}{2(2\mathsf{\pi } \times {\mathrm{f}}_{\mathrm{L}}{)\Delta \mathrm{V}}_0}\\ {\mathrm{C}}_0=\frac{850}{198.10}\times \frac{1}{4\mathsf{\pi } \times 50 \times 0.02 \times 198.10}=1.726\hspace{0.17em}\mathrm{mF}\end{array}$$

(19)

Therefore, a 1.8-mF capacitor is selected for the DC link. The capacitor needs to be utilized at a lower switching (line) frequency because of the impact of second harmonics. The capacitor ought to have a larger capacitance value and a comparatively greater current rating. Since the capacitor itself must also have a higher capacitance value per unit volume, electrolytic capacitors might be appropriate for this application.

2.5. Selection of MPP Converter Components

The value of the photovoltaic array-based system, along with components, are listed in

Table 2. Solar PV array-based system.

Module	1 Soltech 1STH-215-P
VOC	36.30 V
ISC	07.84 A
PMax	213.15 W
Series module/string	20
Parallel String	11
CZ	440 nF
LZ	2.8 mH
C0	2.2 mF

.

3. PFA Power-Factor Profile Improvement Converter-Based BLDC Speed Control

The control technique for the BLDC drive-fed by the PFA and MPP converter is described in this section. The complete BLDC drive design employs two different control loops: one to regulate the PFA converter output terminal voltage and the other for the MPP converter.

3.1. PFA Converter Control Scheme

In this paper, the operation of a DICM employing a PFA converter to optimize the power-factor profile is conducted using a voltage-tracking method. Unlike CCM, which requires two voltage sensors and one current sensor, this control has to sense dc-link voltage, which just requires a single-voltage sensor. The schematic representation of the control loop for the DC-link capacitor voltage is shown in Figure 3. This control strategy makes use of the saw-tooth wave generator, the proportional-integral (P–I) controller, the subtractor (error generator), and the pulse-width-modulation (PWM) generator unit.

Both the real (sensed) DC-link voltage and the referring DC-link voltage V₀^* are provided to the subtractor. The difference signal, which is the result of the subtractor, can be stated at the φth instant as below

$${\mathrm{V}}_{\mathrm{err}}\left(\mathsf{\phi }\right)={\mathrm{V}}_0{}^{*}\left(\mathsf{\phi }\right)-{\mathrm{V}}_0\left(\mathsf{\phi }\right)$$

(20)

The P–I controller receives a difference signal so as to generate a constant output voltage (V₀). In order to express the controller output voltage, V_CT,

$${\mathrm{V}}_{\mathrm{CT}}\left(\mathsf{\phi }\right)={\mathrm{V}}_{\mathrm{CT}}(\mathsf{\phi }-1)+{\mathrm{K}}_{\mathrm{I}}{\{\mathrm{V}}_{\mathrm{err}}\left(\mathsf{\phi }\right)\}+{\mathrm{K}}_{\mathrm{P}}{\{\mathrm{V}}_{\mathrm{err}}\left(\mathsf{\phi }\right)-{\mathrm{V}}_{\mathrm{err}}(\mathsf{\phi }-1\left)\right\}$$

(21)

where K_P is proportional. However, K_I is the integral constant values of the P–I controller. For the controlled voltage (V_CT), when sent via a relational operator, a high-frequency saw-tooth wave (€_S) generates a gate signal for the switches S_Y and S_X. For gate-pulse generation, two cases exists depending upon the polarity of grid voltage. For both these cases, the gate pulse is generated only when €_S is less than the controlled voltage. The insulated gate bipolar transistor (IGBT) only conducts whenever the gate pulse is available. An extra advantage of using the PFA bridgeless converter is the requirement of the same gate pulse (without any modification or phase delay) for both the IGBTs.

3.2. MPP Converter Control Technique

The gate pulse of the MPP follower converter is produced by using the INC technique. In this research, the solar PV voltage and current are applied to the MPP follower block, which provides the duty as the outcome. This outcome is applied to the PWM unit where it is compared and processed through the relational operator with the outcome of the high-frequency wave-generator unit. The outcome of this relational unit is the required gate pulse for the MPP boost converter. The logic diagram for the INC method used is shown in Figure 4.

3.3. BLDC Motor Control

The electronic commutation method (ECM) is used to manage the speed of the BLDC motor, fully eliminating problems with maintenance, sparking, noise, and EMI while also greatly reducing the influence of the EMI. The hall-effect position sensors monitor the position of the BLDC motor rotor. Only two phases of the stator are allowed with excitation at any particular moment in the BLDC motor. Various VSI switches toggle on or off based on the rotor positioning (information provided by hall location sensors). This real-time rotor position information makes it possible to control the direction of current flow in the BLDC motor’s various windings at various times. When the VSI switches S₁ and S₄ conducts, Figure 5 depicts the durational conducting path. At this moment, the path depicted in Figure 5 is followed by applying the DC link voltage across the BLDC motor. Therefore, the amplitude and direction of the current are both influenced by the back EMFs (E_Ag and E_Bg), the DC-link voltage V₀, the self- and mutual-inductances of the windings (A and B), and the mutual inductance (M_AB). Additionally,

Table 3. VSI Switching states for BLDC motor based on Hall sensor data.

$\mathit{\theta }$ (Degree)	Hall Effect Sensor Signals			Switching States of VSI
	Ha	Hb	Hc	S1	S2	S3	S4	S5	S6
(0–360/6)	1	0	1	1	0	0	1	0	0
(360/6)–(360/3)	1	0	0	1	0	0	0	0	1
(360/3)–(360/2)	1	1	0	0	0	1	0	0	1
(360/2)–(360∗2/3)	0	1	0	0	1	1	0	0	0
(360∗2/3)–(360∗5/6)	0	1	1	0	1	0	0	1	0
(360∗5/6)–360	0	0	1	0	0	0	1	1	0
NA	0	0	0	0	0	0	0	0	0

displays the switching states of all six VSI switches based on data from three Hall sensors (H_a, H_b, and H_c) feeding the BLDC motor.

4. Validation and Result

This section examines the performance of the PFA converter-based dual-source driver using MATLAB/Simulink results during all three conditions discussed above. The section also studies the PFA operation of the BLDC motor drive during the dynamic, as well as the steady condition when only the grid is the present source for energy.

4.1. BLDC Motor Drive Performance during First Case (Both Sources Are Present)

This case represents the condition when both the sources are present with the power requirement at the load is less than or equal to power generated at PV array. During this condition, the load is fed by the solar-generated energy. When the solar array power is less than the load then both the grid and solar array will both feed the load. The condition when solar-array generation is more than the load demand then the results shown in Figure 6. The results in Figure 6a,b show the solar irradiance and voltage across the solar array. The trapezoidal back emf and armature current can be seen in Figure 6c,d. The results for the condition, when the solar-array generation is not zero but less than the load demand, is shown in Figure 7. To reduce the solar generation, the irradiance is reduced to 500 W/m² at a fixed temperature of 25 °C. The linearly related grid voltage and current can be seen in Figure 7a,b. The solar irradiance and array voltage can be seen in Figure 7c,d. The trapezoidal back emf and BLDC motor armature current can be seen in Figure 7e,f, respectively.

4.2. BLDC Motor Drive Performance during Second Case (Only Solar Energy Source Is Present)

This section examines the drive performance when solar energy is the only available source. The simulation results for this case are shown in Figure 8. The solar irradiance and array voltage with motor parameters can be seen in Figure 8.

4.3. BLDC Motor Drive Performance during Third Case (Only Grid Is Present)

This section examines the PFA converter-based BLDC motor-driver performance when only the grid is the active source. Figure 9 verifies the power-factor correction operation of the PFA converter as the voltage profile is exactly being followed by the grid current. The BLDC motor back emf and armature current are shown in Figure 9c,d.

The current and voltage across different components of the PFA converter are shown in Figure 10. The inductor current across Inductors L_F, L_Y, and L_X2 are shown in Figure 10a–c, respectively. The capacitor voltage across the capacitor C_X and C₀ are deployed in Figure 10d,e. The current across Switches S_Y and S_X, as well as Diodes D_Y and D_X, are shown in Figure 11a–d. The discontinuous operation of the diode current before semicycle completion witnesses the discontinuous mode operation.

5. Conclusions

The performance of the brushless DC motor pump is examined in this article in all three scenarios: first, when the grid and solar energy are both present; second, when the solar energy is the only source of energy; and third, when the grid energy is the only source of energy. The motor performance in all three conditions is found satisfactory with almost no power drawn from the grid when the solar energy is present. In addition, the input current and voltage from the grid in the third case are found to be in phase and share a linear relationship with each other. The grid-current distortion is found to be less than 5% satisfying of the IEC standard limits. The elements of the PFA converter with different power-quality-improvement converters have been compared, and the PFA converter with a lesser number of elements was found to be working satisfactory.