Differential Power Processing Converter with an Integrated Transformer and Secondary Switch for Power Generation Optimization of Multiple Photovoltaic Submodules

Abstract

In recent years, to increase the fuel efficiency of environment-friendly vehicles, a large volume of research is ongoing regarding applying photovoltaic (PV) systems. However, in PV systems, a power imbalance between submodules is common due to shading or pollution, and this degrades the power generation efficiency of the system. To solve this problem, various differential power processing (DPP) converters have been developed. In order to adopt the DPP converter to environment-friendly vehicles, the DPP converter must have a small volume, high efficiency, and high price competitiveness. In this regard, we propose a DPP converter with a single multi-winding transformer by integrating multiple transformers and secondary sides of the conventional flyback DPP converter. Since the proposed DPP converter can be applied to battery balancing circuits as well as photovoltaic systems, the proposed circuit is a valuable converter. In the PV system, the maximum output power of each submodule is 60 W, and the total PV system is 240 W by connecting four submodules in series. To verify the validity of the proposed DPP converter, a prototype with 8 V input and 60 W/30 V output specification was built and tested, and the effectiveness of the proposed converter is supported by the experimental results.

1. Introduction

Owing to their ability to improve fuel-efficiency, photovoltaic (PV) systems have been extensively applied in a wide range of environment-friendly vehicles, from Hybrid Electric Vehicles (HEVs) and Electric Vehicles (EVs) to mass-produced ones [1]. In addition, large-capacity PV systems have also been installed on the roofs of electric buses and trucks. In these PV systems, the PV submodules are connected in both series and parallel to generate high voltage and sufficient power. However, due to partial shading and contamination of the PV submodules, variations in power and current occur in the submodules, which, in turn, results in limited output power and small current in submodules. The power generation efficiency, thus, becomes considerably degraded [2]. In the PV system, excessive power dissipation, known as hot spotting, occurs due to cell reverse biasing [3].

To overcome the drawbacks of the PV system, various converters, such as DC optimizer [4,5] and cascaded converters [6,7], have been introduced, which can improve the power generation efficiency and solve the hot spot problem of the PV system. However, since these converters have to handle the rated power of each submodule or total system, other problems, such as bulky volume of the converter and the loss of the entire system creep in [8]. For small volume and low loss of converters, a differential power processing (DPP) converter that can only handle power differences between the submodules was proposed [9]. These DPP converters have a variety of architectures, such as PV–Bus [10,11,12,13], PV–PV [14,15,16], and PV–isolated port (IP) [17,18]. For the PV–PV converter topology, the bidirectional buck-boost converter is commonly used, and for the PV–IP and PV–Bus converter topology, the bidirectional flyback converter is widely applied as the DPP converter.

The DPP converters with the PV–IP architecture are installed between the PV submodules and the IP to achieve maximum power out of the total system via distributing the excessive power to the low-power submodules and thereby mitigating any current differences between submodules [19]. Figure 1a shows the PV–IP architecture, and Figure 1b shows the circuit diagram when the bidirectional flyback DPP converters are utilized with the PV–IP architecture. Assuming that the number of submodules in the conventional DPP converters are N, then N transformers, N primary and secondary side switches, and 2 N driving circuits are required, and due to these several components, the volume of magnetics and switches also increases.

Moreover, assuming that there is an imbalance in the power and energy of submodules in the PV system, since a transformer of the conventional flyback DPP converter stores and transmits imbalanced energy, the magnetizing current of the transformer has an offset that causes a large volume. Thus, conventional DPP converters are difficult to use in applications that require small volume and high price competitiveness, such as environmentally friendly vehicles. To address this issue, the current research aimed to introduce a new DPP converter with a single integrated transformer with PV–IP architecture.

The proposed DPP converter achieved high power density by integrating the transformer and secondary side switches. Thus, the proposed converter can improve the price competitiveness by reducing components. Moreover, it also improved efficiency by reducing conduction loss and switching loss. In addition, the compensation of power generation imbalance among PV submodules is possible since the imbalanced power is transferred and delivered through the transformer when all primary switches are turned on at the same time. Moreover, the proposed DPP converter can be used as the battery cell balancing circuit because it can equalize the power difference [20].

This paper is organized as follows. In Section 2, the characteristics and operation principle of the proposed DPP converter are explained, and the design method of the proposed DPP converter is presented via Section 3. The effectiveness of the proposed converter is supported by the experimental results with a 8 V input, 60 W and 30 V output prototype.

2. The Proposed DPP Converter

2.1. Characeristics of the Proposed DPP Converter

As shown in Figure 1, a conventional flyback DPP converter has several transformers. However, our proposed DPP converter has a single multi-winding transformer and is illustrated in Figure 2. The proposed DPP converter has the disadvantage of causing breakdown in all converters if a secondary circuit is at fault. However, since components of the proposed converter are considerably reduced compared with the conventional flyback DPP converters, high power density and high price competitiveness can be achieved in the former.

In the proposed DPP converter, the excessive energy induced by high power submodule is stored in the leakage inductor of the integrated transformer, and this energy is transferred to the other submodules through the primary winding and switches. Accordingly, the magnetizing inductor does not store energy but only serves in power transfer. Therefore, the integrated transformer can be designed with zero offset magnetizing current so that the volume of the transformer can be reduced.

Moreover, since all switches are capable of zero voltage switching (ZVS), it is possible to reduce the switching losses too. As a result, the proposed DPP converter not only has a small volume and thus low price but also has high efficiency. Hence, the proposed DPP converter is very suitable for environment-friendly vehicle systems that require high power density for limited space and high price competitiveness for mass production.

2.2. Operation Principle of the Proposed DPP Converter

Figure 3 and Figure 4 illustrate the key waveforms and operational principle of the proposed converter. Furthermore, two PV submodules were configured and the analysis of the proposed DPP converter was performed with respect to six modes.

In addition, the following assumptions are made:

• Power generation of the PV1 submodule is greater than that of the PV2 submodule due to shading and failure of the PV2 submodule (P_PV1 > P_PV2).
• All leakage inductances of the integrated transformer are equal (L_lkg1 = L_lkg2 = L_lkgs).
• The capacitance of the secondary side IP port is large enough, and it is assumed to be a voltage source.
• All transformer windings have the same number of turns (N_P1:N_P2:N_S = 1:1:1).

As can be seen in Figure 3 and Figure 4, the primary side switches Q_P1 and Q_P2 are turned on and off at the same time, and switch Q_S operates opposite to Q_P1 and Q_P2. The operating waveforms in Figure 3 represent leakage inductor voltage v_Llkg1(t), v_Llkg2(t), magnetizing inductor voltage v_Lm(t), leakage inductor current i_Llkg1(t), i_Llkg2(t), magnetizing inductor current i_Lm(t), primary side the switch voltages v_QP1(t), v_QP2(t), the secondary side switch current i_QS(t), and the secondary side switch voltage v_QS(t) are shown, and the circuit in Figure 4 consists of the input and output capacitors C_PV1, C_PV2, and C_S; leakage inductors L_lkg1, L_lkg2, and L_lkgs; snubber resistors R_C1, R_C2, and R_CS; snubber capacitors C_C1, C_C2, and C_Cs; snubber diodes D_C1, D_C2, and D_CS; magnetizing inductor L_m, and 1:1:1 transformers.

Mode 1 (t₀–t₁): Both Q_P1 and Q_P2 remain turned on, and the PV1 voltage (v_PV1(t)) is greater than the PV2 voltage (v_PV2(t)) as mentioned in the above assumptions. Therefore, the voltage applied to the L_m (v_Lm(t)) has a value between v_PV1(t) and v_PV2(t). As a result, the voltages of L_lkg1 and L_lkg2 are as shown below.

$$v_{Llkg1}\left(t\right)=v_{PV1}\left(t\right)-v_{Lm}\left(t\right),$$

(1)

$$v_{Llkg2}\left(t\right)=v_{PV2}\left(t\right)-v_{Lm}\left(t\right),$$

(2)

From (1) and (2), i_Llkg1(t) increases and i_Llkg2(t) decreases. For i_Llkg2(t), since the transformer windings N_P1 and N_P2 are the same, it can be expressed as (3). Therefore, it can be seen that the current of the PV1 submodule flows to the PV2 submodule and v_Lm(t) can be obtained using (1)–(3) and represented as (4)

$$i_{Llkg2}\left(t\right)=i_{Lm}\left(t\right)-i_{Llkg1}\left(t\right),$$

(3)

$$v_{Lm}\left(t\right)=\frac{\left(v_{PV1}\left(t\right)+v_{PV2}\left(t\right)\right)·L_m}{L_{lkg}+2L_m},$$

(4)

Mode 2 (t₁–t₂): Both Q_P1 and Q_P2 are turned off, and the body diodes of Q_P2 and Q_S conduct. The magnetizing current i_Lm(t) decreases when an output voltage −V_{Cs_IP}$·$N_P1/N_S is applied at the primary side. The energy stored in the leakage inductor L_lkg1 is consumed through an RCD snubber.

Mode 3 (t₂–t₃): In Mode 2, both Q_P1 and Q_P2 maintain a turn-off state, while the primary and secondary sides of the PV2 submodule are commutated to reduce the current flowing through the primary side and increase the current flowing through the secondary. In addition, since the Q_S switch is turned off, the current flowing through the secondary side continues to flow through the body diode. At this time, the energy stored in L_lkg2 is consumed by the RCD snubber. Since the voltage of the magnetizing inductor is −V_{Cs_IP}$·$N_P1/N_S−V_Llkgs(t), i_Lm(t) continues to decrease. Furthermore, the voltage, L_lkg1 becomes zero, and therefore, i_Llkg1 also remains zero.

Mode 4 (t₃–t₄): In Mode 2 and Mode 3, ZVS is possible because the secondary side body diode conducted current. For L_m, since −V_{Cs_IP}$·$N_P1/N_S is reflected, the magnetizing current i_Lm(t) decreases from a positive value to a negative value, as shown in Figure 3. At the same time, at the secondary side, both charge and discharge occur, which, in turn, resets the transformer. As a result, the average value of the secondary side current becomes zero, and thus the magnetizing current offset becomes zero.

Mode 5 (t₄–t₅): The Q_S switch is turned off, and the energy stored in the leakage inductance L_lkgs is consumed by the RCD snubber resistance. At this time, the leakage inductor current is reflected to the primary side, resulting in commutation on the primary and secondary sides.

Mode 6 (t₅–t₆): It starts when the primary and secondary sides commutation is finished. Since the voltages reflected to L_lkg1 and L_lkg2 are the same as (1) and (2), i_Llkg1(t) increases and i_Llkg2(t) decreases. In addition, since i_Llkg1(t) and i_Llkg2(t) are conducting through the switch body diode, ZVS turn-on is performed when both Q_P1 and Q_P2 are turned on.

3. Proposed DPP Converter Design Method

3.1. Bus Voltage and IP Port Voltage

The bus voltage of the proposed DPP converter is shown in Figure 2, and the PV submodules are connected in series, so the bus voltage can be represented by (5). The IP port voltage can be expressed as (6) because it is same as the input–output.

$$V_{Bus}\approx 4·V_{PV,module},$$

(5)

$$V_{Cs\_IP}\approx \frac{n\mathrm{D}}{1-\mathrm{D}}{V}_{PV,module},$$

(6)

where n = Ns/N_P is the turn ratio.

3.2. Primary Side Current of the Proposed DPP Converter

Since the primary side current is same as the switch current, it is proportional to the switch turn-off loss and the RCD snubber loss. Figure 5 shows the equivalent circuit of the primary switch turned-on state when two PV submodules are connected in series. In this equivalent circuit the magnetizing inductor was ignored because the magnetizing inductance is much larger than the leakage inductance. In addition, since the leakage inductance is very small, it is simply shown in Figure 5 considering the wire resistance (R_wire) and the switch-on resistance (R_ds(on)). The PV1 input capacitor voltage v_CPV1(t) can be obtained through the equivalent circuit in Figure 5, and it can be expressed by (7) using a Laplace transformation. The voltage v_CPV1(t) of the input capacitor can be obtained by the inverse Laplace transform of (7), and this is shown in (8).

$$V_{CPV1}\left(S\right)=\frac{V_{CPV1\left(0\right)}}{S}+\frac{\frac{1}{S{C}_{PV1}}}{R_{eq}+S{L}_{eq}+\frac{1}{S{C}_{eq}}}\times \left(\frac{V_{CPV2\left(0\right)}}{S}-\frac{V_{CPV1\left(0\right)}}{S}+L_{lkg2}{I}_{Llkg2\left(0\right)}-I_{Llkg1\left(0\right)}\right),$$

(7)

$$\begin{array}{ll}{v}_{CPV1}\left(t\right)=& V_{CPV1\left(0\right)}+\frac{C_{eq}}{C_{PV1}}\times \left[\left(V_{CPV1\left(0\right)}-V_{CPV2\left(0\right)}\right)·\left(\frac{e^{-\frac{\omega }{2Q}t}\sin (\omega \beta t+\theta )}{\beta }-1\right)\right.\\ & \left.+\left(L_{lkg2}{I}_{Llkg2\left(0\right)}\left.-L_{lkg1}{I}_{Llkg1\left(0\right)}\right)·\left(\frac{\omega }{\beta }{e}^{-\frac{\omega }{2Q}t}\sin \left(\omega \beta t\right)\right)\right.\right],\end{array}$$

(8)

where R_eq is the equivalent resistance of R_wire and R_ds(on), L_eq is the equivalent leakage inductance of L_lkg1 and L_lkg2, and C_eq is the equivalent capacitance of C_PV1 and C_PV2, $\omega =1/\sqrt{L_{eq}{C}_{eq}}$, $\mathrm{Q}=\sqrt{L_{eq}}/\left(R_{eq}\sqrt{C_{eq}}\right)$, $\beta =\sqrt{1-1/\left(4Q^2\right)}$, $\theta ={\cos }^{-1}\left(1/\left(2Q\right)\right)$, and v_CPV1(0), v_CPV2(0), i_Llkg1(0), and i_Llkg2(0) are the initial values. i_Llkg1(t) can be obtained by (9)

$$i_{Llkg1}\left(t\right)=-C_{PV1}\frac{d{V}_{CPV1}\left(t\right)}{dt}+I_{PV1,in},$$

(9)

where I_PV1,in signifies the input current induced by the PV submodule. It can be seen that, in (9), the leakage inductor current is affected by a small variation in the input capacitor voltage. In addition, since a small voltage is applied to the leakage inductor because of the voltage of the equivalent resistor, the leakage inductor current performs a Quasi-resonance operation. Therefore, due to the Quasi-resonant leakage current, a low leakage current at switch turn-off can be achieved resulting in a low snubber loss and switch turn-off loss.

3.3. Switch Loss and RCD Snubber Loss of Proposed DPP Converter

The root-mean-square (RMS) currents at the primary and secondary sides of the DPP converter are shown in

Table 1. RMS current of primary and secondary side of DPP converter.

Parameter	Conventional Flyback DPP Converter
IP,rms_PV1	7.78 A
IP,rms_PV2–4	2.73 A
IS,rms_PV1	5.51 A
IS,rms_PV2–4	1.93 A
Parameter	Proposed DPP Converter
IP,rms_PV1	8.49 A
IP,rms_PV2–4	2.7 A
IS,rms	1.03 A

. The losses of the conventional flyback DPP converter and the proposed DPP converter are shown in Figure 6.

The RCD snubber design should set the RCD snubber capacitor voltage V_Cc in consideration of the switch voltage. In the case of the RCD snubber resistance, it can be obtained by (10)

$$\frac{1}{2}{L}_{lkg}\times i_{Llkg}^2\times f_s=\frac{V_{Cc}^2}{R_C}$$

(10)

As the frequency increaes, V_Cc increases, and the switch voltage rating should increase. That is, when desinging an RCD snubber, appropriate frequency selection is required. The proposed DPP converter can be obtained using the equivalent circuit of Figure 5.

The proposed DPP converter reduces the number of switches by integrating the secondary side. In addition, since the entire switch performs a ZVS turn on, as shown in Figure 4 and Figure 7, the switching loss of the proposed DPP converter is decreased. Figure 6 presents a loss analysis diagram and shows that the switching loss of the proposed DPP converter is smaller than that of the conventional flyback DPP converter. The switch loss can be obtained as [21,22]:

$$P_{Q\left(on\right)}=0.5V_{DS}·I_{DS\left(min\right)}·t_{on}·f_S+V_{DS}· f_S\times \left(I_{DS\left(min\right)}·t_{rr}+Q_{rr}\right),$$

(11)

$$P_{Q\left(off\right)}=0.5V_{DS}·I_{DS\left(max\right)}·t_{off}·f_S,$$

(12)

$$P_{Q,coss}=0.5C_{OSS}·V_{DS}^2·f_S,$$

(13)

$$P_{Q,cond}=R_{ds\left(on\right)}·I_{rms}^2,$$

(14)

For the conventional flyback DPP converter, the leakage inductance is larger than the proposed DPP converter because the number of windings is large. In addition, the RCD snubber loss increases due to large leakage inductance and large number of RCD snubbers. The RCD snubber loss of the proposed DPP converter is relatively low compared with that of the conventional converter. This is because a low leakage inductance is induced by a low turn-number of the integrated transformer, and a quasi-resonant leakage inductor current induces a small amount of energy in the leakage inductor at the switch turn-off instant.

3.4. Transformer Design and Loss

Table 2. Transformer A_P.

Parameter	Conventional Flyback DPP Converter
AP	13,736 mm4
Total AP	54,944 mm4
Parameter	Proposed DPP Converter
AP	24,085.6 mm4

shows the transformer area product (A_P) values of the conventional flyback DPP converter and the proposed DPP converter. Since the transformer in a conventional DPP converter stores energy, a magnetizing current offset occurs. Therefore, the transformer should be designed with high number of transformer windings. As a result, not only would the volume of the transformer be large but also multiple transformers are required. This makes the size of the conventional DPP converter considerably large.

On the other hand, the proposed DPP converter stores and transmits energy through the leakage inductor. Thus, it is possible to reduce the number of windings by removing the magnetizing current offset and increasing flux variation of the transformer. As a result, despite the multi-winding structure of the integrated transformer, the proposed integrated transformer has a reduced volume of up to 44% of the multiple transformers in the conventional flyback DPP converter. The transformer A_P of the proposed DPP converter can be expressed by (14) considering the number of multi-windings (N_mw) on the primary side in the transformer core window area (A_w).

$$A_P=A_e·A_w=\frac{L_m{I}_{Lm,peak}}{N_P{B}_m}·\left(\frac{N_{mw}·I_{p,rms}{N}_P+I_{s,rms}{N}_s}{K_{u}J}\right).$$

(15)

A conventional flyback DPP converter uses four transformer cores, and even if core loss is small due to low peak-to-peak flux density (ΔB), the number of windings is large; thus, the conduction loss increases. By contrast, the proposed DPP converter comprises only one transformer, and even if the core loss increases due to the high ΔB, the conduction loss decreases, and therefore the transformer loss is lower than that of the conventional flyback DPP converter as shown in Figure 6.

Figure 8 shows the relationship between duty and loss when the magnetizing current is constant. As the duty increases, the conduction loss decreases and core loss increases. In addition, the total loss, which is the sum of the conduction loss and the core loss, becomes the smallest around 0.5 duty. Accordingly, the proposed DPP converter was designed to operate at about 0.5 duty.

In the proposed DPP converter, the volume of the transformer was reduced by removing the magnetizing current offset of the transformer despite the integration of multiple transformers. The number of components and volume of the transformer were also decreased by integrating the secondary side switches. Moreover, since all the switches perform ZVS turn on, the efficiency is improved by reducing the switching loss. Therefore, the proposed DPP converter is a promising converter in regard to its wide range of application, such as a battery cell balancing circuit and PV.

4. Experimental Results

The prototype was tested using power analyzer (WT5000), DC power supply (DSP1500WS), oscilloscope (WaveRunner 8058HD), and electronic load (PRODIGIT 34105A) and used the PV Simulator function of DC power supply.

Figure 9 illustrates a prototype of the proposed DPP converter, and it was built to solve the power imbalance when PV submodules are connected in series. The design specifications of the proposed and conventional flyback DPP converters are represented in

Table 3. Proposed DPP converter parameters.

Parameter	Value
Input voltage	8 V
Output voltage	30 V, 45 W
Switching frequency fs	30 kHz
Transformer Core	PQ3230
Turn ratio $N_P:N_{Pn}:N_s$	4:4:4
Magnetizing inductance $L_m$	30 uH
Pri leakage inductance $L_{lkgp}$	0.42 uH
Sec leakage inductance $L_{lkgs}$	0.3 uH
Primary winding	0.1 Φ/200 strands
Secondary winding	0.5 Φ
RCD snubber resistance $R_C$	2 kΩ
RCD snubber Diode	NRVTSA3100ET3G
Switch Q	IPD054N08
Hall Sensor	ACS730KLCLU-30AB-T

and

Table 4. Conventional flyback DPP converter parameters.

Parameter	Value
Input voltage	8 V
Output voltage	12 V, 45 W
Switching frequency fs	45 kHz
Transformer Core	PQ3220
Turn ratio $N_P:N_{Pn}:N_s$	6:8
Magnetizing inductance $L_m$	22.2 uH
Pri leakage inductance $L_{lkgp}$	0.378 uH
Sec leakage inductance $L_{lkgs}$	0.669 uH
Primary winding	0.1 Φ/160 strands
Secondary winding	0.1 Φ/120 strands
RCD snubber resistance $R_C$	1.1 kΩ
Switch Q	IPP057N08N3G

. Table 4 represents conventional flyback specification, and since the switching frequency is larger than the proposed DPP converter, the transformer core volume may be designed to be smaller.

The proposed DPP converter was designed at 45 kHz, which further reduced the transformer volume. However, the snubber voltage and snubber loss are proportional to the frequency, and thus the switching frequency must be limited. The proposed converter as designed at 30 kHz to reduce snubber loss. Even if the switching frequency is designed to be 30 kHz, the transformer is small, and thus efficiency and power density can be simultaneously improved.

To verify the performance of the proposed converter, various experiments were conducted considering the worst-case condition as shown in Figure 10. The worst-case condition means that the PV1 submodule generates 60 W power while the other submodules generate 0 W. As a result, the DPP converter absorbs the 45 W surplus power from the PV1 submodule and supplies 15 W power to each submodule to mitigate the power imbalance among submodules.

Figure 11 shoes experimental waveforms of the proposed converter with respect to load variation. As shown in Figure 11, through the proposed DPP converter, the surplus current of the PV1 submodule is injected to other submodules to reduce the power difference. Meanwhile, as presented in Figure 7 and Figure 11, the deviation of the leakage inductor currents of submodules occur.

This is because the leakage inductor of the proposed DPP converter is too small; the small voltage variation in the leakage inductor, resulting from the input capacitor voltage ripple, leads to a large current variation similar to quasi-resonant current. Due to this quasi-resonant current, the switch turn-off current of the proposed converter can be reduced, which leads to small switching loss and snubber loss. Consequently, the proposed converter is able to provide high efficiency compared with the conventional DPP converter.

Figure 12 shows the magnetizing current waveform of integrated transformer. As shown in Figure 12, the magnetizing current shows zero offset current due to the current second balance of IP port capacitor, which signifies zero DC bias of the transformer.

Moreover, it is possible to design the integrated transformer with relatively large flux variation inducing low turn numbers compared with the conventional flyback DPP converter. Thus, in spite of primary multi-windings, the integrated transformer significantly reduces the volume of the magnetic components.

Figure 13 presents the ZVS characteristics of the proposed DPP converter under the worst-case conditions. Since the ripple of the magnetizing current is constant and the magnetizing current shows a zero offset, the conduction period of the body diode of the switch reduces as the load increases. Therefore, the 100% load condition is the worst-case condition for the ZVS operation. As represented in Figure 13, we confirmed that the ZVS performed well under full-load conditions, i.e., the worst-case conditions.

Figure 14 presents the voltages of the PV submodules before and after the DPP converter is used. Prior to the operation of the DPP converter, the input voltage was applied only to PV1. However, after complete operation of the DPP converter, the voltages of the PV submodules became balanced since the power difference between the submodules was mitigated.

Figure 15 shows the key waveform at the soft start-up region that can start the converter without excessive inrush current. It can be seen that the output voltage is charged compared with the proposed DPP converter through soft start up. As a result, it is possible to operate stably.

Figure 16 shows the load transient waveform. When partial shading occurs in the PV module, the dynamic of proposed converter can be checked.

Figure 17 shows the efficiencies of the proposed DPP converter and the conventional flyback DDP converter. It can be seen that the efficiency of the proposed DPP converter is about 5% higher than that of the conventional converter under entire load conditions. For the proposed DPP converter, more than 93% efficiency under 20–50% load and maximum 93.475% efficiency about 40% load were achieved. Since the proposed DPP converter provides high power density and efficiency, the DPP converter can be applied to various applications with power imbalance, such as a battery equalizer.

5. Conclusions

The current research developed a DPP converter with single multi-winding transformer by integrating multiple transformers and secondary sides of the conventional flyback DPP converter. The integrated transformer has a reduced volume and can maximize the power density because the magnetizing current offset is removed. Therefore, the proposed DPP converter can decrease both the conduction loss and core loss because of the zero magnetizing current offset and integrated transformer.

In addition, since ZVS is possible, the efficiency can be maximized. Moreover, since the gate signal of the primary side switch is driven by a single PWM signal, the control and driving circuits can be simplified. Therefore, the proposed converter is suiFigure for a DPP converter and can be applicable to battery balancing circuits. In the future, we plan to conduct research that further optimizes the power density eliminating the secondary side and using a planar transformer instead of a PQ core.