Software Verification and Validation for Embedded Systems—Volume 2

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (1 February 2022) | Viewed by 6235

Special Issue Editor


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Guest Editor
Department of Computer Science and Engineering, EWHA Womans University, Seoul 03760, Korea
Interests: software engineering; software test; verification and reliability
Special Issues, Collections and Topics in MDPI journals

Special Issue Information

Dear Colleagues,

Verification evaluates intermediary products, such as requirement specification, architectural design, models, or software code, thus ensuring that they comply with previously established requirements for correctness, completeness, and consistency.

Embedded systems are electronically controlled devices where software and hardware are tightly coupled. Anomalies could arise due to faults in the software or due to the hardware component. The use of machine learning to create anomaly detectors is growing rapidly at the moment. Embedded systems often have unique characteristics that should be reflected in the verification and validation (V&V) plan. In this Special Issue, we are particularly interested in V&V at the software level for embedded systems.

Prof. Dr. Byoungju Choi
Guest Editor

Manuscript Submission Information

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Keywords

  • Methodologies for verification and validation of embedded software
  • Techniques for testing of embedded software
  • Tools and environment for automated and semi-automated embedded software testing
  • Model-based testing
  • Software test requirements
  • Software test architecture
  • Static vs. dynamic testing
  • Performance, robustness, usability, and security testing
  • Software fault injection
  • Embedded real time software testing and runtime error handling
  • Fault localization and debugging
  • Application of machine learning to anomaly detection for embedded systems
  • Empirical studies and experience reports

Published Papers (2 papers)

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Research

35 pages, 2730 KiB  
Article
Automatic Code Generation of Safety Mechanisms in Model-Driven Development
by Lars Huning and Elke Pulvermueller
Electronics 2021, 10(24), 3150; https://doi.org/10.3390/electronics10243150 - 17 Dec 2021
Cited by 1 | Viewed by 2999
Abstract
In order to meet regulatory standards in the domain of safety-critical systems, these systems have to include a set of safety mechanisms depending on the Safety Integrity Level (SIL). This article proposes an approach for how such safety mechanisms may be generated automatically [...] Read more.
In order to meet regulatory standards in the domain of safety-critical systems, these systems have to include a set of safety mechanisms depending on the Safety Integrity Level (SIL). This article proposes an approach for how such safety mechanisms may be generated automatically via Model-Driven Development (MDD), thereby improving developer productivity and decreasing the number of bugs that occur during manual implementation. The approach provides a structured way to define safety requirements, which may be parsed automatically and are used for the generation of software-implemented safety mechanisms, as well as the initial configuration of hardware-implemented safety mechanisms. The approach for software-implemented safety mechanisms relies on the Unified Modeling Language (UML) for representing these mechanisms in the model and uses model transformations to realize them in an intermediate model, from which code may be generated with simple 1:1 mappings. The approach for hardware-implemented safety mechanisms builds upon a template-based code snippet repository and a graphical user interface for configuration. The approach is applied to the development of a safety-critical fire detection application and the runtime of the model transformations is evaluated, indicating a linear scalability of the transformation steps. Furthermore, we evaluate the runtime and memory overhead of the generated code. Full article
(This article belongs to the Special Issue Software Verification and Validation for Embedded Systems—Volume 2)
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24 pages, 7102 KiB  
Article
Automated Memory Corruption Detection through Analysis of Static Variables and Dynamic Memory Usage
by Jihyun Park, Byoungju Choi and Yeonhee Kim
Electronics 2021, 10(17), 2127; https://doi.org/10.3390/electronics10172127 - 01 Sep 2021
Cited by 2 | Viewed by 2428
Abstract
Various methods for memory fault detection have been developed through continuous study. However, many memory defects remain that are difficult to resolve. Memory corruption is one such defect, and can cause system crashes, making debugging important. However, the locations of the system crash [...] Read more.
Various methods for memory fault detection have been developed through continuous study. However, many memory defects remain that are difficult to resolve. Memory corruption is one such defect, and can cause system crashes, making debugging important. However, the locations of the system crash and the actual source of the memory corruption often differ, which makes it difficult to solve these defects using the existing methods. In this paper, we propose a method that detects memory defects in which the location causing the defect is different from the actual location, providing useful information for debugging. This study presents a method for the real-time detection of memory defects in software based on data obtained through static and dynamic analysis. The data we used for memory defect analysis were (1) information of static global variables (data, address, size) derived through the analysis of executable binary files, and (2) dynamic memory usage information obtained by tracking memory-related functions that are called during the real-time execution of the process. We implemented the proposed method as a tool and applied it to applications running on the Linux. The results indicate the defect-detection efficacy of our tool for this application. Our method accurately detects defects with different cause and detected-fault locations, and also requires a very low overhead for fault detection. Full article
(This article belongs to the Special Issue Software Verification and Validation for Embedded Systems—Volume 2)
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