Reconfigurable Computing – Hardware/Software Co-design

A special issue of Electronics (ISSN 2079-9292). This special issue belongs to the section "Computer Science & Engineering".

Deadline for manuscript submissions: closed (30 June 2023) | Viewed by 2233

Special Issue Editors


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Guest Editor
Department of Electronics, Telecommunications and Informatics, IEETA, University of Aveiro, 3810-193 Aveiro, Portugal
Interests: reconfigurable computing; application-specific architectures; digital systems; object-oriented programming; combinatorial optimization; hardware description languages
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Guest Editor
1. Sobolev Institute of Mathematics SB RAS, Novosibirsk, Russia
2. Institute of Automation and Electrometry SB RAS, Faculty of Information Technologies, Novosibirsk State University, 630090 Novosibirsk, Russia
Interests: hardware accelerators; software-hardware co-design; high-performance data processing

Special Issue Information

Dear Colleagues, 

Developing efficient and reliable digital systems demands hardware/software co-design and co-simulation. Reconfigurable hardware/software co-design techniques target programmable systems-on-chip (PSoC) and involve integration of programmable logic (FPGA), general-purpose processors, and interconnection buses on one chip. Frequently, other core components are involved such as DSP structures, memory blocks, graphics processing units, etc. The majority of methods of designing embedded digital systems rely on a separation of software and hardware parts of the future system at early stages (usually during the specification phase). Once the separation is done, software and hardware are developed independently and, typically, by different people/teams. Such a priori separation has a number of limitations (e.g. time to market, suboptimal designs) which are better addressed if the interrelated software and hardware are developed simultaneously. Moreover, hardware/software co-simulation techniques contribute for better testing and diagnosis of system’s faults before they become a problem.

This Special Issue aims at discussing the efficient development of reconfigurable hardware/software systems, the parameters that need to be taken into account, the appropriate technologies, programming languages and compilers. The main aim of this Special Issue is to seek high-quality submissions that present and discuss the recent advances in the development of reconfigurable hardware/software systems, especially focusing on application successes.

The topics of interest include, but are not limited to, the following:

  • Co-design methods, tools, and compilers for reconfigurable hardware/software systems
  • Algorithms implemented on reconfigurable hardware/sowtware
  • Reconfigurable computing applications

Education for reconfigurable hardware/software systems including courses, teaching and training experience, lab equipment, design and applications

Prof. Dr. Iouliia Skliarova
Prof. Dr. Mikhail Lavrentiev
Guest Editors

Manuscript Submission Information

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Published Papers (1 paper)

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Research

22 pages, 8607 KiB  
Article
Hardware/Software Co-Design of a Circle Detection System Based on Evolutionary Computing
by Luis Felipe Rojas-Muñoz, Horacio Rostro-González, Carlos Hugo García-Capulín and Santiago Sánchez-Solano
Electronics 2022, 11(17), 2686; https://doi.org/10.3390/electronics11172686 - 27 Aug 2022
Cited by 1 | Viewed by 1278
Abstract
In recent years, the strategy of co-designing Hardware/Software (HW/SW) systems has been widely adopted to exploit the synergy between both approaches thanks to technological advances that have led to more powerful devices providing an increasingly better cost–benefit trade-off. This paper presents an HW/SW [...] Read more.
In recent years, the strategy of co-designing Hardware/Software (HW/SW) systems has been widely adopted to exploit the synergy between both approaches thanks to technological advances that have led to more powerful devices providing an increasingly better cost–benefit trade-off. This paper presents an HW/SW system for the detection of multiple circles in digital images based on a genetic algorithm. It is implemented on an Ultra96-v2 development board, which contains a Xilinx Zynq UltraScale+ MPSoC device and supports a Linux operating system that facilitates application development. The design is powered by developing an interactive computing environment by means of the Jupyter Notebook platform, in which different programming languages coexist. The specific advantages of each of these languages have been used to describe the hardware component that accelerates the evolutionary computation for circle detection (VHDL), to execute SW-HW interaction functions, as well as the pre- and post-processing of the images (ANSI-C) and to code, evaluate, and document the system execution process (Python). As a result, a computationally efficient application was obtained, with high accuracy in the detection of circles in synthetic and real images, and with a high degree of reconfigurability that provides the user with the necessary tools to incorporate it in a specific area of interest. Full article
(This article belongs to the Special Issue Reconfigurable Computing – Hardware/Software Co-design)
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