#
Investigation of Memristor-Based Neural Networks on Pattern Recognition^{ †}

^{1}

^{2}

^{*}

^{†}

## Abstract

**:**

## 1. Introduction

## 2. Memristor-Based Neural Networks

#### 2.1. Memristor-Based IFG Model

_{th}). The voltage level should be ±0.95 V which is given to the gate and source node.

#### 2.2. Weight Setting through Gradient Descent Model and Backpropagation

## 3. Results and Analysis

_{0}sin(wt) for w = 2w

_{0}angular frequency where the V-I characteristics shows with the applied negative voltage the current (I) increases, and the current (I) drops with the positive voltage value, causing a hysteresis loop to emerge. We can also see the linear relationship between the charge and flux.

_{th}) is applied to dc source i.e., connected in between drain and source.

## 4. Conclusions

## Author Contributions

## Funding

## Institutional Review Board Statement

## Informed Consent Statement

## Data Availability Statement

## Conflicts of Interest

## References

- Creswell. UC Santa Cruz UC Santa Cruz Electronic Theses and Dissertations Title. 2020. Available online: https://escholarship.org/uc/item/0jx2107r (accessed on 1 June 2020).
- Amelia, D. Application of Memristive Device Arrays for Pattern Recognition-Title. 2020. Available online: http://mpoc.org.my/malaysian-palm-oil-industry/ (accessed on 1 June 2020).
- Adhikari, S.P.; Kim, H.; Budhathoki, R.K.; Yang, C.; Chua, L.O. A circuit-based learning architecture for multilayer neural networks with memristor bridge synapses. IEEE Trans. Circuits Syst. I Regul. Pap.
**2015**, 62, 215–223. [Google Scholar] [CrossRef] - Krestinskaya, O.; Salama, K.N.; James, A.P. Learning in memristive neural network architectures using analog backpropagation circuits. IEEE Trans. Circuits Syst. I Regul. Pap.
**2019**, 66, 719–732. [Google Scholar] [CrossRef] - Krestinskaya, O.; Ibrayev, T.; James, A.P. Hierarchical Temporal Memory Features with Memristor Logic Circuits for Pattern Recognition. IEEE Trans. Comput. Des. Integr. Circuits Syst.
**2018**, 37, 1143–1156. [Google Scholar] [CrossRef] - Chu, M.; Kim, B.; Park, S.; Hwang, H.; Jeon, M.; Lee, B.H.; Lee, B.G. Neuromorphic Hardware System for Visual Pattern Recognition with Memristor Array and CMOS Neuron. IEEE Trans. Ind. Electron.
**2015**, 62, 2410–2419. [Google Scholar] [CrossRef] - Zhang, Y.; Li, Y.; Wang, X.; Friedman, E.G. Synaptic Characteristics of Ag/AgInSbTe/Ta-Based Memristor for Pattern Recognition Applications. IEEE Trans. Electron Devices
**2017**, 64, 1806–1811. [Google Scholar] [CrossRef] - Yan, R.; Hong, Q.; Wang, C.; Sun, J.; Li, Y. Multilayer Memristive Neural Network Circuit Based on Online Learning for License Plate Detection. IEEE Trans. Comput. Des. Integr. Circuits Syst.
**2022**, 41, 3000–3011. [Google Scholar] [CrossRef] - Abdoli, B.; Amirsoleimani, A.; Shamsi, J.; Mohammadi, K.; Ahmadi, A. A Novel CMOS-Memristor Based Inverter Circuit Design. In Proceedings of the 2014 22nd Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, 20–22 May 2014. [Google Scholar] [CrossRef]
- Azghadi, M.R.; Linares-Barranco, B.; Abbott, D.; Leong, P.H.W. A Hybrid CMOS-Memristor Neuromorphic Synapse. IEEE Trans. Biomed. Circuits Syst.
**2017**, 11, 434–445. [Google Scholar] [CrossRef] [PubMed] - Querlioz, D.; Bichler, O.; Dollfus, P.; Gamrat, C. Immunity to device variations in a spiking neural network with memristive nanodevices. IEEE Trans. Nanotechnol.
**2013**, 12, 288–295. [Google Scholar] [CrossRef] - Ran, H.; Wen, S.; Li, Q.; Yang, Y.; Shi, K.; Feng, Y.; Zhou, P.; Huang, T. Memristor-Based Edge Computing of Blaze Block for Image Recognition. IEEE Trans. Neural Netw. Learn. Syst.
**2022**, 33, 2121–2131. [Google Scholar] [CrossRef] - Xu, X.; Xu, W.; Wei, B.; Hu, F. Memristor-based neural network circuit of delay and simultaneous conditioning. IEEE Access
**2021**, 9, 148933–148947. [Google Scholar] [CrossRef] - Zhang, Y.; Wang, X.; Li, Y.; Friedman, E.G. Memristive Model for Synaptic Circuits. IEEE Trans. Circuits Syst. II Express Briefs
**2017**, 64, 767–771. [Google Scholar] [CrossRef] - Duan, Q.; Jing, Z.; Zou, X.; Wang, Y.; Yang, K.; Zhang, T.; Wu, S.; Huang, R.; Yang, Y. Spiking neurons with spatiotemporal dynamics and gain modulation for monolithically integrated memristive neural networks. Nat. Commun.
**2020**, 11, 3399. [Google Scholar] [CrossRef] - Sacchetto, D.; Gaillardon, P.E.; Zervas, M.; Carrara, S.; De Micheli, G.; Leblebici, Y. Applications of multi-terminal memristive devices: A review. IEEE Circuits Syst. Mag.
**2013**, 13, 23–41. [Google Scholar] [CrossRef] - Truong, S.N. Single Crossbar Array of Memristors with Bipolar Inputs for Neuromorphic Image Recognition. IEEE Access
**2020**, 8, 69327–69332. [Google Scholar] [CrossRef]

**Figure 1.**(

**a**) The link between the voltage and current is shown by a resistor, voltage, and charge by a capacitor, and current and flux by an inductor; (

**b**) Memristor basic symbol.

**Figure 3.**Complete IFG model showing connections between redox transistor and CBM. (

**a**) Write operation; (

**b**) read operation.

**Figure 4.**IFG-model-equivalent circuit. In the IFG model, the voltage applied at the “Gate” terminal is “V

_{w}”, which is the write voltage, and at the “Drain” terminal is “V

_{r}” which is the read voltage.

**Figure 6.**Operation of neural networks with IFG memory synapse and implementing image processing using gradient descent algorithm and backpropagation.

**Figure 7.**MATLAB simulation results of basic Memristor. (

**a**) Input sinewave signal (

**b**) V-Ī characteristics of memristor, (

**c**) linear relation between charge and flux (

**d**) pinched hysteresis loop (non-linear characteristics).

**Figure 8.**Two sets of graphs, one with the positive pulse response, and another one with the negative pulse response.

**Table 1.**Parametric values of the current, voltage, flux and charge for hysteresis curve with reference to Figure 1.

Measurement # | Input Voltage (V) | Input Current (I) | Flux (Ψ) | Charge (q) |
---|---|---|---|---|

1. | 0.018 mV | 0.022 mA | 3.3 × 10^{−9} (Wb) | −2.8 × 10^{−9} C |

2. | 0.037 mV | 0.044 mA | 1.3 × 10^{−4} (Wb) | −1.1 × 10^{−8} C |

3. | 0.056 mV | 0.066 mA | 1.5 × 10^{−4} (Wb) | −2.5 × 10^{−8} C |

4. | 0.075 mV | 0.088 mA | 1.8 × 10^{−4} (Wb) | −4.5 × 10^{−8} C |

Measurement # | Input Voltage (V) | Siemens (ns) | |
---|---|---|---|

Gmax = 1 × 10^{7}(X) | Gmax = 1 × 10^{7}(Y) | ||

1. | 0.95 V | 0 | 1.0 × 10^{−7} |

2. | 0.60 V | 2.0 × 10^{−8} | 1.0 × 10^{−7} |

3. | 0.31 V | 3.0 × 10^{−7} | 1.0 × 10^{−7} |

4. | 0.19 V | 4.02 × 10^{−6} | 9.9 × 10^{−8} |

5. | 0 | 6.02 × 10^{−6} | 9.9 × 10^{−8} |

Measurement # | Input Voltage (V) | Siemens (ns) | |
---|---|---|---|

Gmax = 1 × 10^{−7}(X) | Gmax=1 × 10^{−7}(Y) | ||

1. | 0 | 0 | 1.0 × 10^{−7} |

2. | −0.19 V | 2.0 × 10^{−8} | 1.0 × 10^{−7} |

3. | −0.31 V | 3.0 × 10^{−7} | 1.0 × 10^{−7} |

4. | −0.60 V | 4.0 × 10^{−6} | 1.0 × 10^{−7} |

5. | −0.95 V | 6.0 × 10^{−6} | 1.0 × 10^{−7} |

Model # | Activation Function | Accuracy |
---|---|---|

Traditional model | Sigmoid function | 93.8% |

Proposed model | ReLu function and Adams function | 94.6% |

Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content. |

© 2023 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/).

## Share and Cite

**MDPI and ACS Style**

Routhu, G.; Phalguni Singh, N.; Raja, S.; Reddy, E.S.K.
Investigation of Memristor-Based Neural Networks on Pattern Recognition. *Eng. Proc.* **2023**, *34*, 9.
https://doi.org/10.3390/HMAM2-14149

**AMA Style**

Routhu G, Phalguni Singh N, Raja S, Reddy ESK.
Investigation of Memristor-Based Neural Networks on Pattern Recognition. *Engineering Proceedings*. 2023; 34(1):9.
https://doi.org/10.3390/HMAM2-14149

**Chicago/Turabian Style**

Routhu, Gayatri, Ngangbam Phalguni Singh, Selvakumar Raja, and Eppala Shashi Kumar Reddy.
2023. "Investigation of Memristor-Based Neural Networks on Pattern Recognition" *Engineering Proceedings* 34, no. 1: 9.
https://doi.org/10.3390/HMAM2-14149