A Modified Topology of a High Efficiency Bidirectional Type DC–DC Converter by Synchronous Rectification

Abstract

A modified Topology to acquire high efficiency of a bidirectional method of DC–DC converter of non-isolated approach is proposed. The modified circuit involves four numbers of switches with their body diodes, passive elements as two inductors as well as a capacitor and the circuit arrangements double boost converters to progress the voltage gain. The input current of the proposed topology divided amongst the two dissimilar values of inductors produces greater efficiency. In the step-down mode, an apparent lessening in voltage gain and also enhanced efficiency can be realized in the recommended system by expending a synchronous rectification. The modified topology shields the technique for presentation of easy control configurations and is used for truncated output voltage with a large current of energy storage systems in the renewable applications as well as hybrid energy source electric vehicle applications. The simulation of the projected structure has been conducted through MATLAB/Simulink software and has been corroborated through a 12 V/180 V, 200 Watts experimental prototype circuit.

1. Introduction

There has been an increase in the interest of green energy sources (GES) to reduce the carbon footings and emissions. However, input power fluctuation of GES does not basically compete with the consumption of power by the consumers. Therefore, this causes reliability and stability concerns in the network of the power grid [1]. In recent years, for these issues, during the period of higher power production, the energy can be stored, and this stored energy used during the period of lower power production was conducted in [2]. Dependence of the extract power from various renewable energies on environmental requirements and poor dynamic response causes an energy storage element that is a battery to be required of these systems, where a battery is charged from a DC bus. Hence, an interface system is required to connect and convert the DC bus voltage to the battery voltage. Once there is low voltage, battery is charged from the DC bus and, if the power is required in the DC bus, the converter will become bidirectional in nature, hence the power can be delivered back [3]. To transfer the energy among various DC sources, which is between batteries to an existing DC link in both directions of power flow, a bidirectional DC–DC converter can be used. In addition, the energy flow control in energy storage systems using super-capacitors and rechargeable batteries involves the use of bidirectional converters. These converters are broadly used for various applications in green energy which are eco-friendly and play a vital role in energy back-up systems. With swift and rapid load variations, wind energy or photovoltaic solar systems suffer from the shortcomings of providing steady power, which forces the usage of batteries in hybrid power systems [4,5,6]. In [7], a wide conversion of voltage can be seen by means of a single switch in the boost converter. Likewise, in this converter, switch voltage is a lesser amount of the output value and it is only for boosting the voltage. Various bi-directional converters are discussed in [8]—among which the SEPIC converter performed well based on the range of ripple factor. An interleaved boost converter shown in [9] has a low ripple in the input current, while the gain can be increased by means of varying the interleaving two or three windings coupled with inductors. In [10], a three-winding tapping inductor is used to reduce the input current ripple. In addition, in [11], a passive filter block is employed in which it utilizes two winding coupled inductors sequentially to cancel both the input and output current ripples. Based on [12], non-insulated converters do not involve any transformers or coupled inductors and have normal restrictions for driving with wide voltage gain, due to no transformer relation to lift the voltage. These converters [10,11,12] are all unidirectional power flow in nature.

In [13], a high-gain high-efficiency bidirectional converter is proposed to attain the interface between the battery and the DC bus for a stand-alone PV system. An additional phase integrated makes the converter of [14], which involves a switch, a coupled inductor, two capacitors, and three diodes per phase. Hence, Ref. [14] is a two-phase converter which is interleaved, in order to obtain a wide voltage conversion, by setting the coupled inductors to a large turn ratio. In [15], an energy management approach for a hybrid microgrid structured electric vehicle charging station is discussed and analyzed various technical issues like utilization, overloading, and the charging time, which provides the energy management strategy. Obtaining a high voltage gain, by connecting the Cuk converter and Boost converter in parallel for providing continuous current operation with the help of a single power switch, is discussed in [16] and results in lesser voltage stress across the power switch and the diodes. A three port buck-boost converter is designed and developed in [17]; it has an ability to handle diversified energy sources of various current and voltage characteristics applicable for electric vehicles and provides a large gain value. An ultra-high efficiency 50 kW bidirectional DC–DC converter is designed and a high-precision efficiency measurement method using a regenerative approach is discussed in [18], which provides high efficiency under full load conditions. A bidirectional buck/boost converter having a high-frequency high-efficiency GaN device based interleaved critical current mode with an inverse coupled inductor is discussed in [19] and mainly concentrates on a high switching frequency operation, which results in high efficiency. A more symmetric four-phase inverse coupled inductor structure, in order to substantially improve the multiphase interleaved bidirectional buck/boost converter, is presented in [20] and provides high efficiency in both modes with lower voltage ripples. An optimized design process of high power multi-phase interleaved bidirectional boost converters is presented in [21], in order to achieve a fast and accurate analysis and design for electrified power trains. Hence, the converters in [18,19,20,21] are suited for high power rating as well as high efficiency measurements.

A DC–DC converter of bidirectional type is presented in [22] and involves three power switches and one coupled inductor, but its efficiency is sufficiently low for a higher voltage gain. In [23], the circuit for the bidirectional converter is shown in Figure 1, which contains four switches along with an inductor and wherein two capacitors are used to obtain the wide conversion range of voltage, but it has some constraints; during buck mode, the output voltage should have a maximum of half of the input voltage, while, during boost mode, the output voltage must be greater than twice the input voltage. In addition, due to the presence of one inductor in this circuit, its average value of the current is closer to the conventional converter. In [24], an extensive voltage-gain can be realized in an H-bridge type converter short of a common ground which can be formed by associating in equivalent form of double power cells that are bidirectional in character. The deficit of [24] is evaded in [25] by using an asymmetric type H-bridge taking a common grounded form in which the pulse signals are by means of modulation indices along with the carrier waveforms. A combination of buck-boost nature of two-phase converter having an inter-leaved type along with a charge-pump on the high voltage-side and an unregulated type converter at the low voltage-end can be realized in [26], which forms two phase switching control configuration. In [27], a converter having phase shift of an isolated dual active configuration with a full bridge type is conferred in [27], which is suitable for battery energy storage systems. A converter based on voltage-clamped along with a coupled-inductor chosen for the system had energy storage conferred in [28], in order to obtain a wide gain by means of varying the inductor turns ratio. Various topologies of converter that are bidirectional studied to obtain a high gain as well as efficiency are reviewed in [29]. Three sets of converters can be seen in [30], among which the boost converter combined with any one of the Sepic/Cuk/Buck-Boost types to form the three structures and compared its feasibility. In [31], to attain a high value of voltage-gain, the authors utilized a three winding style of a coupled inductor, though its design becomes complicated during structural implementation. In [32], a high transformation ratio has been achieved with a three winding nature of a coupled inductor, which includes leakage inductance along with magnetizing inductance, which are complex to design owing to its dissimilar turn’s ratio. The configuration of conventional converter of boost/buck type is very simple as it involves less components and allows for the easiest way to control, but is restricted to obtain low voltage-gain value in both boost as well as buck operations. In addition, in the conventional converter, the inductor current is equal to the input current, which is similar to the switch current. The various converters discussed in this literature have several restrictions to accomplish high gain as well as high efficiency.

A modified topology is proposed based on [22], by introducing one additional switch, an inductor, and a capacitor with the converter circuit in [22]. The components count in this proposed topology involves the same number of switches but with two inductors and a capacitor is utilized when compared to the converter in [23]. The proposed work effectively developed a converter with a high conversion ratio and improved efficiency. The values of the two inductors are different, hence its currents also differ, which results in the average of its current being less than the converter in [23]. In order to enhance the voltage gain, the modified topology forms two boost converters. In addition, the input current is separated among the inductors, which results in reducing its size. It has been demonstrated that the proposed topology resulted in an enhanced voltage gain in comparison with the converters in [22,23]. During the step-down operation of the proposed work, among the four switches, one of the switches carries the sum of the two inductor currents which is very high when compared to the other switch currents. By using synchronous rectification instead of diode rectification in this particular switch, switching losses is greatly reduced, which results in an increase in efficiency. In addition, the proposed work should operate for a wide range of duty ratios under both boost and buck operations when compared to the converter [22,23]. This proposed bidirectional type of DC–DC converter during step-down operation is suitable for low output voltage with a high current of battery charging applications.

The following section involves the analysis of the proposed method; its operating principle and steady-state analysis are discussed in Section 2. Comparisons and discussions of the proposed type with the conventional converters are described in Section 3. Section 4 presents the simulation study of the proposed topology. Experimental verifications are discussed in Section 5, while Section 6 presents the conclusions along with the summarization of outcomes.

2. Analysis of the Proposed Converter

The projected topology of the converter is shown in Figure 2. It incorporates four power switches with their body diodes and two inductors and a capacitor. When compared to the inductor value in the converter [23], in these works, two inductors which have different values are implemented, hence their currents are different. Due to the presence of two inductors, this topology forms two boost converters which enhance their voltage gain during step-up operation. At the same time, during step-down operation, the current in one of the switches is the sum of the two inductor currents, which is high. By using synchronous rectification of the corresponding switch, its switching losses are greatly reduced, which results in an increase in efficiency.

Based on the following assumptions, the steady-state investigation has been carried out for boost and buck modes of operations. For the ON-state resistance RDS (ON) of the power switches, the equivalent series resistance of the inductors and capacitor is ignored, and the voltage across the capacitor can be assumed as constant. The pulse width modulation (PWM) method is employed to manage the switches S₁ and S₂ concurrently. The switches S₃ and S₄ are as synchronous rectifiers.

2.1. Step-Up Operation

The circuit of proposed topology in step-up operation is illustrated in Figure 3a; here, S₁ and S₂ act as control switches and S₃ and S₄ are synchronous rectifiers. It operates under two statuses based on the triggering of the corresponding switches.

2.1.1. Status I (t₀ ≤ t ≤ t₁)

During this time span, the switches S₁ and S₂ are turned ON, while the switches S₃ and S₄ turned OFF at the the same time are illustrated in Figure 3b by means of applying the gate pulses to the appropriate switches. The energy from the low-voltage end is the input voltage, and U_in is transferred on the way to the inductor L₂. Inductor L₁ is magnetized by the input DC source U_in and the energy stored in capacitor Cap. The stored energy in the capacitor C₀ is released to the load, R₀. Hence, the voltages across the inductors L₁ and L₂ are expressed as

$${\mathrm{U}}_{\mathrm{L}1}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}$$

(1)

$${\mathrm{U}}_{\mathrm{L}2}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}$$

(2)

2.1.2. Status II (t₁ ≤ t ≤ t₂)

During this time span, the switches S₁ and S₂ are turned OFF, while switches S₃ and S₄ turned ON at the same time are shown in Figure 3c by means of applying the gate pulses to the appropriate switches. The capacitor Cap is charged by the input supply, U_in, and the energy stored in inductor L₂. Capacitor C₀ is also charged by the input supply, U_in, and the energy stored in inductor L₁. The inductor voltages across L₁ and L₂ are expressed as

$${\mathrm{U}}_{\mathrm{L}1}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0$$

(3)

$${\mathrm{U}}_{\mathrm{L}2}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}$$

(4)

According to the voltage-second (V-S) balance technique applied to the inductors, its further generalization produces the Equation for step-up gain in continuous conduction mode (CCM) as exemplified by the following expressions:

$${\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{S}}}{\int }}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}})\mathrm{d}\mathrm{t}}+{\displaystyle \underset{\mathrm{D}{\mathrm{T}}_{\mathrm{S}}}{\overset{{\mathrm{T}}_{\mathrm{S}}}{\int }}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0)\mathrm{d}\mathrm{t}=0}$$

(5)

$${\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{S}}}{\int }}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}\mathrm{d}\mathrm{t}+{\displaystyle \underset{\mathrm{D}{\mathrm{T}}_{\mathrm{S}}}{\overset{{\mathrm{T}}_{\mathrm{S}}}{\int }}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}})\mathrm{d}\mathrm{t}}=0$$

(6)

$${\mathrm{G}}_{\mathrm{C}\mathrm{C}\mathrm{M}(\mathrm{s}\mathrm{t}\mathrm{e}\mathrm{p}-\mathrm{u}\mathrm{p})}=\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}=\frac{1}{{(1-\mathrm{D})}^2}$$

(7)

The characteristics’ typical waveforms (current and voltage) of the presented circuit in step-up operation under continuous conduction mode (CCM) are shown in Figure 4b.

The Cap and C₀ capacitor currents are expressed as:

$${\mathrm{i}}_{\mathrm{C}\mathrm{a}\mathrm{p}}=\left\{\begin{array}{ll}-{\mathrm{I}}_{\mathrm{L}1}& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\\ {\mathrm{I}}_{\mathrm{L}2}& \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{S}}\end{array}\right.$$

(8)

$${\mathrm{i}}_{{\mathrm{C}}_0}=\left\{\begin{array}{ll}-{\mathrm{I}}_0& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\\ {\mathrm{I}}_{\mathrm{L}1}-{\mathrm{I}}_0& \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{S}}\end{array}\right.$$

(9)

By using the ampere-second balance principle on Cap and C₀,

$$〈{\mathrm{i}}_{\mathrm{C}\mathrm{a}\mathrm{p}}〉=0=\frac{-\mathrm{D}{\mathrm{T}}_{\mathrm{s}}{\mathrm{I}}_{\mathrm{L}1}+(1-\mathrm{D}){\mathrm{T}}_{\mathrm{s}}{\mathrm{I}}_{\mathrm{L}2}}{{\mathrm{T}}_{\mathrm{s}}}\Rightarrow {\mathrm{I}}_{\mathrm{L}2}=\frac{\mathrm{D}}{(1-\mathrm{D})}{\mathrm{I}}_{\mathrm{L}1}$$

(10)

$$〈{\mathrm{i}}_{{\mathrm{C}}_0}〉=0={\mathrm{I}}_{\mathrm{L}1}=\frac{1}{(1-\mathrm{D})}{\mathrm{I}}_0$$

(11)

$${\mathrm{I}}_{\mathrm{L}2}=\frac{\mathrm{D}}{{(1-\mathrm{D})}^2}{\mathrm{I}}_0$$

(12)

The expression for the inductor current ripples in L₁ and L₂ are written as

$${\mathrm{i}}_{\mathrm{L}1}(\mathrm{D}{\mathrm{T}}_{\mathrm{s}})={\mathrm{i}}_{\mathrm{L}1}(0)+\frac{1}{{\mathrm{L}}_1}{\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}{\mathrm{U}}_{\mathrm{L}1}(\mathrm{t})\mathrm{d}\mathrm{t}}\Rightarrow \Delta {\mathrm{i}}_{\mathrm{L}1}=\frac{\mathrm{D}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}})}{{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(13)

$${\mathrm{i}}_{\mathrm{L}2}(\mathrm{D}{\mathrm{T}}_{\mathrm{s}})={\mathrm{i}}_{\mathrm{L}2}(0)+\frac{1}{{\mathrm{L}}_2}{\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}{\mathrm{U}}_{\mathrm{L}2}(\mathrm{t})\mathrm{d}\mathrm{t}}\Rightarrow \Delta {\mathrm{i}}_{\mathrm{L}2}=\frac{\mathrm{D}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(14)

The converter operates under CCM, when the average value of an inductor is more than half of its current ripples [33]. The inductor values based on its ripples are expressed as

$${\mathrm{I}}_{\mathrm{L}1}\ge \frac{1}{2}\Delta {\mathrm{i}}_{\mathrm{L}1}$$

and

$${\mathrm{I}}_{\mathrm{L}2}\ge \frac{1}{2}\Delta {\mathrm{i}}_{\mathrm{L}2}$$

For determining the value of L₁,

$$\frac{{\mathrm{I}}_0}{1-\mathrm{D}}\ge \frac{\mathrm{D}\left({\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}\right)}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

where

$${\mathrm{I}}_0=\frac{{\mathrm{U}}_0}{{\mathrm{R}}_0};\frac{{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}=\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}=\frac{1}{1-\mathrm{D}}$$

The expression becomes

$$\frac{{\mathrm{U}}_0}{{\mathrm{R}}_0(1-\mathrm{D})}=\frac{\mathrm{D}(2-\mathrm{D}){\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

Similarly, for the inductor value L₂,

$$\frac{\mathrm{D}{\mathrm{I}}_0}{{(1-\mathrm{D})}^2}\ge \frac{\mathrm{D}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{2{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

$$\frac{{\mathrm{U}}_0}{{\mathrm{R}}_0{(1-\mathrm{D})}^2}\ge \frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{2{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

After simplification of the above expressions, the least possible values of inductors can be found as

$${\mathrm{L}}_1\ge \frac{\mathrm{D}(2-\mathrm{D}){(1-\mathrm{D})}^2{\mathrm{R}}_0}{2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(15)

$${\mathrm{L}}_2\ge \frac{{(1-\mathrm{D})}^4{\mathrm{R}}_0}{2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(16)

If the values of the inductors are less than the above expression, then the converter will face the boundary condition or even the discontinuous conduction mode. The comparison of voltage gain along with duty cycle for step-up operation is illustrated in Figure 5. It is evident that the step-up gain of the proposed circuit is better than the converter in [23].

2.2. Step-Down Operation

The circuit of proposed topology in step-down operation is illustrated in Figure 6a; here, S₃ and S₄ act as control switches and S₁ and S₂ are as synchronous rectifiers. It operates under two statuses based on the triggering of the corresponding switches.

2.2.1. Status I (t₀ ≤ t ≤ t₁)

During this time span, the switches S₃ and S₄ are turned ON, while the switches S₁ and S₂ turned OFF at the same time are illustrated in Figure 6b by means of applying the gate pulses to the appropriate switches. The energy from the high-voltage end, which is the input voltage U_in, is transferred on the way to the inductor L₁. The capacitor Cap is discharged through inductor L₂ and capacitor C₀. Thus, the inductor voltages in L₁ and L₂ are attained as

$${\mathrm{U}}_{\mathrm{L}1}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0$$

(17)

$${\mathrm{U}}_{\mathrm{L}2}={\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}-{\mathrm{U}}_0$$

(18)

2.2.2. Status II (t₁ ≤ t ≤ t₂)

During this time span, the switches S₁ and S₂ are turned on, while switches S₃ and S₄ are turned off, as shown in Figure 6c by means of applying the gate pulses to the appropriate switches. The inductor L₁ is demagnetized to capacitors Cap and C₀. The inductor energy stored in L₂ is released to capacitor C₀, which provides energy to the load. Therefore, the inductor voltages can be expressed as

$${\mathrm{U}}_{\mathrm{L}1}=-{\mathrm{U}}_0-{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}$$

(19)

$${\mathrm{U}}_{\mathrm{L}2}=-{\mathrm{U}}_0$$

(20)

Applying the technique of voltage-second (V-S) balance on the inductors L₁ and L₂, we obtain

$$〈{\mathrm{U}}_{\mathrm{L}1}〉={\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0)\mathrm{d}\mathrm{t}}+{\displaystyle \underset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\overset{{\mathrm{T}}_{\mathrm{s}}}{\int }}(-{\mathrm{U}}_0-{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}})\mathrm{d}\mathrm{t}}=0$$

(21)

$$〈{\mathrm{U}}_{\mathrm{L}2}〉={\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}({\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}-{\mathrm{U}}_0)\mathrm{d}\mathrm{t}}+{\displaystyle \underset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\overset{{\mathrm{T}}_{\mathrm{s}}}{\int }}(-{\mathrm{U}}_0)\mathrm{d}\mathrm{t}}=0$$

(22)

Hence, the voltage gain of step-down under continuous conduction mode specified by

$${\mathrm{G}}_{\mathrm{C}\mathrm{C}\mathrm{M}(\mathrm{s}\mathrm{t}\mathrm{e}\mathrm{p}-\mathrm{d}\mathrm{o}\mathrm{w}\mathrm{n})}=\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}={\mathrm{D}}^2$$

(23)

Figure 7a,b shows the characteristics’ typical waveforms (current and voltage) of the presented circuit in step-down operation under CCM.

If the inductors are operated under boundary condition mode (BCM), then the capacitors Cap and C₀ currents are expressed as:

$${\mathrm{i}}_{\mathrm{C}\mathrm{a}\mathrm{p}}=\left\{\begin{array}{ll}-{\mathrm{I}}_{\mathrm{L}2}& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\\ {\mathrm{I}}_{\mathrm{L}1}& \mathrm{D}{\mathrm{T}}_{\mathrm{S}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{S}}\end{array}\right.$$

(24)

The current of the capacitor C₀ is I_L1 + I_L2 − I₀. Applying the technique of A-S (ampere-second) balance on the capacitors, Cap and C₀,

$$〈{\mathrm{i}}_{\mathrm{C}\mathrm{a}\mathrm{p}}〉=0=\frac{-\mathrm{D}{\mathrm{T}}_{\mathrm{s}}{\mathrm{I}}_{\mathrm{L}2}+(1-\mathrm{D}){\mathrm{T}}_{\mathrm{s}}{\mathrm{I}}_{\mathrm{L}1}}{{\mathrm{T}}_{\mathrm{s}}}\Rightarrow {\mathrm{I}}_{\mathrm{L}1}=\frac{\mathrm{D}}{(1-\mathrm{D})}{\mathrm{I}}_{\mathrm{L}2}$$

(25)

$$〈{\mathrm{i}}_{{\mathrm{C}}_0}〉=0\Rightarrow {\mathrm{I}}_{\mathrm{L}1}+{\mathrm{I}}_{\mathrm{L}2}-{\mathrm{I}}_0$$

(26)

Therefore, the average currents of the inductors are

$${\mathrm{I}}_{\mathrm{L}1}=\mathrm{D}{\mathrm{I}}_0$$

(27)

$${\mathrm{I}}_{\mathrm{L}2}=(1-\mathrm{D}){\mathrm{I}}_0$$

(28)

Current ripples of the inductors L₁ and L₂ can be attained as from the integral form of the current expressions of the inductors L₁ as well as L₂.

$${\mathrm{i}}_{\mathrm{L}1}(\mathrm{D}{\mathrm{T}}_{\mathrm{s}})={\mathrm{i}}_{\mathrm{L}1}(0)+\frac{1}{{\mathrm{L}}_1}{\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}{\mathrm{U}}_{\mathrm{L}1}(\mathrm{t})\mathrm{d}\mathrm{t}}\Rightarrow \Delta {\mathrm{i}}_{\mathrm{L}1}=\frac{\mathrm{D}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0)}{{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(29)

$${\mathrm{i}}_{\mathrm{L}2}(\mathrm{D}{\mathrm{T}}_{\mathrm{s}})={\mathrm{i}}_{\mathrm{L}2}(0)+\frac{1}{{\mathrm{L}}_2}{\displaystyle \underset{0}{\overset{\mathrm{D}{\mathrm{T}}_{\mathrm{s}}}{\int }}{\mathrm{U}}_{\mathrm{L}2}(\mathrm{t})\mathrm{d}\mathrm{t}}\Rightarrow \Delta {\mathrm{i}}_{\mathrm{L}2}=\frac{\mathrm{D}({\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}-{\mathrm{U}}_0)}{{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(30)

Express the inductor values as

$${\mathrm{I}}_{\mathrm{L}1}\ge \frac{1}{2}\Delta {\mathrm{i}}_{\mathrm{L}1}$$

and

$${\mathrm{I}}_{\mathrm{L}2}\ge \frac{1}{2}\Delta {\mathrm{i}}_{\mathrm{L}2}$$

Determine the value of L₁,

$$\mathrm{D}{\mathrm{I}}_0\ge \frac{\mathrm{D}\left({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0\right)}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

where

$${\mathrm{I}}_0=\frac{{\mathrm{U}}_0}{{\mathrm{R}}_0};\frac{{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}=\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}=\mathrm{D}$$

The expression becomes

$$\mathrm{D}\frac{{\mathrm{U}}_0}{{\mathrm{R}}_0}=\frac{\mathrm{D}({\mathrm{U}}_{\mathrm{i}\mathrm{n}}-{\mathrm{U}}_0)}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

Similarly, for the inductor value L₂,

$$(1-\mathrm{D}){\mathrm{I}}_0\ge \frac{\mathrm{D}({\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}-{\mathrm{U}}_0)}{2{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

$$\frac{(1-\mathrm{D}){\mathrm{U}}_0}{{\mathrm{R}}_0}\ge \frac{\mathrm{D}({\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}-{\mathrm{U}}_0)}{2{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

After simplification of the above Equations, the least possible values of inductors can be expressed as

$${\mathrm{L}}_1\ge \frac{(1-{\mathrm{D}}^2){\mathrm{R}}_0}{2{\mathrm{D}}^2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(31)

$${\mathrm{L}}_2\ge \frac{{\mathrm{R}}_0}{2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(32)

The comparison of voltage gain along with duty cycle for step-down operation is illustrated in Figure 8. It is clear that the step-down gain is less than the existing converter [23]. Moreover, the proposed topology and its steady-state analysis are observed to be simple.

3. Comparison and Discussion

A conventional cascaded type bidirectional buck/boost converter shown in Figure 9 is compared with the proposed converter.

The voltage gains for boost operation and buck operation of the converter in the proposed topology are as follows:

$$\mathrm{S}\mathrm{t}\mathrm{e}\mathrm{p} \mathrm{u}\mathrm{p} \mathrm{m}\mathrm{o}\mathrm{d}\mathrm{e}:\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}=\frac{1}{{(\mathrm{I}-\mathrm{D})}^2}\to \mathrm{D}=1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}$$

$$\mathrm{S}\mathrm{t}\mathrm{e}\mathrm{p} \mathrm{d}\mathrm{o}\mathrm{w}\mathrm{n} \mathrm{m}\mathrm{o}\mathrm{d}\mathrm{e}:\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}={\mathrm{D}}^2\to \mathrm{D}=\sqrt{\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}$$

(33)

The cascaded type and the proposed type are similar to the voltage gain, but the presented work has certain benefits that highlight additional applications. From the cascaded type, the inductor currents along with their ripples are expressed as

$${\mathrm{I}}_{\mathrm{L}1}=\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}$$

(34)

$$\Delta {\mathrm{i}}_{\mathrm{L}1}=\frac{\left(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\right){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(35)

$${\mathrm{I}}_{\mathrm{L}2}=\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}$$

(36)

$$\Delta {\mathrm{i}}_{\mathrm{L}2}=\left(\frac{({\mathrm{U}}_0-{\mathrm{U}}_{\mathrm{i}\mathrm{n}})}{{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)\left(\frac{\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}{\sqrt{{\mathrm{U}}_0}+\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}\right)$$

(37)

As voltage gain of cascaded type and the proposed converter are similar, the inductor currents as well as their ripples in the presented converter are seen to be

$${\mathrm{I}}_{\mathrm{L}1}=\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}$$

(38)

$$\Delta {\mathrm{i}}_{\mathrm{L}1}=\frac{({\mathrm{U}}_0-{\mathrm{U}}_{\mathrm{i}\mathrm{n}})\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}}{{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(39)

$${\mathrm{I}}_{\mathrm{L}2}=\left(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\right)\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}$$

(40)

$$\Delta {\mathrm{i}}_{\mathrm{L}2}=\frac{(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(41)

where U_in, U₀, and P₀ are the input-voltage side, output-voltage side, and the output power based on the boost or buck converters, respectively.

From the above Equations of cascaded type as well as the proposed one, it is identified that, in Equations (38) and (36), the inductor current I_L1 of the presented type is similar to the inductor current I_L2 of the cascaded type, whereas from Equations (40)–(34), it is shown that the inductor current I_L2 of the presented converter is less significant than the inductor current I_L1 of the cascaded type. This results in the size of inductor L₂ of the presented type being smaller than the inductor L₁ of the cascaded type.

The voltage and current stresses of the switching devices in the presented converter are:

$${\mathrm{U}}_{{\mathrm{S}}_1}={\mathrm{U}}_0 \mathrm{for} \mathrm{step}\text{-}\mathrm{up} \mathrm{and} {\mathrm{U}}_{{\mathrm{S}}_1}={\mathrm{U}}_{\mathrm{i}\mathrm{n}} \mathrm{for} \mathrm{step}\text{-}\mathrm{down}$$

(42)

Basically,

$${\mathrm{U}}_{{\mathrm{S}}_1}={\mathrm{U}}_{\mathrm{H}\mathrm{i}\mathrm{g}\mathrm{h}}$$

$$\begin{gathered} {\mathrm{U}}_{{\mathrm{S}}_2}={\mathrm{U}}_{{\mathrm{S}}_3}={\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}=\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}=\sqrt{{\mathrm{U}}_{\mathrm{H}\mathrm{i}\mathrm{g}\mathrm{h}}{\mathrm{U}}_{\mathrm{L}\mathrm{o}\mathrm{w}}} \\ {\mathrm{U}}_{{\mathrm{S}}_4}={\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{U}}_0=\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}+{\mathrm{U}}_0 \mathrm{For} \mathrm{step}\text{-}\mathrm{up} \\ {\mathrm{U}}_{{\mathrm{S}}_4}={\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{U}}_{\mathrm{i}\mathrm{n}}=\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}+{\mathrm{U}}_{\mathrm{i}\mathrm{n}} \mathrm{For} \mathrm{step}\text{-}\mathrm{down} \end{gathered}$$

(43)

$${\mathrm{U}}_{{\mathrm{S}}_4}={\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{U}}_{\mathrm{H}\mathrm{i}\mathrm{g}\mathrm{h}}=\sqrt{{\mathrm{U}}_{\mathrm{L}\mathrm{o}\mathrm{w}}{\mathrm{U}}_{\mathrm{H}\mathrm{i}\mathrm{g}\mathrm{h}}}+{\mathrm{U}}_{\mathrm{H}\mathrm{i}\mathrm{g}\mathrm{h}}$$

(44)

$${\mathrm{i}}_{{\mathrm{S}}_{1\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}={\mathrm{i}}_{{\mathrm{S}}_{4\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}={\mathrm{I}}_{\mathrm{L}1}+\frac{\Delta {\mathrm{i}}_{\mathrm{L}1}}{2}=\left[\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}})\left(\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}+\frac{({\mathrm{U}}_0-{\mathrm{U}}_{\mathrm{i}\mathrm{n}})}{2{\mathrm{L}}_2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)\right]$$

(45)

$${\mathrm{i}}_{{\mathrm{S}}_{3\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}={\mathrm{i}}_{{\mathrm{L}}_{2\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}=\left[(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}})\left(\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}+\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)\right]$$

(46)

$${\mathrm{i}}_{{\mathrm{S}}_{2\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}={\mathrm{i}}_{{\mathrm{L}}_{1\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}+{\mathrm{i}}_{{\mathrm{L}}_{2\mathrm{p}\mathrm{e}\mathrm{a}\mathrm{k}}}=\left[\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}+\frac{(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right]\left[\frac{1}{{\mathrm{L}}_1}+\frac{1+\sqrt{\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}}{{\mathrm{L}}_2}\right]$$

(47)

The converter in [23] is shown in Figure 1. During step-up mode, the input current is equal to the inductor current and is shared among the switches based on the modes of operations. While during step-down operation, the input current is shared among the switches based on the modes of operations, but the inductor current is equal to the load current. Here, the average values of the switch currents are less than the conventional converter.

The proposed topology is shown in Figure 2, and it contains two different values of inductors, resulting in the average values of the switch currents being different. From Equations (45)– (47), the current stresses of each switch can be determined, in that the currents in the switches S₁ and S₄ are the same and equivalent to the inductor current, I_L1, while the current in the switch S₃ has the value equal to the inductor current, I_L2. These values are lesser than the average values of the switch currents in the converter of [23]. However, the current in switch S₂ is the addition of the two inductor currents, which has an edge over [23] when this switch is used as a synchronous rectifier during step-down operation. In addition, in the proposed structure, the four switch current values during boost and buck modes are similar. For the step-up operation, for a gain value of less than or equal to 5, the converter [23] is suitable, but, for the higher gain values, its duty cycle becomes large, which is shown in Figure 5. For a large gain value of the converter [23], the duty cycle becomes high, hence the switching losses increase, which reduces its efficiency. In addition, for the step-down operation, the converter [23] has restrictions of the maximum gain value of 0.5, but the proposed converter results in less gain compared to the converter [23], which is shown in Figure 8. Hence, the proposed type is superior for large gains during step-up operation and lower gain during the step-down operation when compared to [23].

Based on [33], in bidirectional converters, synchronous rectification plays a key role in order to achieve higher efficiency. During step-down operation, the switches S₃ and S₄ are as power switches, whereas S₁ and S₂ are synchronous rectifiers. Hence, synchronous rectification can be utilized for switch S₂ of the proposed converter during step-down mode because its current value is very high, in which the efficiency has been increased when compared with the converter in [23]. At the same time, the converter in [23] has the constraints of maximum gain of 0.5 for the duty cycle of one during step-down mode; that is, gain value is always half of the duty cycle.

The cascaded type converter is shown in Figure 9, and its switch stresses in total are seen to be

$$\mathrm{S}={\displaystyle \sum _{\mathrm{j}=1}^4{\mathrm{U}}_{\mathrm{j}}{\mathrm{I}}_{\mathrm{j}}}$$

(48)

Voltage and current stresses in the switches are U _j and I _j, respectively. S represents total active switch stresses and is given by

$${\mathrm{S}}_{\mathrm{p}\mathrm{r}\mathrm{o}\mathrm{p}.\mathrm{t}\mathrm{y}\mathrm{p}\mathrm{e}}=\frac{4{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}$$

(49)

Similarly, the overall active switch stresses in cascaded type is given by

$$\mathrm{S}=\frac{2{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}+2\sqrt{\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}\frac{{\mathrm{P}}_0}{{\mathrm{U}}_0}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}$$

(50)

$${\mathrm{S}}_{\mathrm{C}\mathrm{a}\mathrm{s}\mathrm{c}\mathrm{a}\mathrm{d}\mathrm{e}\mathrm{d} \mathrm{t}\mathrm{y}\mathrm{p}\mathrm{e}}=\frac{4{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}\sqrt{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}$$

(51)

From expressions (10)–(12) for the inductor currents, the input power as well as output power during the step-up operation is written as

$${\mathrm{P}}_{\mathrm{i}\mathrm{n}}={\mathrm{U}}_{\mathrm{i}\mathrm{n}}({\mathrm{I}}_{{\mathrm{L}}_1}+{\mathrm{I}}_{{\mathrm{L}}_2})=\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{U}}_0}{{(1-\mathrm{D})}^2{\mathrm{R}}_0}$$

(52)

$${\mathrm{P}}_0=\frac{{\mathrm{U}}_0{}^2}{{\mathrm{R}}_0}$$

(53)

The powers accompanying under step-down operation are

$${\mathrm{P}}_{\mathrm{i}\mathrm{n}}=\mathrm{D}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}{\mathrm{I}}_{{\mathrm{L}}_1}=\frac{{\mathrm{D}}^2{\mathrm{U}}_0{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{R}}_0}$$

(54)

$${\mathrm{P}}_0=\frac{{\mathrm{U}}_0{}^2}{{\mathrm{R}}_0}$$

(55)

The equivalent circuit of the proposed topology is shown in Figure 10, which include the conduction losses of the components and offset voltages of diodes while capacitors are assumed to be ideal. The current flow path under CCM for each mode of the equivalent circuit is identical to the main circuit.

From the equivalent circuit diagram of proposed work, the inductor voltages under the status of step-up can be seen as

$${\mathrm{U}}_{\mathrm{L}1}=\left\{\begin{array}{ll}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{i}}_{{}_{\mathrm{L}1}}\left({\mathrm{r}}_{{}_{\mathrm{L}1}}+{\mathrm{r}}_{{}_{\mathrm{S}1}}+{\mathrm{r}}_{{}_{\mathrm{S}2}}\right)+{\mathrm{i}}_{{}_{\mathrm{L}2}}{\mathrm{r}}_{{}_{\mathrm{S}2}},& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\\ {\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{F}4}+{\mathrm{i}}_{\mathrm{L}1}\left({\mathrm{r}}_{{}_{\mathrm{L}1}}+{\mathrm{R}}_{{}_{\mathrm{S}4}}\right)-{\mathrm{U}}_0,& \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{s}}\end{array}\right.$$

(56)

$${\mathrm{U}}_{\mathrm{L}2}=\left\{\begin{array}{ll}{\mathrm{U}}_{{}_{\mathrm{i}\mathrm{n}}}+{\mathrm{i}}_{{}_{\mathrm{L}2}}\left({\mathrm{r}}_{{}_{\mathrm{L}2}}+{\mathrm{r}}_{{}_{\mathrm{S}2}}\right)+{\mathrm{i}}_{{}_{\mathrm{L}1}}{\mathrm{r}}_{{}_{\mathrm{S}2}},& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\\ {\mathrm{U}}_{{}_{\mathrm{i}\mathrm{n}}}-{\mathrm{U}}_{{}_{\mathrm{C}\mathrm{a}\mathrm{p}}}+{\mathrm{i}}_{{}_{\mathrm{L}2}}\left({\mathrm{r}}_{{}_{\mathrm{L}2}}+{\mathrm{R}}_{{}_{\mathrm{S}3}}\right)+{\mathrm{U}}_{{}_{\mathrm{F}3}},& \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{s}}\end{array}\right.$$

(57)

Similarly, the inductor voltages during the status of step-down can be seen as

$${\mathrm{U}}_{\mathrm{L}1}=\left\{\begin{array}{ll}{\mathrm{U}}_{{}_{\mathrm{i}\mathrm{n}}}-{\mathrm{U}}_{{}_0}+{\mathrm{i}}_{{}_{\mathrm{L}1}}\left({\mathrm{r}}_{{}_{\mathrm{L}1}}+{\mathrm{r}}_{{}_{\mathrm{S}4}}\right),& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\\ -{\mathrm{U}}_{{}_0}-{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{i}}_{\mathrm{L}1}\left({\mathrm{r}}_{\mathrm{L}1}+{\mathrm{R}}_{{}_{\mathrm{S}1}}+{\mathrm{R}}_{{}_{\mathrm{S}2}}\right)+{\mathrm{i}}_{{}_{\mathrm{L}2}}{\mathrm{R}}_{{}_{\mathrm{S}2}}+{\mathrm{U}}_{{}_{\mathrm{F}1}}+{\mathrm{U}}_{{}_{\mathrm{F}2}},& \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{s}}\end{array}\right.$$

(58)

$${\mathrm{U}}_{\mathrm{L}2}=\left\{\begin{array}{ll}{\mathrm{U}}_{{}_{\mathrm{C}\mathrm{a}\mathrm{p}}}-{\mathrm{U}}_{{}_0}+{\mathrm{i}}_{{}_{\mathrm{L}2}}\left({\mathrm{r}}_{{}_{\mathrm{L}2}}+{\mathrm{r}}_{{}_{\mathrm{S}3}}\right),& 0\le \mathrm{t}\le \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\\ -{\mathrm{U}}_{{}_0}+{\mathrm{i}}_{{}_{\mathrm{L}2}}\left({\mathrm{r}}_{{}_{\mathrm{L}2}}+{\mathrm{R}}_{{}_{\mathrm{S}2}}\right)+{\mathrm{i}}_{{}_{\mathrm{L}1}}{\mathrm{R}}_{{}_{\mathrm{S}2}}+{\mathrm{U}}_{{}_{\mathrm{F}2}},& \mathrm{D}{\mathrm{T}}_{\mathrm{s}}\le \mathrm{t}\le {\mathrm{T}}_{\mathrm{s}}\end{array}\right.$$

(59)

where r_s is the drain-source resistance of the power switches, and R_s is the on-state resistance of the body diode of the switches.

Based on [34], the proposed topology under step-up mode, the switching losses on the MOSFET switches can be written as follows:

$${\mathrm{P}}_{\mathrm{S}\mathrm{W}1}={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}1}{\mathrm{U}}_0{}^2={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}1}{\mathrm{R}}_0{\mathrm{P}}_0$$

(60)

$${\mathrm{P}}_{\mathrm{S}\mathrm{W}2}={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}2}{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}{}^2={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}2}{(1-\mathrm{D})}^2{\mathrm{R}}_0{\mathrm{P}}_0$$

(61)

Ferrite core types of inductors are used in which the measurement of core loss [34] needs some arrangements for evaluating flux density comprise the estimation of hysteresis B-H curve or loop areas. From the data sheet of the ferrite core, the curves related to B-H loop support to estimate the inductor core loss. Such B-H curve points to power loss density in terms of mW/cm³, which is a function of switching frequency, fsw, and a peak-to-peak flux density ∆B. The voltage across the inductor based on Faraday’s law can be expressed as

$${\mathrm{U}}_{\mathrm{L}}(\mathrm{t})=\mathrm{N}{\mathrm{A}}_{\mathrm{c}}\frac{\mathrm{d}\mathrm{B}(\mathrm{t})}{\mathrm{d}\mathrm{t}}$$

(62)

Hence, in an inductor of a DC–DC converter, the peak flux density ∆B can be attained as

$$\Delta \mathrm{B}=\left(\frac{{\mathrm{U}}_{\mathrm{L}}}{\mathrm{N}{\mathrm{A}}_{\mathrm{c}}}\right)(\mathrm{D}{\mathrm{T}}_{\mathrm{s}})$$

(63)

where U_L is the inductor voltage during the power switch is ON (DT_S), N is the number of turns around the inductor core, and A_C is the core area of an inductor. Therefore, the core loss can be attained as

$${\mathrm{p}}_{\mathrm{f}\mathrm{e}}=({\mathrm{A}}_{\mathrm{c}}{\ell }_{\mathrm{m}\mathrm{a}\mathrm{g}})(\mathrm{c}\mathrm{o}\mathrm{r}\mathrm{e} \mathrm{l}\mathrm{o}\mathrm{s}\mathrm{s} \mathrm{d}\mathrm{e}\mathrm{n}\mathrm{s}\mathrm{i}\mathrm{t}\mathrm{y})$$

(64)

where ℓ_mag is the magnetic path length of the core. By using (63), for the inductors L₁ and L₂, its core loss density (∆B) can be written as

$$\Delta {\mathrm{B}}_1=\left(\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}{{\mathrm{N}}_1{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)(\mathrm{D})=\frac{\mathrm{D}(1-\mathrm{D})(2-\mathrm{D})}{{\mathrm{N}}_1{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}{\mathrm{U}}_0$$

(65)

$$\Delta {\mathrm{B}}_2=\left(\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{N}}_2{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)(\mathrm{D})=\frac{\mathrm{D}{(1-\mathrm{D})}^2}{{\mathrm{N}}_2{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}{\mathrm{U}}_0$$

(66)

Applying the voltage-second (V-S) balance technique on the inductor voltages, by using Equations (56) and (57), and the inductor current Equations in (11) and (12), and also considering the various losses using Equations (63) and (64), the efficiency of the presented work under step-up operation can be derived as

$$\mathsf{\eta }=\frac{{\mathrm{P}}_0}{{\mathrm{P}}_{\mathrm{i}\mathrm{n}}}=\frac{{\mathrm{R}}_0}{\frac{{\mathrm{W}}_1}{{\left(1-\mathrm{D}\right)}^4}+{\mathrm{W}}_2{\mathrm{R}}_0+{\mathrm{W}}_3{\mathrm{R}}_0{}^2}$$

(67)

where

$${\mathrm{W}}_1={\mathrm{D}}^3({\mathrm{r}}_{\mathrm{S}1}-{\mathrm{R}}_{\mathrm{S}3}-{\mathrm{R}}_{\mathrm{S}4})+{\mathrm{D}}^2({\mathrm{r}}_{\mathrm{L}1}+{\mathrm{r}}_{\mathrm{L}2}+{\mathrm{R}}_{\mathrm{S}3}-2{\mathrm{r}}_{\mathrm{S}1}+3{\mathrm{R}}_{\mathrm{S}4})+\mathrm{D}({\mathrm{r}}_{\mathrm{S}1}+{\mathrm{r}}_{\mathrm{S}2}-2{\mathrm{r}}_{\mathrm{L}1}-3{\mathrm{R}}_{\mathrm{S}4})+{\mathrm{r}}_{\mathrm{L}2}+{\mathrm{R}}_{\mathrm{S}4}$$

$${\mathrm{W}}_2=1+\frac{{\mathrm{U}}_{\mathrm{F}4}}{{\mathrm{U}}_0}+\frac{\mathrm{D}{\mathrm{U}}_{\mathrm{F}3}}{(1-\mathrm{D}){\mathrm{U}}_0}$$

$${\mathrm{W}}_3=({(1-\mathrm{D})}^2{\mathrm{C}}_{\mathrm{S}2}+{\mathrm{C}}_{\mathrm{S}1}){\mathrm{f}}_{\mathrm{s}\mathrm{w}}+\frac{{\mathrm{P}}_{\mathrm{C}\mathrm{o}\mathrm{r}\mathrm{e}-\mathrm{l}\mathrm{o}\mathrm{s}\mathrm{s}{\mathrm{L}}_1}+{\mathrm{P}}_{\mathrm{C}\mathrm{o}\mathrm{r}\mathrm{e}-\mathrm{l}\mathrm{o}\mathrm{s}\mathrm{s}{\mathrm{L}}_2}}{{\mathrm{U}}_0{}^2}$$

Similarly, from [34], the proposed topology under step-down mode, the switching losses on the MOSFET switches can be expressed as follows:

$${\mathrm{P}}_{\mathrm{S}\mathrm{W}3}={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}3}{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}{}^2={\left(\frac{1}{\mathrm{D}}\right)}^2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}3}{\mathrm{R}}_0{\mathrm{P}}_0$$

(68)

$${\mathrm{P}}_{\mathrm{S}\mathrm{W}4}={\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}4}{({\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}+{\mathrm{U}}_{\mathrm{i}\mathrm{n}})}^2={\left(\frac{\mathrm{D}+1}{{\mathrm{D}}^2}\right)}^2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}{\mathrm{C}}_{\mathrm{S}4}{\mathrm{R}}_0{\mathrm{P}}_0$$

(69)

In addition, the core-loss density (∆B) under step-down mode for the inductors L₁ and L₂ can be obtained as

$$\Delta {\mathrm{B}}_1=\left(\frac{{\mathrm{U}}_0+{\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}{{\mathrm{N}}_1{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)(\mathrm{D})=\frac{(1+\mathrm{D})}{{\mathrm{N}}_1{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}{\mathrm{U}}_0$$

(70)

$$\Delta {\mathrm{B}}_2=\left(\frac{{\mathrm{U}}_0}{{\mathrm{N}}_2{\mathrm{A}}_{\mathrm{c}}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)(\mathrm{D})$$

(71)

For the same specifications of input and output voltages (U_H, U_L), switching frequency (f_sw) and output power (P₀) of the presented converter, the core loss on the inductors under step-up and step-down modes are identical.

Applying voltage-second (V-S) balance technique on the inductor voltages, by using Equations (58) and (59), and the inductor current Equations in (27) and (28), and also considering the various losses using Equations (63) and (64), the efficiency of the presented work under step-down operation can be derived as

$$\mathsf{\eta }=\frac{{\mathrm{P}}_0}{{\mathrm{P}}_{\mathrm{i}\mathrm{n}}}=\frac{{\mathrm{R}}_0}{{\mathrm{W}}_1+{\mathrm{W}}_2{\mathrm{R}}_0+{\mathrm{W}}_3{\mathrm{R}}_0{}^2}$$

(72)

where

$${\mathrm{W}}_1={\mathrm{D}}^3({\mathrm{r}}_{\mathrm{S}3}+{\mathrm{r}}_{\mathrm{S}4}-{\mathrm{R}}_{\mathrm{S}1})+{\mathrm{D}}^2({\mathrm{r}}_{\mathrm{L}1}+{\mathrm{r}}_{\mathrm{L}2}+{\mathrm{R}}_{\mathrm{S}1}-2{\mathrm{r}}_{\mathrm{S}3})+\mathrm{D}({\mathrm{r}}_{\mathrm{S}3}-2{\mathrm{r}}_{\mathrm{L}1}-{\mathrm{R}}_{\mathrm{S}2})+{\mathrm{r}}_{\mathrm{L}1}+{\mathrm{R}}_{\mathrm{S}2}$$

$${\mathrm{W}}_2=1+\frac{(1-\mathrm{D}){\mathrm{U}}_{\mathrm{F}1}}{{\mathrm{U}}_0}+\frac{\mathrm{D}(1-\mathrm{D}){\mathrm{U}}_{\mathrm{F}3}}{{\mathrm{U}}_0}$$

$${\mathrm{W}}_3={\left(\frac{1}{\mathrm{D}}\right)}^2\left({\mathrm{C}}_{\mathrm{S}3}+{\left(\frac{\mathrm{D}+1}{\mathrm{D}}\right)}^2{\mathrm{C}}_{\mathrm{S}4}\right){\mathrm{f}}_{\mathrm{s}\mathrm{w}}+\frac{{\mathrm{P}}_{\mathrm{C}\mathrm{o}\mathrm{r}\mathrm{e}-\mathrm{l}\mathrm{o}\mathrm{s}\mathrm{s}{\mathrm{L}}_1}+{\mathrm{P}}_{\mathrm{C}\mathrm{o}\mathrm{r}\mathrm{e}-\mathrm{l}\mathrm{o}\mathrm{s}\mathrm{s}{\mathrm{L}}_2}}{{\mathrm{U}}_0{}^2}$$

Consider a voltage value of 180 V as output for the step-up and input for the step-down operations. Three cases of different gain values are to be discussed for both directions of the bidirectional DC–DC converters. In general, Gain _step-down = 1/ Gain _step-up

Case A: 12 V to 180 V; (Gain _step-up = 15)

Case B: 18 V to 180 V; (Gain _step-up = 10)

Case C: 24 V to 180 V; (Gain _step-up = 7.5)

Comparisons of the efficiencies under different power ratings and gain values for the proposed topology with the converter in [23] and the cascaded type under step-up and step-down operations have been carried out for three different cases. For all of the above-mentioned three cases, the parameters of converters are considered while comparisons of the proposed work with the cascaded type are as follows:

r_S2 = r_S3 = 55 mΩ, r_S1 = r_S4 = 0.27 Ω; R_S1 = R_S2 = R_S3 = R_S4 = 0.1 Ω; L₁ = 200 µH, L₂ = 15 µH, r_L1 = r_L2 = 0.1 Ω; f_Sw = 30 kHz, where r_S and R_s are the drain to source resistance of the power switches and ON-state resistances of their body diodes and all the forward voltage drops U_F of the switches are equal to 1 Volt.

By considering these three cases of voltage levels mentioned above, under various power ratings, using Equations (67) and (72), the calculated efficiency versus power for the proposed circuit along with the cascaded type, and the converter in [23], are shown in Figure 11a for step-up operation and Figure 11b for step-down operation. It is evident that the proposed converter with large duty cycles has higher efficiency under various power ratings particularly when compared with the cascaded type and also with the converter in [23].

The voltage gain of the proposed type purely depends on the duty cycles, the efficiency with the different values of duty cycles for two different power ratings are shown in Figure 12a for step-up operation and Figure 12b for step-down operation.

4. Simulation Study

The operation of presented circuit and its performance calculation was obtained using the MATLAB/Simulink package software, and its relevant results were discussed. The parameters as well as specifications relevant to the simulation work are as follows: for the step-up operation, the input voltage (U_in) of the converter = 12 V, and the output voltage (U₀) of the converter = 180 V, power associated in the converter = 200 W, maximum duty cycle for step-up mode, δ = 0.742 and switching frequency, f_sw = 30 kHz. The inductor values were L₁ = 200 µH and L₂ = 15 µH receptivity. The capacitors were C = C₀ = 220 μF. Figure 13 shows simulation results for the step-up operation of the proposed converter operating at switching frequency of 30 kHz and for a duty ratio of 74.2%, and the results perfectly match the theoretical values.

From Figure 13a,b, when the duty ratio of the converter was kept at 0.742 for the applied voltage of 12 V, the converter provided a voltage of 176.8 V (14.733 times greater than the applied voltage) at the output terminals. During the operation of converter under CCM, the current in the inductor 1, I_L1 was saturated within the band range of 1 to 7.5 A, while the current in the inductor 2, I_L2 was saturated within the band range of 4 to 20 A and maintained continuously the input current of the converter shown in Figure 13c. Figure 13e,f show the inductor current waveforms, with I_L1 and I_L2 obtained from simulation. From these waveforms, it is identified that both the inductors L₁ and L₂ were uniformly charging and delivering the current continuously during conduction. From the simulation waveforms of the inductor currents, it can be inferred that the presented topology maintains the current in a continuous manner. Figure 13d represents the output current waveform which has the value of approximately 0.995 A.

Figure 13g,h shows inductor voltages, U_L1 and U_L2, and Figure 13m–p displays voltage across the power switches, U_S1 to U_S4, respectively. From these waveforms, it could be inferred that, during the operating period, the switches (MOSFET) followed their voltage in a maximum allowable range of 200 V and 500 V. Figure 13i,l shows the switch current waveforms I_S1 to I_S4. From these waveforms, it is shown that the switch currents, I_S1 and I_S4, are equal to the inductor current I_L1, while I_S3 is equal to the inductor current I_L2, the switch current I_S2 is the sum of the two inductor currents, I_L1 and I_L2. From Figure 13q, the capacitor voltage results in the square root of the product of the input and output voltages. Figure 13r represents the waveform for the output capacitor voltage.

Similarly, for the step-down operation, the voltage input (U_in) of the converter = 180 V, and the voltage output (U₀) of the converter = 12 V, power associated in the converter = 200 W, maximum duty cycle for step-down mode, δ = 0.258 and operating at switching frequency f_sw = 30 kHz. The inductor values were L₁ = 200 µH and L₂ = 15 µH receptivity. The capacitors were C = C₀ = 220 μF. Figure 14 shows simulation results for the step-down operation of the proposed converter operating at a switching frequency of 30 kHz and duty ratio of 25.8%; the results verified the theoretical values. From Figure 14a,b, when the duty ratio of the converter was kept at 0.258 for the applied voltage of 180 V, the converter provided a voltage of 11.88 V (0.066 times smaller than the applied voltage) at the output terminals. During the operation of converter under CCM, the current in the inductor 1, I_L1 was saturated within the band range of 1 to 7.5 A, while the current in the inductor 2, I_L2 was saturated within the band range of 4 to 20 A and maintained continuously the input current of the converter shown in Figure 14c.

Figure 14e,f shows the inductor current waveforms, and I_L1 and I_L2 were obtained from simulation. From these waveforms, it is identified that both of the inductors L₁ and L₂ were uniformly charging for the mentioned duty period of 25.8% and delivering the current continuously during conduction. From the simulation waveforms of the inductor currents, it can be inferred that the presented topology maintains the current in continuous manner. Figure 14d represents the output current waveform which has the value of approximately 16.1 A. Figure 14g,h shows inductor voltages, U_L1 and U_L2, and Figure 14m–p displays voltage across the power switches, U_S1 to U_S4 respectively. From these waveforms, it could be inferred that, during the operating period, the switches (MOSFET) had their voltage in a maximum allowable range of 200 V and 500 V.

Figure 14i–l shows the switch current waveforms I_S1 to I_S4; from these waveforms, it is shown that the switch currents, I_S1 and I_S4, are equal to the inductor current I_L1, while I_S3 is equal to the inductor current I_L2, and the switch current I_S2 is the sum of the two inductor currents, I_L1 and I_L2. From Figure 14q, the capacitor voltage results in the square root of the product of the input and output voltages. Figure 14r represents the waveform for the output capacitor voltage.

From Figure 13m–p and Figure 14m–p, the voltage stress U_S1 is nearly equal to 176.8 V across the switch S₁. In addition, voltage stresses U_S2 and U_S3 are nearly equal to 46.4 V across the switches S₂ and S₃. Then, the voltage stress U_S4 is nearly equal to 223.2 V across the switch S₄. Similarly, the voltages across the inductors for the various statuses under boost and buck operations are equal. Considering the simulations waveforms of current shown in Figure 13g–j and in Figure 14g–j, from the switch currents, i_s1 and i_s4, it can be identified that its stresses are same, its values are i_s1peak = i_s4peak = 4.3 A. In addition, from the waveforms of the switch currents i_s2 and i_s3, the current stresses are the values as i_s2peak = 16.28 A and i_s3peak = 11.94 A, respectively.

From the above simulation waveforms of the proposed work, the simulation results agree well with the theoretical values.

5. Experimental Verifications

In order to validate the theoretical and simulation results, a 12 V/180 V, 200 Watts prototype model of the presented bidirectional converter has been designed, implemented as well as examined to validate its performance. The experimental set-up for the presented topology is illustrated in Figure 15. The hardware model of the presented topology is implemented by using a dsPIC30F microcontroller operating at a clock frequency of 30 MHz, which corresponds to a time period of 33.33 ns. Switching frequency of the converter is selected as 30 KHz, and appropriate numbers of clock signals are generated for each time interval. IRFP460 and IRFP260 were used for MOSFET switches S₁, S₄ and for S₂, S₃.

For the prototype model of the converter, the experimental relevant parameters are given in

Table 1. Experimental parameters.

Specifications	Values
Low voltage side, UL	12 V
D, Duty cycle (step-up) D, Duty cycle (step-down)	0.742 0.258
High Voltage side, UH	180 V
Switching frequency, fsw	30 KHz
Inductor, L1	200 µH
Inductor, L2	15 µH
Cap, C0	220 µF
Switches S2, S3	IRFP260; RDS(on) = 55 mΩ
Switches S1, S4	IRFP460; RDS(on) = 0.27 Ω
Output Power step-up, step-down	200 Watts

.

The maximum rate of energy stored in capacitor in step-down operation for every cycle T_s is

$$\Delta \mathrm{Q}=\frac{\left(\frac{\Delta {\mathrm{i}}_{{\mathrm{L}}_1\mathrm{m}\mathrm{a}\mathrm{x}}+\Delta {\mathrm{i}}_{{\mathrm{L}}_2\mathrm{m}\mathrm{a}\mathrm{x}}}{2}\right)\left(\frac{{\mathrm{T}}_{\mathrm{s}}}{2}\right)}{2}=\left(\frac{\Delta {\mathrm{i}}_{{\mathrm{L}}_1\mathrm{m}\mathrm{a}\mathrm{x}}+\Delta {\mathrm{i}}_{{\mathrm{L}}_2\mathrm{m}\mathrm{a}\mathrm{x}}}{8{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right)$$

(73)

$$\Delta \mathrm{Q}=\frac{\mathrm{D}(1-\mathrm{D}){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{8{\mathrm{C}}_0{\mathrm{f}}_{\mathrm{s}\mathrm{w}}{}^2}\left(\frac{\mathrm{D}}{{\mathrm{L}}_1}+\frac{1+\mathrm{D}}{{\mathrm{L}}_2}\right)$$

(74)

From (29) and (30), the minimum value of the output capacitance (C₀) under step-down mode is derived as

$${\mathrm{C}}_0={\mathrm{C}}_{\mathrm{L}}=\frac{\mathrm{D}(1-\mathrm{D}){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{8\Delta {\mathrm{U}}_{\mathrm{C}0}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}{}^2}\left(\frac{1+\mathrm{D}}{{\mathrm{L}}_1}+\frac{\mathrm{D}}{{\mathrm{L}}_2}\right)$$

(75)

The peak voltage across the equivalent series resistance (ESR) of the output capacitor under step-down mode can be expressed as

$$\Delta {\mathrm{U}}_{\mathrm{C}0}{}^{\mathrm{E}\mathrm{S}\mathrm{R}}=\Delta {\mathrm{i}}_{\mathrm{C}0}{\mathrm{r}}_{\mathrm{C}0}=\left(\Delta {\mathrm{i}}_{\mathrm{L}1}+\Delta {\mathrm{i}}_{\mathrm{L}2}\right){\mathrm{r}}_{\mathrm{C}0}$$

(76)

$$\Delta {\mathrm{U}}_{\mathrm{C}0}{}^{\mathrm{E}\mathrm{S}\mathrm{R}}=\frac{(1-\mathrm{D}){\mathrm{U}}_0}{\mathrm{D}{\mathrm{f}}_{\mathrm{s}}}\left(\frac{1+\mathrm{D}}{{\mathrm{L}}_1}+\frac{\mathrm{D}}{{\mathrm{L}}_2}\right){\mathrm{r}}_{\mathrm{C}0}$$

(77)

While considering a certain ripple value, the capacitor C₀ size is calculated by (72). After knowing the ESR of the selected capacitor, the voltage–ripple is determined as ∆U_C0^ESR + ∆U_C0, to be patterned to be smaller than the desired value of the voltage–ripple. Hence, the sizes of capacitors C₀ in the step-up mode and Cap are expressed as

$${\mathrm{C}}_0\ge \frac{\mathrm{D}{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{R}}_0\Delta {\mathrm{U}}_{\mathrm{C}0}{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}$$

(78)

$$\mathrm{C}\mathrm{a}\mathrm{p}\ge \frac{1}{\Delta {\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}}\left(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\right)\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\frac{{\mathrm{P}}_0}{{\mathrm{V}}_{\mathrm{i}\mathrm{n}}}$$

(79)

As per the capacitor value C₀ for the step-down mode described, then, after choosing the capacitor Cap and C₀ for the step-up mode, its ESR values can be found. Hence, the voltage drop and its ESR values for Cap and C₀ under step-up operation can be derived as

$$\Delta {\mathrm{U}}_{\mathrm{C}0}{}^{\mathrm{E}\mathrm{S}\mathrm{R}}={\mathrm{U}}_0\left[\frac{1}{(1-\mathrm{D}){\mathrm{R}}_0}+\frac{\mathrm{D}(1-\mathrm{D})(2-\mathrm{D})}{2{\mathrm{L}}_1{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\right]{\mathrm{r}}_{\mathrm{C}0}$$

(80)

$$\Delta {\mathrm{U}}_{\mathrm{C}\mathrm{a}\mathrm{p}}{}^{\mathrm{E}\mathrm{S}\mathrm{R}}=\left[\frac{{\mathrm{P}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}+\frac{\left(1-\sqrt{\frac{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{{\mathrm{U}}_0}}\right){\mathrm{U}}_{\mathrm{i}\mathrm{n}}}{2{\mathrm{f}}_{\mathrm{s}\mathrm{w}}}\left(\frac{1}{{\mathrm{L}}_1}+\frac{1+\sqrt{\frac{{\mathrm{U}}_0}{{\mathrm{U}}_{\mathrm{i}\mathrm{n}}}}}{{\mathrm{L}}_2}\right)\right]{\mathrm{r}}_{\mathrm{C}\mathrm{a}\mathrm{p}}$$

(81)

Conferring to the above-mentioned Equations, to provide the capacitor voltage ripple to be less than 5%, its values are chosen to be large and adequate.

During the step-up operation of the proposed topology, consider the input voltage side; that is, the low voltage and the output load resistor are U_in = 12 V and R₀ = 162 Ω, respectively. In order to drive the proposed topology under CCM, the inductance values of L₁ and L₂ for the duty cycle, D = 0.742, switching frequency, f_sw = 30 kHz and the output resistor, R₀ = 162 Ω can be obtained as L₁ ≥ 168 µH and L₂ ≥ 12 µH. Hence, the values of the two inductors are chosen as 200 µH and 15 µH, respectively. These inductor values are common for both boost and buck operations. The experimental results illustrated in Figure 16 are for step-up operation. According to Equation (7), for the given parameters in Table 1, the output voltage is attained as U₀ = 180 V. From Figure 16d, the output voltage is nearly equal to 176.6 V, similar to the value obtained from the theoretical analysis.

Considering the waveforms from Figure 16b, it can be shown that, across each of the switches, its voltage stress is similar to the simulated values. In addition, for the inductors, its voltages are determined by considering Equations (1)–(4), for an inductor1, U_L1 is equal to 58 V for mode I and −165.6 V for mode II. Similarly, for inductor 2, U_L2 is equal to 12 V for mode I and −34.1 V for mode II. From Figure 16a, it can be observed that the voltages across the inductors are similar to the theoretical values.

For the step-up operation, switches S₁ and S₂ act as control switches and S₃ and S₄ are synchronous rectifiers. Figure 16c shows the switch current waveforms for S₁ to S₄, which are similar to the simulation values. In addition, for the inductor currents, it can be seen that the values of L₁ and L₂ are found as 4.34 A and 11.94 A shown in Figure 16a, which shows that its values are almost equal to the simulated values. In addition, for the power circuit for step-up operation shown in Figure 3a, the input current is divided by the two inductors, and its value is also verified by Figure 16a. In addition, the output current based on the load value of 162 Ω can be determined as I₀ = U₀/R₀, which is equal to 1.11 A, can be obtained as very close to the value of 1.08 A shown in Figure 16d. Thus, the theoretical results and the prototype results are validated for the step-up operation.

In the step-down operation, consider the input voltage side, where the high voltage and the output load resistor for a 200 watts output power are kept as U_in = 180 Vand R₀ = 0.72 Ω for a duty cycle, D = 0.258, respectively. For the step-down operation, its experimental waveforms are illustrated in Figure 17. The output voltage based on the parameters in step-down operation is obtained from the simulation results as 11.88 V and experimentally as 11.86 V, shown in Figure 17 d. The voltage stress across each switch in buck and boost operations has similar values, shown in Figure 16b and Figure 17b. In addition, the voltage across the inductor 1, U_L1 is equal to 168.4 V for mode I and −57.96 V for mode II. Then, for an inductor L₂, U_L2 is equal to 34.24 V for mode I and −11.86 V for mode II, which are vice versa as per the step-up mode. From Figure 17d, it can be observed that the voltages across the inductors are similar to the simulation and theoretical values.

During the step-down operation, switches S₃ and S₄ perform as switches and likewise S₁ and S₂ are synchronous rectifiers. By considering the switch current waveforms of is₁ and is₄ shown in Figure 14g–j, the current stresses for the switches S₁ and S₄ are equal in magnitude, and its values are equal, which are as i_s1peak = i_s4peak = 4.32 A. In addition, the current stresses for the switches S₂ and S₃ are its values approximately are as i_s2peak = 16.26 A and i_s3peak = 11.94 A.

Figure 17c shows the current waveforms for all the switches, which are nearly equal to the simulation waveforms and also its values are almost identical. In addition, for the inductor currents, by considering Equations (34) and (36) and from the simulation waveforms, it can be seen that the values of L₁ and L₂ are found as 4.34 A and 11.94 A, which show that its values are almost equal as shown in Figure 17a. In addition, for the power circuit for step-down operation shown in Figure 6a, the average value of the output current in the step-down operation is the addition of the two inductor currents. Based on the 200 watts output power rating, its load resistance is 0.72 Ω, and the output current can be determined as I₀ = U₀/R₀, equal to 16.64 A, which can be obtained very close to the value as 16.56 A shown in Figure 17d. For the step-down operation, the theoretical value that has been obtained as depicted in Figure 7 is verified from the results experimentally as shown in Figure 17.

When comparing the switch currents of the proposed type, its average values of the switch currents in S₁, S₃, S₄ are lower, while the current in the switch S₂ is high; this has as an advantage during step-down operation of the proposed type, due to the switch S₂ being used as a synchronous rectifier. When the drain to source resistance of the power switch S₂ is less than the on-state resistance of the body diode, synchronous rectification can be applied, where the efficiency plays a vital role. At the same time, if the synchronous rectification is applied to the switches S₁, S₃, S₄, its efficiency is sufficiently less because of its drain to source resistance and also its less current values. Thus, the step-down operation has an advantage in this proposed type because of synchronous rectification for the switch S₂ to attain higher value of efficiency under the power rating of 200 W.

Experimental results from the prototype model under the operations in step-up and step-down are depicted in Figure 16; Figure 17. The inductor currents I_L1 and I_L2 are about 4.34 A and 11.94 A verified, respectively, in both modes of operation under step-up and step-down. It is evident that the duty cycle of the proposed type indeed contributed to the increase in efficiency.

In order to validate the gain values with different duty cycles in terms of theoretical and experimental values of the proposed topology under continuous conduction mode, a curve between voltage gain output with duty cycle in the range of 0.05 to 0.75 were drawn for both step-up and step-down operations which are predicted in Figure 18a,b. From these curves, it can be identified that the experimental gain values are very close to the theoretical values.

Figure 19a,b shows the loss distribution of the experimented converter under rated load condition for the duty cycle of D = 0.742 under step-up and D = 0.258 under step-down operations. The switching losses as well as the conduction losses across the power switches are about 65% of the total losses. The total losses of the experimented converter under step-up mode are nearly equal to the value of 16.4 watts, among which 10.82 watts are due to the switching and conduction losses in the power switches, 3.94 watts are due to the losses in the inductors, and the remaining losses are due to capacitors and the other losses, which are shown in Figure 19a. Due to the synchronous rectification, the total losses in the step-down mode are about 12.38 watts. Out of these losses, 7.92 watts are due to the power switches and the remaining losses are due to the inductors, capacitors, and other losses which are predicted in Figure 19b.

By considering with and without synchronous rectification method in the proposed work, the comparisons of the calculated and measured efficiencies under various different power ratings for both step-up and step-down operations are represented in Figure 20.

The efficiency value under step-up operation is measured as 94.1% when compared to its calculated value of 97.1% because of the switch S₂ working as the control switch, and its current stress is the summation of the two inductor currents, which is high; there are more switching losses, and the efficiency becomes 94.1%. During step-down operation, it is measured as 95.1% when compared to its calculated value of 95.5% because switch S₂ is working as a synchronous rectifier; hence, the switching losses becomes lower and improves the efficiency during step-down operation. Hence, synchronous rectification can be used in the step-down operation particularly for the battery charging applications of low output voltage with high current.

From this, it should be clear that the proposed work not only attained a larger gain value, but its efficiency is also better when compared to the other bidirectional types under consideration. Some of the converters discussed achieve high efficiency, but it has a low amount of gain, while its gain is increased, which degrades its efficiency. Therefore, its input powers for the proposed work under both the operations of step-up and step-down are about 200 W. In the operation of step-down, the output power is measured from the current and voltage values as 184 W, whose efficiency is 94.1% for step-up and 95.1% for step-down operations. Thus, the proposed type gives a better efficiency with large voltage-gain value particularly when compared to the converters discussed.

Performance comparisons of various existing bidirectional type of converters discussed along with the proposed topology based on rated load condition are shown in

Table 2. Performance comparisons of the proposed work with existing bidirectional types.

Comparison with Existing Converter Topology	Converter in [22]	Converter in [23]	Converter in [24]	Converter in [25]	Converter in [28]	Proposed Converter
Number of Switches Used	3	4	4	4	2	4
Number of Inductors Used	1 *	1	1	1	1 *	2
Number of Capacitors Used	1	2	1	1	2	2
Voltage gain (Step-up)	$\frac{(1+\mathrm{D})}{(1-\mathrm{D})}$	$\frac{2}{(1-\mathrm{D})}$	$\frac{1}{1-\left({\mathrm{D}}_2+{\mathrm{D}}_3\right)}$	$\frac{1}{1-\left({\mathrm{D}}_2+{\mathrm{D}}_4\right)}$	$\frac{(1+\mathrm{N}\mathrm{D})}{(1-\mathrm{D})}$	$\frac{1}{{(1-\mathrm{D})}^2}$
Voltage gain (Step-down)	$\frac{\mathrm{D}}{(2-\mathrm{D})}$	$\frac{\mathrm{D}}{2}$	$\frac{1}{1-\left({\mathrm{D}}_2+{\mathrm{D}}_4\right)}$	$\left({\mathrm{D}}_1+{\mathrm{D}}_3\right)-1$	$\frac{\mathrm{D}}{1+\mathrm{N}(1-\mathrm{D})}$	D2
Maximum Voltage stress (V)	${\mathrm{U}}_{\mathrm{H}}+{\mathrm{U}}_{\mathrm{L}}$	$\frac{{\mathrm{U}}_{\mathrm{H}}}{2}$	${\mathrm{U}}_{\mathrm{H}}$	${\mathrm{U}}_{\mathrm{H}}$	${\mathrm{U}}_{\mathrm{H}}+\mathrm{N}{\mathrm{U}}_{\mathrm{L}}$	${\mathrm{U}}_{\mathrm{H}}+\sqrt{{\mathrm{U}}_{\mathrm{H}}{\mathrm{U}}_{\mathrm{L}}}$
Maximum Current Stress (A)	$\frac{{\mathrm{I}}_0}{\left(2-\mathrm{D}\right)}$	$\frac{2{\mathrm{I}}_0}{\left(1-\mathrm{D}\right)}$	$\frac{{\mathrm{I}}_0}{1-\left({\mathrm{D}}_2+{\mathrm{D}}_3\right)}$	$\frac{{\mathrm{I}}_0}{1-\left({\mathrm{D}}_2+{\mathrm{D}}_4\right)}$	$\frac{{\mathrm{I}}_0}{1+\mathrm{N}(1-\mathrm{D})}$	$\frac{{\mathrm{I}}_0}{{(1-\mathrm{D})}^2}$
Efficiency (Step-up)	92.7	91.2	93.6	93.5	91.7	94.1
Efficiency (Step-down)	93.7	92.3	94.1	94.7	93.2	95.1
Power rating (W)	200	200	150	300	60	200
Voltage conversion range	14 V/42 V	24 V/200 V	15 V/150 V	24 V/200 V	12 V/100 V	12 V/180 V

Annotate—* Coupled inductor; N—turns ratio.

.

From Table 2, when compared to various existing converters particularly in [22,28], coupled inductors are used, which are difficult to design by considering the effect of coefficient of coupling factor. In addition, for the existing converters in [23,24,25], a single inductor is used which is suitable for the conversion of specified gain values. Beyond that, the size of the inductor becomes bulky. These limitations are overcome in the proposed converter by introducing two different values of inductors; hence, its current values differ, which becomes an advantage to enhance the voltage gain during step-up operation by means of forming two boost converters in the proposed topology and also resulting in high efficiency during step-down operation by using synchronous rectification. The existing converters mentioned in Table 2 are suitable for providing high efficiency during a smaller range of gain values only. If the gain values of the existing converter increase, its efficiencies degrade. From these experimental results of the proposed converter, it is well suited for large gain values with high efficiency. The discussion and analysis, the experimental results, and the comparisons confirm the benefits and functionality of the proposed converter.

6. Conclusions

In this article, a proposed topology for achieving a high efficiency bidirectional converter with a non-isolated type by synchronous rectification has been proposed and analyzed in detail. The proposed topology produces a high voltage gain when compared to the conventional converters under step-up as well as step-down operations. During step-up operation, the input current is separated between the two inductors, which enhances the voltage gain. Due to the synchronous rectification of the switches during step-down operation, the sum of the two inductor currents gives a high output current, which improves the efficiency. Hence, the proposed topology is particularly suited for battery charging applications having lower output voltage with a high current. In order to prove the feasibility, the proposed topology has been employed with the low-side and high-side voltages of 12 V and 180 V, respectively, for a 200 watts power rating. The measured efficiency of the proposed converter is better than the cascaded type for both step-up as well as step-down operations. The outcomes of simulation and experimentation are corroborated well in the examined statuses of operation under steady-state with the obtained efficiency of 95.1%—step-down operation and 94.1%—step-up operation for a 200 watts prototype circuit. From the prototype results obtained experimentally, it is seen that the experimental waveforms validate the simulation results and agree well with the illustrated modes of operation and steady-state analysis.