Advancing Renewable Energy: An Experimental Study of a Switched-Inductor, Switched-Capacitor Luo Boost Converter for Low-Voltage Applications

Abstract

Photovoltaic (PV), battery, and fuel cell (FC) technologies are emerging forms of renewable energy gaining popularity. However, one of the key limitations is their production of direct current (DC) voltage, which hinders the connectivity and integration with the electrical grid. To address this issue, various DC/DC boost converters have been introduced. This study presents an innovative Luo converter with a switched-inductor–capacitor (SLC) cell at the input and a switched-capacitor (SC) cell at the output. The SLC cell not only increases the input voltage, but also enhances the source’s lifespan and reliability. The SC cell further amplifies the voltage, especially for high-gain applications. The proposed converter simplifies control processes by using a single power switch, significantly boosting the input voltage by 21 times with a duty ratio of 0.8. This surpasses the gains achieved by conventional boost converters by over fourfold and Luo converters by sevenfold. The second challenge when a converter is connected to these voltage sources is the potential reduction in the lifespan of the sources and the overall system due to large input current ripples. The proposed converter addresses this issue by incorporating a switched-capacitor cell on the input side. This cell charges the inductors in parallel and discharges them in series, reducing the magnitude of the input current. Another advantage of the proposed converter is its simplicity, as it employs only one power switch, minimizing the complexity of the controller system. Additionally, the distribution of the output voltage passing through the diodes between the switch and output capacitor helps mitigate voltage stress for all semiconductor devices and capacitors. The study includes thorough mathematical analyses, simulations, and laboratory tests to validate the research’s theoretical foundations.

1. Introduction

Renewable energy sources, like photovoltaic (PV), battery, and fuel cell technologies, offer clear advantages over traditional energy sources. They are environmentally friendly, produce minimal greenhouse gas emissions, and reduce our dependence on finite fossil fuels [1,2,3]. Additionally, these sources can be utilized in various locations, promoting energy independence and security. However, a significant challenge is the variability and typically low direct current (DC) voltage output of these renewable sources.

To address this challenge, power electronics-based DC/DC converters play a crucial role [4,5,6,7,8]. They enhance the voltage output, making it easier to integrate renewable energy into different applications. These converters are essential for tasks like driving motors, regulating voltage, and connecting to AC grids. This facilitates the efficient and reliable use of renewable energy across various domains. By enabling the conversion, storage, and distribution of clean energy, these converters contribute to the transition towards a more sustainable and resilient energy landscape [9,10].

DC/DC boost converters play a crucial role in power electronics, meeting various application needs. These converters come in different classes, each with its own set of advantages and drawbacks. They can be categorized based on whether they are isolated or non-isolated [11,12,13,14], unidirectional or bidirectional [15,16,17,18], and voltage-fed or current-fed [19,20,21,22].

Non-isolated boost converters are simpler and cost-effective in design because they lack an isolation stage [23]. They are suitable for applications where electrical isolation is not a priority. On the other hand, isolated boost converters provide electrical isolation between the input and output, improving safety and addressing ground loop issues. However, they tend to be bulkier, more expensive, and less efficient due to the added isolation components.

In high-power applications, isolated converters are often preferred due to their ability to step up the voltage, provide galvanic isolation, offer improved voltage regulation, scalability, and reduced electromagnetic interference (EMI). These features make them suitable for meeting the strict requirements of high-power systems, ensuring safety, reliability, and control.

Another classification of step-up converters includes unidirectional and bidirectional configurations [15,16,17,18]. Unidirectional boost converters primarily allow power to flow from the input to the output, making them suitable for applications with a one-way power transfer requirement.

On the other hand, bidirectional boost converters can manage power flow in both directions, facilitating energy storage and bidirectional power management. However, they are more complex and require greater control efforts. Despite their intricacies, bidirectional boost converters outperform their unidirectional counterparts in various high-power applications. This is due to their ability to reverse the energy flow, their advantages of energy recovery, grid integration, reduced component stress, and enhanced control flexibility. These characteristics make bidirectional boost converters a compelling choice for applications that demand dynamic and efficient power management practices, while also prioritizing a high power quality and system longevity.

Boost converters can be evaluated based on their ability to either stabilize the output voltage or provide adaptability to variable load currents. Voltage-fed boost converters focus on regulating the output voltage, making them suitable for applications with voltage-sensitive loads [19,20,21,22]. They demonstrate precise voltage control and are commonly used in tasks such as voltage regulators.

On the other hand, current-fed boost converters are better equipped to handle variable load currents and show improved current regulation results. They find application in scenarios with fluctuating load demands. While voltage-fed boost converters offer simplicity and cost-effectiveness, they may have limitations in managing dynamic loads and bidirectional energy flow. Current-fed boost converters, however, are more versatile in accommodating load variations and excel in bidirectional operations. However, they require more sophisticated control methods and involve a higher component count. The choice between the two depends on the specific requirements and priorities of the application.

The integration of switched-inductor cells on the input side of a boost converter offers notable technical advantages, particularly in terms of voltage enhancement and the establishment of a continuous current mode of operation. These advantages are particularly significant in the context of renewable energy sources, such as photovoltaic (PV) technology, fuel cells, and batteries, significantly contributing to the extended life cycle and improved reliability of these energy sources.

Switched-inductor cells [24,25,26,27] play a crucial role in achieving a significant voltage increase. By efficiently storing and releasing energy, they facilitate a substantial rise in the input voltage, ensuring that the output voltage of the energy source reaches levels suitable for the intended application. This is especially important when dealing with inherently low-voltage sources, such as PV systems or batteries.

Additionally, the presence of switched-inductor cells results in the establishment of a continuous current mode of operation for the input source. This mode is characterized by a consistent and uninterrupted flow of the current. Importantly, switched-inductor cells contribute to the enhanced reliability of the input source by mitigating stress and reducing the likelihood of abrupt changes in the current or voltage. Unregulated fluctuations can lead to accelerated wear and tear on the source, shortening its operational life. In contrast, the incorporation of switched-inductor cells ensures reduced current stress on the input source, promoting a prolonged and more reliable operational life cycle.

The incorporation of switched-capacitor cells [28,29,30,31] on the output side of a boost converter presents several technical advantages, with a primary focus on voltage amplification. This is particularly beneficial in the context of renewable energy sources such as photovoltaic (PV) technology, fuel cells, or batteries. These advantages play a crucial role in increasing the voltage levels for a grid connection and various applications requiring a high DC voltage. Switched-capacitor cells effectively enhance the output voltage of the boost converter, providing a means for significant voltage boosting. This is especially advantageous when the input source, like PV technology or batteries, generates a DC voltage that is inherently lower than what is needed for the grid connection or high-voltage applications. By using capacitors to accumulate and release energy in a controlled manner, these cells efficiently and reliably increase the voltage to the levels required for these specific applications.

Moreover, switched-capacitor cells are essential in scenarios where stable and elevated DC voltage levels are critical for grid connections. These cells enable the converter to supply voltage levels that comply with the grid standards, ensuring a smooth integration into the electrical grid. Additionally, they are well-suited for high-DC-voltage applications, such as in industries with power demands surpassing typical voltage thresholds, where specific voltage levels are essential for various industrial processes.

When a DC/DC converter is employed to increase the voltage from a low-voltage source, a subsequent stage becomes essential, especially when the objective is to integrate with AC grid applications. The enhanced voltage produced by the DC/DC converter needs to be converted into AC voltages. In the literature, researchers have explored various inverter topologies [32,33,34,35] and switching mechanisms [36,37,38] to facilitate this conversion process.

To ensure the compatibility and safety of injecting the generated AC voltage into the grid, additional components are recommended. Specifically, the inclusion of a galvanic isolation [39,40] is crucial to prevent undesired electrical interactions and ensure the integrity of the connected systems. Additionally, employing an AC filter cell becomes necessary to refine the quality of the generated AC voltage, mitigating potential disturbances and harmonics before injection into the grid [41,42].

This multi-stage process involving the DC/DC conversion, inverter topologies, galvanic isolation, and AC filtering is vital for the efficient and reliable integration of low-voltage sources into AC grid applications, addressing both technical and safety considerations. Various strategies in the literature have been presented to optimize and enhance the performance of each stage in this complex energy conversion process.

This research introduces an enhanced Luo boost converter [43], incorporating a switched-inductor–capacitor cell at the input and a switched-capacitor cell at the output. The primary benefits of the input-side cell include boosting the generated voltage of the input source, enabling a continuous current mode of operation that extends the source’s lifespan, and providing a low-ripple current for enhanced converter reliability. This characteristic holds particular significance, especially in situations where the energy input stems from low-voltage sources, like batteries, fuel cells, or photovoltaic panels. These sources generate constrained voltage levels and necessitate a consistent current supply to ensure extended operational durability. Notably, the proposed converter stands out by employing a singular power switch in its circuitry. This streamlined configuration serves to alleviate the complexities associated with the control process, thereby contributing to a reduction in the overall circuit cost.

The output cell further amplifies the voltage and distributes the voltage stress between the switch and diodes, crucial for high-voltage applications. Additionally, the output inductor ensures a filtered DC current for the load. The converter exhibits a notably high gain, increasing the input voltage by factors of 9 and 21 for duty ratios of 0.5 and 0.8, respectively.

The proposed converter’s high-gain feature makes it well-suited for efficiently handling a broad range of power levels, from small- to medium- and high-power applications, especially when operating with low duty ratios. This implies that the converter can generate a high voltage comparable to grid levels, even at low duty ratios, effectively reducing thermal power losses. For instance, consider a conventional converter providing 220 VDC at the load, with a 20 VDC input at D = 0.909. In this case, the system is inefficient due to the prolonged “on” state of the switch, resulting in increased thermal losses. Conversely, the proposed converter achieves the same output voltage with a matching input at D = 0.6, indicating a reduced duration of the switch in the “on” state compared to the conventional converter. Especially when accounting for varying loads, the impact on the output voltage becomes significant under heavy loads. This poses a serious challenge as higher duty ratios need to be considered, which is practically unattainable, given that the duty ratio approaches one. This condition not only increases thermal or dynamic losses, but also directly diminishes the overall system’s efficiency.

A theoretical analysis is substantiated through mathematical investigations, simulation results, and experimental validation. As additional features of the proposed converter, the parallel charging and series discharging of inductors result in short input current ripples that enhance the lifespan of the input source, especially in high-frequency switching scenarios.

Section 2 outlines the proposed converter and investigates its operational states. The simulation results and discussions of them are addressed in Section 3, followed by the presentation of the experimental test results in this Section 4. Finally, Section 4 concludes this study.

2. The Proposed Converter and Its Features

The converter under consideration is depicted in Figure 1. As elucidated in the introductory section, one of the primary merits of this proposed converter lies in its compatibility with low-voltage sources, such as fuel cells, photovoltaic energy systems, and batteries. The primary objective of this converter is to initially elevate the voltage output of these sources before further enhancements of the converter itself. This voltage augmentation is achieved through the utilization of the input switched-inductor–capacitor (SLC) cell, comprising inductors L1 and L2, capacitor C1, and diodes D1 and D2. Subsequently, the voltage is further amplified by the switched-capacitor (SC) cell, which is formed by diodes D4, D5, and D6 and capacitors C3, C4, and C5.

The configuration of the SC cell reveals that, over time intervals, the output voltage divides itself across the capacitors and the power switch, thereby mitigating the voltage stress on the semiconductor devices.

2.1. Gain Calculation

Figure 2a,b provide a depiction of the states of semiconductor devices and the charging and discharging modes for the inductors and capacitors. During time intervals when the switch receives a positive voltage from the PWM switching signal, it is in a short-circuit state, as illustrated in Figure 2a. In this operating mode, both inductors, L1 and L2, charge in parallel, forming two distinct loops that encompass the input voltage source Vin and switch S1. Simultaneously, capacitor C1 is charged via the input source, diodes D1 and D2, and switch S1. Furthermore, capacitor C2 is charged through diodes D3 and switch S1.

As for the switched-capacitor (SC) cell, during this operational mode, diode D4 is reverse-biased, while capacitor C4 is charged through diode D5 by discharging capacitor C3. It is essential to note that, in this configuration, the connection between the input and output sides is disconnected, and capacitor C5 delivers a consistent output voltage for the load. Consequently, for this specific operational mode, it can be succinctly described as $(0<t<DT)$:

$$V_{L1}{=V_{L2}=L}_1·\frac{d{i}_{L1}}{dt}={L_2·\frac{d{i}_{L2}}{dt}=V}_{in}$$

(1)

$$V_{C1}{=V_{C2}=V}_{in}$$

(2)

$$V_{in}=V_{C3}-V_{C4}$$

(3)

$$V_{C5}=V_{L3}+V_O$$

(4)

In the DCM operational state, Figure 2c illustrates the condition of each element. In this state, all semiconductor devices are considered disconnected, allowing the application of Kirchhoff’s voltage law (KVL) and Kirchhoff’s current law (KCL) to the other passive and active elements. Capacitors C3 and C4 are effectively bypassed as diodes D4, D5, and D6 are deactivated.

As depicted in Figure 2c, under this operational mode, the voltage passing through capacitor C3 discharges into the output load. After a brief period, this voltage gradually diminishes to zero. The filtered inductor, L3, plays a role in smoothing the output current. However, it is noteworthy that the current passing through this inductor approaches zero after approximately five times the time constant of the output RC circuit $(5\tau =5.{\mathit{C}}_{\mathit{O}}\mathbf{.}{\mathit{R}}_{\mathit{L}\mathit{o}\mathit{a}\mathit{d}})$.

In the subsequent time interval, when the switch is in the off state, both inductors L1 and L2 undergo a discharging process, creating a series circuit that includes capacitors C1, C2, and C3, along with diode D4. This state is evident from Figure 2b, where capacitors C1 and C2 are discharging, while capacitor C3 is being charged, in contrast to the previous operational mode. Meanwhile, capacitor C5 receives a charge from the input source and capacitor C4 discharges through diode D6. This particular operating condition can be succinctly described as $(DT<t<T)$:

$$V_{in}=V_{L1}+V_{L2}-V_{C1}-V_{C2}+V_{C3}$$

(5)

$$V_{in}=V_{L1}+V_{L2}-V_{C1}-V_{C2}+V_{C5}-V_{C4}$$

(6)

$$V_{C5}=V_{L3}+V_O$$

(7)

Taking into account the identical inductors, denoted as $L_1=L_2=L$, and incorporating Equations (2) and (5), one can compute the voltage passing through capacitor C3 as follows:

$$V_{L\mathrm{1,2}}=\frac{3V_{in}-V_{C3}}{2}$$

(8)

The second voltage balance principle applicable to inductors in a switching power converter circuit dictates that the average voltage passing through the inductor is essentially zero. Consequently, for inductors L1 and L2, this can be expressed as follows:

$${\int }_0^{DT}{V}_{in}dt+\frac{1}{2}{\int }_{DT}^T\left(\frac{3V_{in}-V_{C3}}{2}\right)dt=0$$

(9)

Therefore, the voltage in capacitor C3 can by calculated accordingly:

$$V_{C3}=\frac{3-D}{1-D}{V}_{in}$$

(10)

By considering Figure 2a:

$$V_{C2}=V_{C3}-V_{C4}$$

(11)

Given that the values of $V_{C2}$ and $V_{C3}$ are derived from Equations (2) and (10):

$$V_{C4}=V_{in}-\frac{3-\mathrm{D}}{1-D}{V}_{in}=\frac{2}{1-D}{V}_{in}$$

(12)

Figure 2b indicates that:

$$V_{C5}=V_{C3}+V_{C4}=\frac{3-\mathrm{D}}{1-D}{V}_{in}+\frac{2}{1-D}{V}_{in}=\frac{5-\mathrm{D}}{1-D}{V}_{in}$$

(13)

In a steady-state operational mode, it is a fundamental principle that the average voltage passing through an inductor is zero. As a result, it can be expressed as follows:

$$V_{L3}·D={-V}_{L3}·(1-D)$$

(14)

Hence, the output voltage, $V_O$, is equivalent to $V_{C5}$, and:

$$V_O={\frac{5-\mathrm{D}}{1-D}V}_{in}\to G=\frac{V_O}{V_{in}}=\frac{5-\mathrm{D}}{1-D}$$

(15)

Figure 3 is included to illustrate a comparison of the voltage gains for the proposed converter and a conventional boost converter. It is noteworthy that the gain of the traditional step-up converter corresponds to $\frac{1}{1-D}$. This figure clearly indicates that the proposed converter exhibits significantly higher gain values. These elevated gain values render the proposed converter exceptionally well-suited for applications involving low-voltage resources, such as batteries, photovoltaic panels, and fuel cells. These particular renewable energy sources are known for generating relatively modest DC voltages. To effectively employ these sources in applications, like driving a DC motor or connecting to the grid, it is imperative to first increase the generated voltage to the requisite level for the intended load.

Figure 3 shows a visual depiction of the gains in both the proposed and conventional boost converters. The figure straightforwardly illustrates that, at a duty cycle (D) of 0.9, the gain of the proposed converter reaches 41 times the input voltage, whereas the gain of a conventional boost converter only reaches 10 times the input voltage.

During a time period encompassing the intervals when the switch is turned on and off, it is possible to acquire the voltage and current values for various elements. Figure 4a illustrates the voltage and current waveforms of the inductors. Additionally, Figure 4b,c depict the voltage waveforms for the diodes and capacitors, respectively.

2.2. Efficiency Calculation

Another pivotal aspect of a power converter circuit lies in its efficiency. Consequently, it becomes imperative to perform calculations for both dynamic and switching power losses across all components within the circuit, thereby yielding a precise power loss equation. Dynamic losses predominantly stem from the internal resistances intrinsic to the elements, which are typically negligible in ideal operational conditions. However, these minute resistances can sometimes give rise to substantial dynamic losses in practical scenarios. The critical parameter to consider in this context is the root mean square (RMS) current for each component.

Switching losses are intertwined with the crossover and overlap regions in semiconductor devices during their on/off transitions. In an ideal scenario, the voltage and current waveforms shift sharply between the high and low sides, theoretically presenting negligible cross-sections of the current and voltage. Nevertheless, in practice, these waveforms necessitate a finite time to approach zero or reach their maximum values. As a result, during switching, both voltage and current values coexist, thus giving rise to what is commonly known as switching losses.

To mitigate dynamic losses, the newer generation of power semiconductors, notably silicon carbide (SiC) and gallium nitride (GaN), offer reduced internal resistances, consequently leading to diminished dynamic losses. As for switching losses, the adoption of soft switching techniques, such as zero voltage switching (ZVS) and zero current switching (ZCS), or zero voltage transition (ZVT) and zero current transition (ZCT), is advisable. This subsection delineates the procedure for calculating the losses incurred by the circuit elements.

2.2.1. Power Switch

The calculation of the relationship between input and output currents becomes feasible upon deriving the gain equation, as follows:

$$V_{in}{I}_{in}=V_o{I}_o\to I_{in}=\frac{V_o{I}_o}{V_{in}}\to \frac{I_o}{I_{in}}=\frac{V_{in}}{V_o}=\frac{1-d}{5-d}\to I_{in}=\frac{5-d}{1-d}{I}_o$$

(16)

In (16), $I_{in}$, $I_o$, $V_{in}$, and $V_o$ show the input and output currents and input and output voltages, respectively. The current flowing through the switch during activation can be computed as follows:

$$I_S=I_{L1,on}+I_{L2,on}{+I}_{C1,on}+I_{\mathrm{C}2,on}$$

(17)

$I_S$ represents the current passing through the switch, while $I_{L1,on}$ and $I_{L2,on}$ denote the current passing through inductors L1 and L2 during the switch’s activation. Similarly,$I_{C_2,on}$, and $I_{C_2,on}$ represent the current passing across capacitors C1, and C2 during the period when the switch is in the on state. To determine the dynamic losses of a switch, it is necessary to compute the root mean square (RMS) current value. A conventional approach for calculating the RMS value of a signal involves using an integral method:

$$I_{S,rms}=\sqrt{\frac{1}{T}{\int }_0^{DT}{(I_{L1}+I_{L2}+I_{C_1,on}+I_{C_2,on})}^{2}dt}$$

(18)

Taking into account $r_{DS}$ as the internal resistance of the drain-source pins during the switch’s activation, the dynamic loss of the power switch ($P_{r_{DS}}$) can be determined as follows:

$$P_{r_{DS}}=r_{DS}{I_{S,rms}}^2$$

(19)

To calculate the switching losses of the switch, several key parameters must be determined, including the switching frequency ($f_s$), the drain-source parasitic capacitor ($C_s$), and the voltage passing through the drain-source pins ($V_s$) when the switching process occurs. These values can typically be obtained from the datasheet of the components used. Notably, in the case of the switch within the proposed converter, the voltage, $V_S$, is equal to ${V_{C3}-V}_{C2}$. The calculation for switching losses is then performed as follows:

$$P_{{SW}_{switch}}=f_s{C}_s{V_s}^2=f_s{C}_s{{(V_{C3}-V}_{C2})}^2$$

(20)

The comprehensive power losses for the switch, encompassing both dynamic and switching losses, can be expressed as follows:

$$P_{switch}=P_{r_{DS}}+{2.P}_{{SW}_{switch}}$$

(21)

Given that two switching processes occur within each switching period, it is essential to consider a total of 2 times the power loss for the switch, denoted as ${2.P}_{{SW}_{switch}}$, for switching losses.

2.2.2. Power Diodes

In order to compute the dynamic losses for all switches, it is crucial to determine the root mean square (RMS) values of the currents flowing through them:

$$I_{D_1}=I_{L2,on}+I_{C1,on}\to P_{{dyn,D}_1}=R_{F_1}{I_{D_1,rms}}^2=R_{F_1}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({I_{L2,on}+I_{C1,on})}^{2}dt}\right)}^2$$

(22)

$$I_{D_2}=I_{C1,on}+I_{L1,on}\to P_{{dyn,D}_2}=R_{F_2}{I_{D_2,rms}}^2=R_{F_2}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({I_{C1,on}+I_{L1,on})}^{2}dt}\right)}^2$$

(23)

$$I_{D_3}=I_{C2,on}+I_{C3,on}\to P_{{dyn,D}_3}=R_{F_3}{I_{D_3,rms}}^2=R_{F_3}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({I_{C2,on}+I_{C3,on})}^{2}dt}\right)}^2$$

(24)

$$I_{D_4}=I_{C3,off}\to P_{{dyn,D}_4}=R_{F_4}{I_{D_4,rms}}^2=R_{F_4}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({I_{C3,off})}^{2}dt}\right)}^2$$

(25)

$$I_{D_5}=-I_{C3,off}\to P_{dyn,D_5}=R_{F_5}{I_{D_5,rms}}^2=R_{F_5}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({-I_{C3,on})}^{2}dt}\right)}^2$$

(26)

$$I_{D_6}=-{I_{C4,off}\to P}_{dyn,D_5}=R_{F_6}{I_{D_6,rms}}^2=R_{F_5}{\times \left(\sqrt{\frac{1}{T}{\int }_0^{DT}({-I_{C4,off})}^{2}dt}\right)}^2$$

(27)

Several parameters are employed within this set of equations. $R_{F_1}$ to $R_{F_6}$ represent the internal resistance values of diodes $D_1$ to $D_6$, while $V_{F_1}$ to $V_{F_6}$ denote the threshold forward bias voltage values of these diodes. $P_{dyn,D_X}$ denotes the dynamic loss equation for the diodes, which is associated with the root mean square (RMS) current of the diodes.

In the subsequent stage, it is necessary to compute the diodes’ switching losses, which involves taking into account the diodes’ average current. In the equations provided below, $I_{D_X,ave}$ represents the average current of $D_{\mathrm{X}}$.

$$P_{{SW,D}_1}=V_{F_1}{I}_{D_1,ave}=V_{F_1}\frac{1}{T}{\int }_0^{DT}\left(I_{L2,on}+I_{C1,on}\right)dt$$

(28)

$$P_{{SW,D}_2}=V_{F_2}{I}_{D_2,ave}=V_{F_2}\frac{1}{T}{\int }_{DT}^T{(I}_{C1,on}+I_{L1,on})dt$$

(29)

$$P_{{SW,D}_3}=V_{F_3}{I}_{D_3,ave}=V_{F_3}\frac{1}{T}{\int }_{DT}^T\left(I_{C2,on}+I_{C3,on}\right)dt$$

(30)

$$P_{sw,D_4}=V_{F_4}{I}_{D_4,ave}=V_{F_4}\times {\int }_{DT}^T\left(I_{C3,off}\right)dt$$

(31)

$$P_{sw,D_5}=V_{F_5}{I}_{D_5,ave}=V_{F_5}\times {\int }_{DT}^T\left({-I}_{C3,on}\right)dt$$

(32)

$$P_{sw,D_6}=V_{F_5}{I}_{D_5,ave}=V_{F_6}\times {\int }_{DT}^T\left({-I}_{C4,off}\right)dt$$

(33)

2.2.3. Inductors

For the steady-state operational mode, the average current for the capacitors is equal to zero; therefore, the current for the inductors can be calculated as follows:

$$I_{L_1}=I_{L_2}=\frac{I_{in}}{2}={\frac{5-D}{2(1-D)}I}_o$$

(34)

$R_{L_1}$ and $R_{L_2}$ represent the internal resistance of inductors $L_1$ and $L_2$, while $P_{{rL}_1}$ and $P_{{rL}_2}$ denote the dynamic losses associated with these respective inductors.

$$P_{{rL}_1}=R_{L_1}{I_{L_1,rms}}^2=R_{L_1}{\left(\frac{5-D}{2(1-D)}\right)}^2{I_o}^2$$

(35)

$$P_{{rL}_2}=R_{L_2}{I_{L_2,rms}}^2=R_{L_2}{\left(\frac{5-D}{2(1-D)}\right)}^2{I_o}^2$$

(36)

Taking into account the negligible internal resistance of the capacitors, the total power loss equation for the proposed converter can be formulated as follows:

$$P_{Loss}=P_{switch}+P_{D_1-D_6}+P_{L_1,L_2,L_3}=P_{switch}+\sum _{a=1}^6{\left(P_{RF}\right)}_{D_a}+\sum _{a=1}^6{\left(P_{VF}\right)}_{D_a}+P_{{rL}_1}+P_{{rL}_2}+P_{{rL}_3}$$

(37)

Hence, the efficiency ($\eta$) expression for any converter can be formulated as follows:

$$\eta =\frac{P_o}{P_o-P_{Loss}}=\frac{1}{1+\frac{P_{Loss}}{P_o}}$$

(38)

2.3. Voltage Stress on the Switch and Output Diode

The assessment of voltage stress on the switch and other semiconductor components is imperative when evaluating the stability of these elements and the reliability of the converter under varying operational scenarios, including different input voltages and duty ratios. In this particular section, we focus on the voltage stress experienced by the main switch and diode D3, which serves as the primary output diode, and we illustrate it graphically.

To calculate the voltage stress on switch S1, we can utilize Figure 2b, along with Equations (2) and (10):

$$V_S{=-V_{C2}+V_{C3}=V}_{in}+{\frac{3-\mathrm{D}}{1-D}V}_{in}={\frac{2}{1-D}V}_{in}$$

(39)

This equation demonstrates that, as the input voltage increases or the duty ratio becomes higher, the voltage stress across the switch also increases. For instance, when $V_{in}=20\mathrm{V}$ and $\mathrm{D}=0.5$, the voltage passing through the switch reaches 80 V, while the output voltage at the load remains at 180 VDC. The graphical representation of this stress can be observed in Figure 5a. The depicted figure illustrates the gain and voltage stress characteristics of the switch in a traditional converter. Notably, under identical conditions of input voltage and duty ratio ($V_{in}=20 \mathrm{V}$ and $\mathrm{D}=0.5$), the switch experiences a voltage of approximately 40 V. However, the resultant output voltage remains at 40 V, thereby exhibiting a disparity of 140 VDC compared to the voltage generated by the suggested converter.

To determine the voltage passing through diode D3 when it is in the deactivated state, one can refer to Figure 2b and utilize Equations (2) and (8).

$$V_{D3}=V_{L1}-V_{C1}+V_{L2}-V_{C2}=\frac{3V_{in}-V_{C3}}{2}-V_{in}+\frac{3V_{in}-V_{C3}}{2}-V_{in}=2V_{in}$$

(40)

This equation straightforwardly reveals that the voltage passing through diode D3 is solely determined by the input source voltage, $V_{in}$, and remains unaffected by changes in the duty ratio. The graphical representation of this stress characteristic is illustrated in Figure 5b. In the depicted figure, the voltage stress experienced by the output diode in the conventional diode is also delineated. It is evident from the illustration that the diode in the proposed converter experiences a consistent voltage stress level. In contrast, the diode in the conventional converter experiences an escalation in the voltage stress corresponding to prolonged duty ratios, as discernible from the figure.

2.4. Comparisons and Discussion

This subsection’s objective is to facilitate a comparative analysis among various types of DC/DC power boost converters that have been documented in recent years. The aim is to assess the standing of the proposed converter relative to other counterparts. Several facets of these converters need to be scrutinized, including the count of components, such as inductors, capacitors, diodes, and transistors, the voltage amplification they offer, the voltage stress they exert on the components, their overall efficiency, the current stresses involved, and the complexity of the control methods employed to ensure a stable output voltage for the connected load.

Table 1. Comparison of recommended and other boost converters.

Topology	Num. of L	Num. of C	Num. of D	Num. of S	Total Num. of Component	Voltage Gain	Voltage Stress Present in Main Switch
[44]	4	5	3	2	14	$\frac{1+3d}{1-d}$	$\frac{V_o}{1+(n+1)d}$
[45]	3	5	6	2	16	$\frac{2(1+d)}{(1-d)}$	$\frac{V_O(1-d)}{2(1+d)}$
[46]	3	3	6	3	15	$\frac{nd(1+d)}{1-d}$	$\frac{1+d}{1-d}{V}_o$
[47]	4	3	8	1	16	$\frac{1+d}{1-3d}$	$\frac{1+d}{1-3d}{V}_o$
[48]	3	2	6	1	12	$\frac{1+d}{1-d}$	$\frac{1+d}{1-d}{V}_o$
[49]	2	5	4	1	12	$\frac{2+d}{(1-d)}$	$\frac{V_0}{(2+d)}$
Proposed	3	6	6	1	16	$\frac{5-d}{1-d}$	$\frac{2}{1-d}{V}_o$

presents a selection of boost converters with similar topologies. Upon reviewing these studies, it becomes evident that the number of inductors typically ranges between three and four for most converters. Notably, the proposed converter features a configuration with three inductors, positioning it favorably within this context.

Furthermore, in [48], the proposed converter, along with the converters presented in [46,47], exhibits a design with just three capacitors, representing a minimalistic approach in comparison to other converters. The count of diodes in these converters spans from three to eight, while the proposed converter employs a total of six diodes, placing it in a respectable position relative to the converters listed in Table 1.

Of paramount significance is the number of transistors used in these converters. The proposed converter, along with the converters in [47,48], employs only a single power switch. This configuration minimizes the complexity of the control mechanism necessary to maintain a stable DC voltage output, accommodating varying loads and input sources.

Additionally, the gain equation of the proposed converter illustrates its superior standing in terms of voltage amplification when compared to other converters. Gain comparison graphics are presented in Figure 6.

In Table 1, the symbols 1, $V_o$, $n$, and $d$ represent the output voltage of the converters, the number of switched-capacitor or switched-inductor cells, and the duty ratio, respectively.

Considering the various converter topologies and the intricacies involved in the control process, the proposed converter exhibited notable advantages and features. Notably, the structure of the proposed converter incorporated a solitary power switch, a design choice that served to minimize both dynamic and switching losses within the circuit. Simultaneously, this design simplified the control process by obviating the necessity for intricate isolated switching circuits, thereby mitigating potential challenges during practical implementations.

In terms of the overall cost, a significant proportion was attributed to semiconductor devices, specifically the power switch and power diodes. The proposed converter, characterized by a solitary power switch, proved cost-effective. A comparative analysis of other converters in Table 1 revealed that, while some alternatives featured six or more power diodes, the proposed converter maintained a competitive position.

Another distinctive advantage of the proposed converter was its superior voltage gain, as evidenced in Figure 6. Across all duty ratio values, the converter surpassed its counterparts in Table 1. This attribute rendered the converter well-suited for applications involving low-voltage sources, such as batteries, fuel cells, and photovoltaic panels.

Furthermore, the converter demonstrated a noteworthy characteristic pertaining to low input current ripples. This was attributed to the parallel charging and series discharging of inductors in the circuit. The resultant short input current ripple enhanced the lifespan of the input source, particularly in scenarios where high-frequency switching was a concern.

Figure 6 demonstrates that, across all duty ratios ranging from 0.1 to 0.8, the proposed converter consistently outperforms the other converters in terms of both generated DC voltage and gain. The converter proposed in [47] achieves its highest gain at approximately D = 0.3. However, beyond this point, the gain gradually decreases, reaching 1.25 at D = 0.8.

2.5. Controller Design

A step-up converter can benefit from the implementation of a PID controller, providing advantages, such as enhanced steady-state accuracy, improved transient response, and adaptability to diverse operating conditions. The seemingly intricate task of configuring PID coefficients (Kp, Ki, and Kd) is simplified through the utilization of modern control design tools, simulations, and systematic tuning methods. This ensures accessibility in the tuning process and facilitates an optimal converter performance in different applications.

The error signal, (e(t)), is depicted as the discrepancy between the desired reference input ${(V}_{ref})$ and the actual output voltage ${(V}_{out})$ of the converter at time t:

$$e\left(t\right)=V_{ref}-V_{out}$$

(41)

The control input to the converter (u(t)) corresponds to the duty cycle of the converter’s switch at time t. The PID controller can be formulated as:

$$u\left(t\right)=K_{p}e\left(t\right)+K_i{\int }_0^{t}e\left(\tau \right)d\tau +K_d\frac{de\left(t\right)}{dt}$$

(42)

Here, $K_p$ signifies the proportional gain, determining the controller’s immediate response to the current error signal by scaling it directly.

$K_i$ represents the integral gain, accumulating the error over time to eliminate steady-state errors by integrating the error signal over time.

$K_d$ is the derivative gain, factoring in the rate of change in the error signal to anticipate future changes, thereby reducing overshoot and enhancing system stability. The error signal, $e\left(t\right)$, is defined above, ${\int }_0^{t}e\left(\tau \right)d\tau$ signifies the integral value of the error signal over time, and $\frac{de\left(t\right)}{dt}$ represents the derivative of the error signal with respect to time. Figure 7 illustrates the graphical representation of the PID control process for the proposed converter.

3. Results

The presented converter topology was formulated using MATLAB/Simulink, involving an array of power levels across varying input voltages and output loads. Voltage and current measurements were performed on the circuit components. Subsequently, the simulation outcomes were juxtaposed with theoretical computations, followed by the development of a laboratory-based workbench for the comparison of voltage and current characteristics with the corresponding theoretical and simulation-based results. The findings underscore a congruence between the implemented circuit, simulation, and mathematical analyses, affirming a high degree of consistency. This presentation commenced with an exposition of the simulation results, followed by the disclosure of the outcomes derived from the practical prototype converter and its associated switching mechanism, along with the experimental test results.

3.1. Simulation

Two distinct duty ratio values, D = 0.5 and D = 0.75, were employed in the simulation, and the voltage and current data for various components were presented. As per Equation (15), the converter’s gain corresponds to 9 and 17 for D = 0.5 and D = 0.75, respectively. With Vin set at 15 V, it was anticipated that 135 V and 255 VDC would be achieved for the specified duty ratios.

Figure 8a–f illustrate the outcomes for D = 0.5. Figure 8a represents the current profiles of inductor L1 and switch S. As anticipated, the input current for the inductors exhibited a favorable condition, with peak-to-peak variations ranging from approximately 0.55 to 0.75 A. No significant undershoots or overshoots were observed during the switching events. The status of the current switching for switch S was noteworthy, and a slight overshoot of up to 0.5 A was observed. Figure 8b provides the voltage and current characteristics of inductor L1. In accordance with Equations (1) and (8), the maximum and minimum voltages for this inductor oscillated between −15 and 15 VDC. This figure confirms that the voltage aligns with the expected values. The current waveform mirrors the pattern observed in Figure 8a.

Figure 8c is included to illustrate the operating states of switch S and diode D6 as an illustrative example. Theoretically, it was anticipated that these components operated asynchronously, meaning that when the switch was active, diode D6 should be inactive, and vice versa. This asynchronous behavior is evident when referring to Figure 2a,b, and the results align with the expectations presented in those figures.

Figure 8d, the voltage levels across capacitors C1 to C5 are depicted. The anticipated voltages for capacitors C1 and C2 are determined by Equation (1), while the voltages for capacitors C3 to C5 are defined by Equations (10), (12), and (13), respectively. These equations specify that, under ideal operating conditions, these voltages should correspond to 15, 15, 75, 60, and 135 VDC values, respectively, for C1 to C5. This figure validates the accurate calculation of these theoretical values, affirming their correctness in practice.

An additional figure, presented as Figure 8e, is introduced to validate the validity of Kirchhoff’s voltage law (KVL) and Kirchhoff’s current law (KCL) principles, as demonstrated in Figure 2a,b. These new figures reveal that two diodes, D5 and D6, operate asynchronously, and in any given switching interval, only one of them should be in the “on” state. This observation reinforces the consistency of the circuit behavior with the principles depicted in Figure 2a,b.

Lastly, Figure 8f provides a representation of the input and output voltages. Approximately 130 VDC is generated for the load when the input voltage is set at 15 VDC, and this output voltage aligns with the expected values. It is important to note that precise voltage gain calculations necessitate the consideration of voltage drops across all components through intricate mathematical analyses. Nevertheless, the presented voltage gain equation offers a highly accurate approximation of the output voltage.

The results of the current and voltage measurements for a duty cycle (D) of 0.75 are depicted in Figure 9a–f. Generally, these figures provide empirical support for the theoretical concepts previously presented and corroborate the findings presented in Figure 8. Given the higher duty cycle in the results of Figure 9, a correspondingly elevated output voltage is achieved, resulting in higher voltage and current levels. For instance, in Figure 9a, the average currents for both the switch and inductor L1 surpass the values in Figure 8a. However, the oscillations, overshoots, and undershoots in these currents remain consistent, resulting in well-defined and sharply defined signals. Figure 8b displays the voltage and current characteristics of inductor L1, which, as indicated by Equation (8), should exhibit voltage drops exceeding −40 V, as validated by Figure 9b.

Figure 9c reaffirms the findings in Figure 2a,b and Figure 8c. Given the higher voltage values in Figure 8, the voltage passing through both the switch and diode D6 also attains higher levels. The voltage profiles for capacitors C1 to C5 are presented in Figure 9d. An interesting observation in this figure is that, while the voltage passing through capacitors C3, C4, and C5 fluctuates and increases, the voltage passing through capacitors C1 and C2 remains unchanged compared to the values in Figure 8d. This discrepancy arises because the voltage drop across the latter capacitors aligns with the input voltage, a finding that corroborates the accuracy of the voltage equations for capacitors provided in Section 2. Figure 9e corroborates that, within each time interval, only one of the diodes, either D5 or D6, is in the “on” state. The resultant output voltage is depicted in Figure 9f, where an output voltage of approximately 250 VDC is observed.

3.2. Experimental

A laboratory workbench was established to conduct tests on a prototype step-up converter operating in various modes. Figure 10a illustrates the implemented prototype converter and the associated laboratory test setup. The hardware tests utilized a 24 VDC voltage source, with measurements taken for the voltage and current across different components.

Figure 10b displays the gate-source and generated drain-source voltages for the power switch. This figure demonstrates that a positive PWM signal applied to the gate-source pins results in a short circuit, allowing the current to flow through the switch. Various duty ratios were tested, confirming the switch’s on–off behavior with positive and zero PWM signals at the gate-source pins. Figure 10b exemplifies a state where a signal with a duty ratio close to 0.45 creates a voltage stress of approximately 90 V across the drain-source pins.

The current and voltage of inductor L1, representing a sample input-side element, are depicted in Figure 10c. This figure validates the second balance voltage law for inductors, affirming that the average voltage passing through an inductor in a given time period is zero. While this theoretical basis implies no power consumption by the inductor, practical considerations, such as the low resistance in the inductor winding, result in dynamic losses. The input side inductor’s current, exhibiting less than a 1 A ripple, underscores the proposed converter’s suitability for low-ripple, low-voltage source applications, like fuel cells and batteries.

Figure 10d presents the voltage stress on the drain-source pins and the switch current. This figure clarifies that, during switch activation intervals, the drain is short-circuited to the source, causing an increase in the switch current. In subsequent intervals, the channel current returns to zero. The inclusion of a small inductor in series with the MOSFET creates a soft switching state, minimizing switching losses.

Figure 10e–i serve to corroborate the theoretical concepts outlined in Section 2, as well as in Figure 2a,b and Figure 4b. These figures examine the states of different diodes during switch activation and deactivation states, evaluating each diode’s state independently. For instance, Figure 10e focuses on the state of diode D1 and the switch, illustrating the simultaneous on–off behavior of these semiconductor devices, as predicted by the presented theory.

Figure 10f demonstrates the voltage values of diode D3 and transistor S during activation and deactivation intervals. Notably, both elements exhibit simultaneous activation and deactivation behaviors, experiencing the same voltage stress.

The voltage stress on diode D4 and switch S are reported in Figure 10g.

Figure 10h showcases the state of diode D5 during the switch operation, revealing that these semiconductor devices switch synchronously, with the same voltage decreasing across the diode when deactivated.

Finally, Figure 10i presents the state of diode D6, displaying the voltage stress on this diode and the main power switch, S. During switch activation intervals, diode D6 is disconnected, experiencing a reverse-biased voltage close to the drain-source voltage.

The theoretical calculations of the voltage passing through various capacitors, ranging from C1 to the output capacitor, Co, were delineated in Section 2 through Equations (2), (10), (12), and (15). The corresponding theoretical predictions were further visualized through the simulations presented in Figure 8d and Figure 9d. Figure 10j–l specifically illustrate the voltage stress experienced by capacitors C1–C2, C3–C4, and input–output voltages, respectively, when operating with a duty ratio approximating 0.51. The obtained results unequivocally corroborate the outcomes of the simulation.

Figure 10m illustrates the input and output currents of the converter at an output power of approximately 100 W. At an anticipated load of around 0.5 A, an average input current approximately nine-times greater than the output current is expected. The depicted results in Figure 10m align with this expectation, demonstrating an acceptable input current variation of 5A. To minimize the current ripple, the use of larger inductors is a viable option.

The performance of the PID controller is depicted in Figure 10n when a lighter load is connected at the output nodes, ranging from approximately 200 to 130 W. While a reduced current wave was anticipated, the voltage remained constant after approximately 10 microseconds, exhibiting an overshoot and undershoot. It is worth noting that different controller systems can be designed and explored in future studies.

Figure 11 illustrates the efficiency curves for the proposed topology in both simulation and experimental scenarios. The graph highlights an increase in the efficiency with a higher output power, indicating a positive correlation between these two parameters. The discrepancies observed between the theoretical and experimental outcomes can be attributed to internal resistances, particularly those associated with power diodes, which serve as the primary contributors to power losses. Addressing these differences necessitates a thorough examination of the internal resistive components.

Furthermore, mitigating switching losses in the diodes is crucial for improving the overall efficiency. This can be achieved through the implementation of more precise soft-switching techniques, such as zero voltage and zero current switching, or zero voltage or zero current transition techniques. By adopting these advanced strategies, it is possible to minimize switching-related losses, enhancing the alignment between the theoretical predictions and experimental results and ultimately optimizing the performance of the proposed topology.

Figure 12 delineates the distribution of losses among the components of the converter as observed in the experimental tests. Notably, the preeminent contributor to losses was identified as diodes. In practical implementations, the mitigation of such losses can be achieved by adopting rapid and low-power SiC and GaN diodes. Furthermore, the incorporation of a suitable snubber circuit was deemed beneficial, particularly in scenarios where soft switching was employed to alleviate switching losses. Additionally, employing power switches of the same type and applying a consistent soft switching model can effectively reduce both dynamic and switching losses incurred by the switch.

4. Conclusions

In this study, a Luo converter equipped with switched-inductor and switched-capacitors cells was presented. The parallel charging and series discharging states of the inductors at the input side minimized the current ripples at the input side of the converter. This state of the operation was vital for low-voltage input voltage sources, like fuel cells and batteries, for their and the topology’s longer lifespan and reliability. The output-side switched-capacitor cell simply increased the voltage gain of the converter and made the topology appropriate for high-DC-voltage applications, like the HVDC or AC grid applications, after passing through an inverter. A hardware test bench was organized in the laboratory and different operational modes, including different input voltage sources, different loads, and duty rations, were tested. According to the test results that are presented in Figure 9, for D = 0.51, with 24 VDC as the input voltage, a voltage close to 214 VDC is generated at the output side of the converter. Different loads ranging from 50 to 300 W tested the efficiency of the converter during both the simulation and experimental approaches. Around a 98 percent efficiency result in the simulation test and 96 percent in the experimental test were obtained. The difference between the simulation and experimental tests can be interpreted from the dynamic losses of the semiconductor devices and inductors and also the switching losses that were the main cause of the power loss.

Briefly, the proposed converter, distinguished by its singular power switch, effectively mitigated dynamic and switching losses, thereby streamlining the control process. Its cost-effectiveness, evidenced by a reduction in total costs associated with a solitary power switch, positioned it competitively against alternatives with multiple power diodes. The converter’s superior voltage gain rendered it particularly apt for applications involving low-voltage sources, such as batteries, fuel cells, and photovoltaic panels. Noteworthy was its capacity to curtail input current ripples, thus augmenting the longevity of the input source, especially in scenarios characterized by high-frequency switching.

Furthermore, as part of future research endeavors, the converter presents itself as a viable candidate for testing in high-power grid applications. Such investigations can include the exploration of diverse control methodologies, including those grounded in deep mathematical principles, like small signal-based controllers, or reliance on artificial neural networks. Furthermore, in the context of high-power applications, a comprehensive examination of switching power losses becomes imperative. These losses constitute a paramount source of energy dissipation and necessitate mitigation through the implementation of soft switching techniques. This entails the meticulous design of snubber cells, a process that mandates intricate mathematical analyses to ensure the effective suppression of switching power losses.