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Review
Peer-Review Record

Research Progress of Neural Synapses Based on Memristors

Electronics 2023, 12(15), 3298; https://doi.org/10.3390/electronics12153298
by Yamin Li 1,2, Kang Su 1,2, Haoran Chen 1,2, Xiaofeng Zou 1,2, Changhong Wang 1,2, Hongtao Man 1,2, Kai Liu 1,2, Xin Xi 1,2 and Tuo Li 1,2,*
Reviewer 1:
Reviewer 3: Anonymous
Reviewer 4: Anonymous
Electronics 2023, 12(15), 3298; https://doi.org/10.3390/electronics12153298
Submission received: 26 June 2023 / Revised: 26 July 2023 / Accepted: 30 July 2023 / Published: 31 July 2023

Round 1

Reviewer 1 Report

Research progress of neural synapses based on memristor

 

Judgement: Accept after Minor Revision

 

Summary: In this work, the authors provide their perspective on synaptic implementations using 2-terminal memristors. This article should be classified as a perspective rather than a review.

 

Comments: The authors should take into account the following comments before publication:

 

1.    The authors should briefly describe the relevance of each sub-section (e.g. 2.1, 3.1, etc) under sections 2 and 3, from the perspective of in-memory computing or/and brain-inspired neuromorphic computing systems.

 

2.    A brief description on 3-terminal memristive configurations e.g. memtransistors would be good to add. Some relevant references include

https://doi.org/10.1002/adma.201800220, https://doi.org/10.1038/s41467-020-16985-0.

 

3.    Higher order neuromorphic learning deserves a brief discussion in my opinion. Some  relevant references include https://doi.org/10.1038/s41586-020-2735-5, DOI: 10.1126/sciadv.ade0072.

Author Response

Thank you for your positive comments, and we would like to improve the manuscript as per the suggestion.

1、The authors should briefly describe the relevance of each sub-section (e.g. 2.1, 3.1, etc) under sections 2 and 3, from the perspective of in-memory computing or/and brain-inspired neuromorphic computing systems.

Response: Thank you very much for your advice. The following content has been added to the end of section 2.

A digital memristor is used to construct a neural synapse array to realize the Spiking Neural Network (SNN). The synapse weight in SNN can be positive, negative, or zero. The synapse weight in sections 2.1 can only achieve positive and zero, while sections 2.2, 2.3, and 2.4 can reach positive, negative, and zero.

The following content has been added to the end of section 3.

When using analog memristors to realize brain-inspired neural computing systems, it is necessary to make the functions of artificial synapses highly consistent with that of actual brain synapses. In Section 3.1, we discuss the basic functions of brain synapses that can be replicated by artificial synapses, while Sections 3.2, 3.3, and 3.4 cover advanced functions.

2、A brief description on 3-terminal memristive configurations, e.g. memtransistors would be good to add. Some relevant references includehttps://doi.org/10.1002/adma.201800220, https://doi.org/10.1038/s41467-020-16985-0.

Response: Thank you very much for your references. The following content has been added to Introduction.

Regarding physical structure, according to the number of memristor terminals, it can be divided into two-terminal memristors and three-terminal memristors. Compared with the two-terminal memristor, the three-terminal memristor has an additional modulation port, and the two-terminal memristor has a higher similarity with the biological synapse.

 

3、Higher order neuromorphic learning deserves a brief discussion in my opinion(. Some  relevant references include https://doi.org/10.1038/s41586-020-2735-5, DOI: 10.1126/sciadv.ade0072.

Response: Thank you very much for your references. The following content has been added to Outlook.

Currently, most hardware approaches to neuromorphic artificial intelligence rely on first-order memristors to simulate biological functions. While low-level memristors can simulate primitive low-level biological complexity, higher-order memristors can more faithfully simulate neuronal and synaptic functions. Presently, there have been some reports on the use of second-order or third-order memristors to build neural networks. This higher-order memristor neural network can leverage the inherent characteristics of the equipment to achieve more complex higher-order biological factors without requiring complex circuits. As a result, it promotes the progress of building extraordinarily compact and powerful neural morphological computing.

Author Response File: Author Response.pdf

Reviewer 2 Report

The review article is well-written and covers most artificial synapse features based on ReRAM.

Before publication, there are a few suggestions. 

1. Authors may compare the ReRAM-based artificial synapse with another memory-based synapse.

2. The main contribution of the authors is missing. 

3. What kind of synapse features are possible through digital synapses?

4. There are a few type mistakes in the manuscript. e.g in the introduction, LoT may be IoT. 

 

Author Response

Thank you for your positive comments, and we would like to improve the manuscript as suggested.

1、Authors may compare the ReRAM-based artificial synapse with another memory-based synapse.

Response: Thank you very much for your valuable comments on this paper. I added relevant content to the Discussions.

New memory devices, such as resistive random access memory (ReRAM), Phase Change Memory (PCM), Ferroelectric Field-Effect Transistor (FET), and Magnetoresistive random-access memory (MRAM), can be used to build synapses. Each device has its advantages and disadvantages. Depending on the specific application requirements, one type of device may outperform others. Taking MRAM as an example, it boasts a theoretically permanent lifespan, but it faces challenges related to low switch ratio and large size. On the other hand, the ReRAM offers compatibility with CMOS technology, low power consumption, and analog conductivity modulation. Its most significant advantage is its resemblance to biological synapses on the physical level, making it one of the best choices for constructing neural synapses. However, some issues need to be addressed.

2、The main contribution of the authors is missing. 

Response: Author Contributions are in section 6.

3、What kind of synapse features are possible through digital synapses?

Response: Thank you very much for your question. The digital synapse of the memristor is primarily used to realize the storable function of synaptic weight, which remains unchanged even after power failure. Moreover, applying a voltage exceeding the threshold can also modify the synaptic weight.

4、There are a few type mistakes in the manuscript. e.g in the introduction, LoT may be IoT. 

Response: Thank you for pointing it out; I have corrected it.

Author Response File: Author Response.pdf

Reviewer 3 Report

The review is a good work and represents a quite exhaustive article that the reader can exploit to have a fair point of view on the topic. I have some comments:

 

1) The bibliography could be extended. I think that there is more literature on the topic

2) There are many misprints that should be corrected.

3) I would suggest to skip acronyms in figure captions, headings, and sub-headngs.

4) I would add a first figure that include the most significant neural synapses based on memristors.

5) I would add a table with the performances of the most significant memristors mentioned in the review.

Author Response

Thank you for your positive comments, and we would like to improve the manuscript as suggested.

1) The bibliography could be extended. I think that there is more literature on the topic

Response: Thanks for your suggestion; 19 references have been added.

2) There are many misprints that should be corrected.

Response: Sorry for my negligence. I have carefully reviewed the manuscript.

3) I would suggest to skip acronyms in figure captions, headings, and sub-headngs.

Response: Thank you very much for your suggestion, and I have corrected it.

4) I would add a first figure that include the most significant neural synapses based on memristors.

Response: Thank you very much for your suggestion. The graphical abstract represents a significant comparison diagram between biological synapses and synapses based on memristors. Additionally, the manuscript includes discussions on several memristor-based synapses.

5) I would add a table with the performances of the most significant memristors mentioned in the review.

Response: Thank you very much for your valuable comments on this paper. I have added a table in section 3.5. Table please see the attachment.

Author Response File: Author Response.pdf

Reviewer 4 Report

This is a review paper that describes the state of the art of artificial synapses implemented using memristors. Overall I find the paper interesting and well written. I have few of minor concerns:

- Memristors have a limited endurance, that means their characteristics change (degrade) with the number of writing operations performed. This is an important topic often completely overlooked by papers on memristors. Are there works in literature that address this issue in regards of this application (artifical synapses)? If yes please include them in the review.

- In sections 2.2, 2.3 and 2.4 please state how those circuits are affected by sneak path currents.

In the following there are a couple of grammatical errors that I have detected.

- Section 2.4, beginning. "Chen et al. designed a synaptic circuit composed of two memristors and three transistors[24], as shown in Figure 4." -> It seems to me that there are 3 memristors and 2 transistors instead.

- Section 2.5 "conducive" -> conductive

The english is mostly fine, like many non native english speakers the authors use often the verb "to realize", but in English it normally has a different meaning, so it is better to use a synonymous, like "to implement".

Author Response

Thank you for your positive comments, and we would like to improve the manuscript as suggested.

1、Memristors have a limited endurance, that means their characteristics change (degrade) with the number of writing operations performed. This is an important topic often completely overlooked by papers on memristors. Are there works in literature that address this issue in regards of this application (artifical synapses)? If yes please include them in the review.

Response: Thank you for your positive comments, and we would like to improve the manuscript as the suggestion. Relevant content has been added to section 4.4.

The practical large-scale application of the memristor is affected by its endurance, which is worse than that of traditional COMS devices. Based on existing literature, the endurance of a memristor depends on its material, ranging from 10 to 1x106 cycles, with exceptional performance achieving up to 1x109 cycles [117]. For instance, Huang et al. reported the anisotropic resistive switching in quasi-two-dimensional (2D) κ-(BEDT-TTF)2Cu[N(CN)2]Cl electronic memristors with an endurance of 1.24×104 cycles [118]. Kumar et al. analyzed micrometer-scale titanium-niobium-oxide prototype memristors, exhibiting high endurance with over a million cycles[119]. Yang et al. outlined criteria to consider when selecting materials for high endurance and reported the Ta oxide memristor with an endurance of 1.2×1010 cycles [120]. Apart from materials and processes, electrical stress created by interfacing peripheral circuits also impacts endurance. Strukov developed a model that relates the tradeoff between endurance and writing time in nonvolatile memories[121]. Ravi and Prabaharan proposed a new technique by designing a fault-tolerant adaptable write scheme that can adapt based on the behavior and switching faults[122]. In the domain of neuromorphic computing, memristors offer high-density and low-power synaptic storage for SNN using hardware crossbar arrays. Titirsha proposed a new method to enhance lifetime by considering the endurance differences in each crossbar when mapping machine learning tasks[123]. This ensures that synapses with greater activation are always placed on memristors with greater endurance and vice versa, thereby enhancing the overall SNN's endurance.

2、In sections 2.2, 2.3 and 2.4 please state how those circuits are affected by sneak path currents.

Response: Thank you very much for your question. When using the 2M2R synapse and 4M synapse individually, they are not affected by sneak paths. However, it becomes susceptible to sneaking current when constructing a synaptic array, and a single unit lacks single-phase conducting devices. During the reading/writing of the memristor's resistance, current tends to flow through the memristor with low resistance, leading to cross-talk issues. A single-phase conducting device allows for control over its opening and closing, ensuring that the current only flows through the intended unit. In Section 2.4, the synaptic circuit contains a transistor, making it immune to the effects of sneaking current.

 

3、In the following there are a couple of grammatical errors that I have detected.

- Section 2.4, beginning. "Chen et al. designed a synaptic circuit composed of two memristors and three transistors[24], as shown in Figure 4." -> It seems to me that there are 3 memristors and 2 transistors instead.

Response: Sorry for my negligence. I have corrected it.

- Section 2.5 "conducive" -> conductive

Response: I'm sorry for my ambiguous expression. Conducive is similar to profit.

Author Response File: Author Response.pdf

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