Next Article in Journal
Asynchronous Anti-Bias Track-to-Track Association Algorithm Based on Nearest Neighbor Interval Average Distance for Multi-Sensor Tracking Systems
Previous Article in Journal
Dual-Arm Cluster Tool Scheduling for Reentrant Wafer Flows
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Compact Single-Unit Two-Bit Reflection-Type Phase Shifters with Large Phase Shift Range

College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(11), 2412; https://doi.org/10.3390/electronics12112412
Submission received: 27 April 2023 / Revised: 14 May 2023 / Accepted: 19 May 2023 / Published: 26 May 2023
(This article belongs to the Section Microwave and Wireless Communications)

Abstract

:
Multi-bit phase shifters are typically implemented by cascading multiple phase-shifting units, therefore incurring large dimensions and higher insertion losses. This paper presents highly compact single-unit two-bit reflection-type phase shifters (SUTBRTPSs), with large phase shifts range and lower insertion loss by using only one 3-dB hybrid coupler, unlike traditional multi-bit reflection-type phase shifters. To achieve this, two identical dual-voltage controlled reactance blocks (DVCRBs) are loaded to the 3-dB hybrid directional coupler at through and coupled ports, and 04 states of phase shifts are obtained between the input and isolated ports. Each DVCRB consists of 03 open-circuited transmission lines and switching p-i-n diodes and provides half of the required susceptance to achieve the desired phase shifts. Design theory is presented in detail, and for validation and demonstration, two typical SUTBRTPSs (0°/45°/90°/135° and 0°/22.5°/180°/202.5°) are designed, fabricated and measured. Being implemented in a single-unit structure, the proposed method yields highly compact dimensions of 0.44 λg × 0.46 λg and 0.54 λg × 0.46 λg, respectively. The simulation and measurements results are in good agreement and indicate maximum insertion losses of 1.7 and 2.1 dB with a return loss better than 20 dB and phase error of less than 1.5°.

1. Introduction

Modern phase array systems are heavily reliant on phase shifters for adaptive beam forming and steering. They are utilized in both the transmit and receive path, to provide the necessary insertion phase to the antenna elements of the array. A large number of phase shifters are employed to realize a single system, as continuous and fast beam scanning in both azimuth and elevation is required along with adaptive main lobe and null placements. Therefore, considerable efforts have been made to: (1) reduce the size of the phase shifters, as the number of antenna elements in a typical antenna array is large, and the available space is limited; (2) achieve a lower insertion loss, as the transmit power and noise figure of the phased array is directly affected by the loss of the phase shifter; and (3) achieve a minimum phase variation and larger operating bandwidths, as the beam forming accuracy is highly dependent on the phase shift accuracy [1].
The literature reports various topologies of phase shifters Including both active [2] and passive designs [3]. Active phase shifters are design in conjunction with amplifiers and provide continuous variation of phase; however, they consume a large amount of DC power and have complex circuitry. On the other hand, passive phase shifters have low power consumption, high linearity and are inherently bi-directional in nature, thus offering significant advantages compared to active designs [4]. The most commonly used passive phase shifters are switched-type [5,6], loaded-line-type [7,8] and Reflection-Type Phase shifters (RTPS) [9,10,11]. However, an N-bit phase shifter is traditionally implemented by cascading multiple 1-bit structures, which not only leads to larger dimensions but also incurs higher insertion loss and accumulated phase errors.
In conventional switched-line multi-bit phase shifters, delay lines of varying lengths occupy a large area. In addition, the insertion loss is higher due to the high number of single-pole double-throw (SP2T) switches used, which are connected in-line to the transmission lines. The switches are generally made up of p-i-n diodes, metal semiconductor field effect transistors (MESFETs) or high-electron-mobility transistors (HEMTs). To reduce the losses, solutions employing SP2T and single-pole four-throw (SP4T) switches [12,13] based on microelectromechanical system (MEMS) technology have been reported. However, the size, endurance rating and low switching speeds of the MEMS switches are still considered as key limitations in their practical deployment.
Multi-bit loaded-line and distributed phase shifters have a large footprint because the phase-shifting elements (open or short-circuited stubs) need to be spaced apart by a quarter-wavelength [14,15] on a transmission line. In addition, the phase shift range is limited, and they are not commonly used when the required phase shift is more than 45°. As a good alternative, RTPS [16,17] offers good input/output matching with simple control and large phase tuning ranges. They are usually constructed using a four-port coupler (usually the 3-dB branch line coupler) and two identical tunable reflective loads (commonly a varactor diode) to achieve the desired phase shifts. RTPS solutions does not offer much flexibility in terms of dimensions, as the bulky 3-dB coupler requires a large area. This becomes especially critical in multi-bit RTPS implementations [18,19]. Furthermore, the bandwidth of the RTPS is dependent on the characteristics of the 3-dB coupler, and the reflective loads and traditional implementations offer limited bandwidths. Lumped elements couplers [20] have been used to reduce the size, but they suffer from even narrower bandwidths. Coupled-line couplers [21] have been used to enhance the bandwidths, but they require very small gaps between the coupled strips, which are difficult to fabricate using standard PCB fabrication process. Foregone in view, it is therefore relevant to investigate multi-bit phase shifters from the view point of dimensions while achieving a lower insertion loss and good phase accuracy.
The novel concept of single-unit multi-bit phase shifters was presented by the authors using the inverted-E topology [22]. A single Main Transmission Line (MTL) was loaded with multiple pair of three open-circuited stubs to achieve the desired phase shifts. A highly compact single-unit 3-bit phase shifter with lower insertion loss was presented and demonstrated; however, the phase shift range was limited up to 90° due to the band-stop effect generated by the loaded open-circuited stubs.
To enhance the phase shift range up to 180° and beyond, while maintaining compact dimensions using a single-unit structure, this work presents single-unit two-bit reflection-type phase shifters (SUTBRTPSs). Unlike the traditional multi-bit RTPS solutions, herein, only one 3-dB hybrid coupler is utilized to achieve two-phase shift bits, as shown in Figure 1. The simple geometry comprises a quarter-wavelength 3-dB branch line coupler and two identical dual-voltage controlled reactance blocks (DVCRBs), each with an input susceptance of Y, loaded to the through and coupled ports of the coupler. Each DVCRB comprises three open-ended transmission lines and switching p-i-n diodes. The open-circuited transmission lines provide the needed susceptance to achieve half of the desired phase shift. When individual stubs of the two DVCRBS are loaded simultaneously using a single control voltage, the combined loaded susceptance generates the required phase shift between the input and isolated port of the coupler. The proposed SUTBRTPS offers several advantageous features such as highly compact dimensions, lower insertion loss, large phase shift range and good phase accuracy. Additionally, they can be easily fabricated using standard PCB fabrication technology.

2. Design Methodology

Figure 2a shows the circuit configuration of the proposed SUTBRTPS. It comprises a typical quarter-wavelength 3-dB branch line coupler, with Z2 = Z0 and Z 1 = Z 0 / 2 , where Z0 is the input/output port impedance. Each DVCRB consists of three open-ended transmission lines, with the following characteristics: impedance of Z0 = 50Ω and electrical lengths of θ 1 , θ 2 and θ 3 , respectively. The two identical DVCRBs are selectively loaded to the 3-dB coupler using two control voltages, VC1 and VC2. Each DVCRB provides the needed susceptance to generate half of the required phase shift and is equivalent to an open-circuited transmission line, with the following characteristics: impedance of Z0 and electrical length of φ = θ e / 2 , as shown in Figure 2b; here, θ e is the required electrical length corresponding to a desired phase state.
To explain the design methodology, let us represent the phase shifts bits of the SUTBRTPS as φ1 and φ2. When control voltages VC1 and VC2 are both zero, the input susceptance of the loaded DVCRBs is infinity, and the circuit is in its OFF state. This state can be represented by φ 00 , and the equivalent electrical length for the open-circuited condition is:
θ e = 0
When control voltage VC1 is applied, the transmission line, labeled as TL1, having a characteristics impedance of Z0 and electrical length of θ 1 , is loaded to the coupler. The phase state can be represented as φ 01 , and the desired phase shift, equivalent to the electrical length of the TL1 is generated as:
θ 1 = θ e 01 = φ 1 / 2
When control voltage VC2 is applied, the transmission line, labeled as TL2, having a characteristics impedance of Z0 and electrical length of θ 2 , is loaded to the coupler. The phase state can be represented as φ 10 , and a phase shift equivalent to the electrical of TL2 is generated as:
θ 2 = θ e 10 = φ 2 / 2
Finally, when both the control voltages VC1 and VC2 are simultaneously applied, the circuit is equivalent to the parallel combination of two open-circuited transmission lines having electrical lengths of θ 2 + θ 3 and θ 1 , respectively. The phase state can be represented as φ 11 , and the combined loaded susceptance generates a phase shift equal to:
θ e 11 = φ 1 2 + φ 2 2
The required electrical lengths of θ 1 and θ 2 can be easily computed according to the required phase shifts bits values. To compute the required electrical length θ 3 , as shown in Figure 2b, the input susceptance of TL1 can be written as:
Y i n 1 = 1 j Z 0 cot θ 1
Likewise, the series circuit of TL2 and TL3 is equivalent to an open-circuit transmission line with an electrical length equal to θ 2 + θ 3 , and its input susceptance can be written as:
Y i n 2 = 1 j Z 0 cot ( θ 2 + θ 3 )
Considering the equalization in loaded susceptance at the loaded port
Y = Y i n 1 + Y i n 2 = 1 j Z 0 cot θ 1 1 j Z 0 cot ( θ 2 + θ 3 ) = 1 j Z 0 cot φ 11 2
By solving (7), we obtain
tan θ 1 + tan ( θ 2 + θ 3 ) = tan φ 11 2
Consequently, the electrical length θ 3 can be calculated as
θ 3 = arctan ( tan φ 11 2 tan θ 1 ) θ 2
To validate the proposed design theory, here, we take the example of two typical SUTBRTPSs with φ 1 = 45°, φ 2 = 90° and φ 1 = 22.5°, φ 2 = 180°, respectively, at 1 GHz. The four phase states are 0/45°/90°/135° and 0/22.5°/180°/202.5°, respectively. The required phase shifts of each phase state are listed below
φ 00 = 0 ; φ 01 2 = 22.5 , φ 10 2 = 45 ; φ 11 2 = 67.5
Subsequently, the required electrical lengths for each phase state can be computed using Equations (2), (3) and (8) and are given below
φ 00 = 0 ; θ 1 = 22.5 , θ 2 = 45 ; θ 3 = 18.4
If the theoretical value of the electrical length is computed to a negative value, the electrical length value should be redefined according to the periodicity of the trigonometric function.
Similarly, with φ 1 = 22.5° and φ 2 = 180°, the required phase shifts of each phase state are
φ 00 = 0 ; φ 01 2 = 11.25 , φ 10 2 = 90 ; φ 11 2 = 101.25
The required parameter values at 1 GHz are then computed as
φ 00 = 0 ; θ 1 = 11.25 , θ 2 = 90 ; θ 3 = 10.8

3. Simulations, Fabrication and Measurements

For validation of the proposed theory, full-wave momentum simulations were carried out using Agilent Advance Design System (ADS). The effects of the switching p-i-n diodes on the phase shift was compensated by fine-tuning the electrical lengths of the transmission lines using the manufacturer-provided data. For demonstration, the proposed SUTBRTPSs (45°/90° and 22.5°/180°), centered at 1 GHz, are fabricated on Rogers 4003C substrate, with a dielectric constant of 3.55 and thickness of 0.508mm. P-i-n diodes (model # SMP1331-087LF from Skyworks) having a junction capacitance of 0.27 pF and a minimum resistance of 2.7 Ω in forward-biased conditions are utilized for switching. The optimized layout of the proposed SUTBRTPS is given in Figure 3, and the synthesized parameter values are listed in Table 1.
The photographs of the two fabricated designs are shown in Figure 4a,b, respectively. Herein, inductors L1 and L2 (100 nH) are used to ground the overall circuit, whereas R1 = 1 KΩ is a current-limiting resistor used to bias the diodes, whereas the capacitor, C1 = 100 pF, is used to isolate DC from the RF signal. A control voltage of 0/3 V is used to put the diodes in forward- and reversed-biased conditions.
The overall dimensions of the fabricated designs, including the SMA connectors, are 0.44   λ g × 0.46   λ g and 0.54   λ g × 0.46   λ g , respectively, which are significantly smaller compared to traditional multi-bit RTPS solutions using multiple cascaded phase-shifting units. Moreover, being the main contributing factor to the overall size of the proposed SUTBRTPS, the size of the 3-dB hybrid coupler can be further reduced by using meandered/folded lines. Likewise, the transmission lines of the DVCRBs can also be used in a folded configuration.
To validate the performance of the fabricated designs, two port S-parameters measurements were performed using a network analyzer (Model # N5235A from Keysight). A comparison between the simulated and measured magnitude and phase response of the 45°/90° SUTBRTPS is shown in Figure 5 and Figure 6, respectively.
As shown in Figure 5a–d, the measured return loss at the center frequency of 1 GHz is better than 20 dB for all four phase states, whereas the maximum insertion loss of 1.7 dB is measured for phase state 11. It is important to note that for state 11, all the six p-i-n diodes are in forward-biased condition, and the two DVCRBSs are fully loaded to the coupler. The insertion losses for phase states 00, 01 and 10 are 0.19 dB, 1.2 dB and 1.3 dB, respectively. The amplitude variation is less than 0.5 dB in the operating frequency band.
As depicted in Figure 6, the measured phase shifts at the center frequency are 44.7°, 89.6° and 133.9°, respectively. The maximum phase shift error of 1.1° is observed for phase state 11. The achieved phase shift is accurate at the center frequency; however, the phase variation vs. frequency is observed to be on the higher side but still similar to that achieved through traditional 1-bit RTPS solutions. The phase response of the RTPSs is mainly attributed to the frequency performance of the coupler and the loaded reactance. Being inherently narrow band in nature, the phase flatness using the traditional 3-dB quarter-wave coupler is poor. To circumvent this problem, coupled-line couplers and Lange couplers may be investigated as possible solutions, at the expense of circuit complexity. It is also pertinent to note that phase measurements are more prone to fabrication tolerances and measurement inaccuracies.
The magnitude and phase shift response of the 22.5°/180° SUTBRTPS are shown in Figure 7 and Figure 8, respectively.
It can be seen from Figure 7 that the measured return loss is better than 20 dB for all phase states, and the maximum measured insertion loss of 2.1 dB is observed for phase state 11. However, for phase states 00, 01 and 10, the measured insertion losses are 0.19 dB, 1.3 dB and 1.2 dB, respectively. The amplitude variation across the frequency band is less than 0.7 dB.
As depicted in Figure 8, the measured phase shifts at the center frequency are 22.6°, 180.8° and 203.3°, respectively. The maximum phase error, at center frequency, of 0.7° is observed for phase state 11. Moreover, a slight mismatch is observed for larger phase states 10 and 11, which can be attributed to the requirement of higher susceptance values, requiring the use of longer transmission lines, which results in higher slopes of susceptance curves.
The measured results are consistent with the simulation results and validate the design theory. A very good magnitude response is observed with a lower insertion ranging from 0.2 to 2.1 dB and a minimum amplitude variation across the design frequency band. In addition, accurate phase shift is achieved at the center frequency; however, the phase flatness is similar to that of typical RTPS solutions, with a narrow operating bandwidth of 40 MHz. This is mainly attributed to the frequency characteristics of the coupler and the loaded reactance blocks. To enhance the bandwidths of the proposed SUTBRTPS, a coupled-line coupler may provide a possible solution.
The main advantage offered by the proposed design is compact dimensions, as only one hybrid coupler is used instead of multiple cascaded structures of the traditional multi-bit RTPS solutions. In addition, a lower insertion loss with a large phase shift range of 180° is achieved.
In order to further reduce the size of the proposed SUTBRTPS, folded and meandered lines can be used instead of uniform transmission lines, as shown in Figure 9. The size of the proposed model using meandered lines for the 45°/90° SUTBRTPS is 0.24   λ g × 0.26   λ g , which corresponds to almost 50% size reduction compared to the circuits shown in Figure 4. Although the design is not fabricated and measured, the circuit model is optimized, and full wave momentum simulations were carried out to compare the results with those achieved by the fabricated designs. As shown in Figure 10, the return loss is better than 10 dB in the whole operating band, and the phase shifts at the center frequency are 44.6°, 89.7° and 134.2°, respectively.
Finally, Table 2 presents a comparison between the proposed SUTBRTPSs and other state-of-the-art solutions. In comparison to the loaded-line phase shifters, the dimensions are many times smaller, and the phase shift range is larger, whereas for 45° and 90° phase shifts, the insertion loss is comparable.
Compared with the switched-type multi-bit phase shifters, compact dimensions and lower insertion losses are observed. A high-pass/low-pass configuration [23] has larger dimensions, as multiple filter sections are employed, and requires four diodes per bit; hence, the insertion loss is higher. In comparison to the multi-bit RTPS solutions, the proposed SUTBRTPS achieves much smaller sizes as only one 3-dB hybrid coupler is used, whereas the insertion loss is also lower. Accurate phase shift is observed at the center frequency; however, the operating bandwidth is narrow, and the phase variation is high; however, the reported bandwidth [18] is 25 MHz, and the phase error and variation in [16] is greater than 3° and 7°, albeit over a wider operating frequency band. It can therefore be concluded that with traditional quarter-wavelength couplers, the operating bandwidth of the RTPSs is narrow, and the phase variation is high. Similarly, compared to our previous work, the circuit geometry is sufficiently succinct as the number of stubs and switches are significantly reduced; moreover, a larger phase shift range has been achieved.

4. Conclusions

Compact and low-loss single-unit two-bit reflection-type phase shifters (SUTBRTPSs) are presented, wherein only one 3-dB hybrid coupler is loaded with two identical dual-voltage controlled reactance blocks (DVCRBS). Each DCVRB comprises three open-circuited transmission lines and switching p-i-n diodes. For validation, two typical 45°/90° and 22.5°/180° SUTBRTPSs are designed and fabricated, and a good agreement has been observed with the simulation results. Highly compact circuit dimensions are realized, as only one hybrid coupler is used instead of multiple cascaded structures. Moreover, size can be further reduced by using meander lines. Measurement results indicate average insertion losses of 1.09 and 1.19 dB, respectively, with a return loss better than 20 dB and large phase shift ranges of more than 180°. The design is a promising candidate to be used in large-scale phase array systems due to its compact size, and it can be further expanded for 3-bit-and-above implementations.

Author Contributions

Conceptualization, F.A. and Y.L.; methodology, F.A. and L.L.; software, F.A.; validation, F.A. and L.L.; writing—original draft preparation, F.A.; writing—review and editing, F.A.; supervision, Y.Z.; project administration, Y.L.; funding acquisition, Y.L. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Natural Science Foundation of China under grant 62071228.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

References

  1. Zhao, D.; Gu, P.; Zhong, J.; Peng, N.; Yang, M.; Yi, Y.; Zhang, J.; He, P.; Chai, Y.; Chen, Z.; et al. Millimeter-Wave Integrated Phased Arrays. IEEE Trans. Circuits Syst. I Reg. Papers 2021, 68, 3977–3990. [Google Scholar] [CrossRef]
  2. Xiong, Y.; Zeng, X.; Li, J. A Frequency-Reconfigurable CMOS Active Phase Shifter for 5G mm-Wave Applications. IEEE Trans. Circuits Syst. II Express Briefs 2019, 67, 1824–1828. [Google Scholar] [CrossRef]
  3. Bhonkar, A.A. Overview of microstrip line phase shifter. Int. J. Adv. Res. Comput. Commun. Eng. 2016, 5, 465–469. [Google Scholar]
  4. Li, Y.; Duan, Z.; Fang, Y.; Li, X.; Deng, B.; Dai, Y.; Sun, L.; Gao, H. A 32–40 GHz 7-bit Bi-Directional Phase Shifter with 0.36 dB/1.6º RMS Magnitude/Phase Errors for Phased Array Systems. IEEE Trans. Circuits Syst. I Reg. Papers 2022, 69, 4000–4013. [Google Scholar] [CrossRef]
  5. Lynes, G.D.; Johnson, G.E.; Huckleberry, B.E.; Forrest, N.H. Design of broadband 4-bit loaded switched-line phase shifters. IEEE Trans. Microw. Theory Tech. 1994, 22, 693–697. [Google Scholar] [CrossRef]
  6. Anand, P.; Sharma, S.; Sood, D.; Tripathi, C.C. Design of compact reconfigurable switched line microstrip phase shifters for phased array antenna. In Proceedings of the 2012 1st International Conference on Emerging Technology Trends in Electronics, Communication & Networking, Surat, India, 19–21 December 2012; pp. 1–3. [Google Scholar]
  7. Tang, X.; Mouthaan, K. Loaded-line phase shifter with enlarged phase shift range and bandwidth. In Proceedings of the 40th European Microwave Conference, Paris, France, 28–30 September 2010. [Google Scholar]
  8. Tang, X. Dual-band Class III loaded-line phase shifters. In Proceedings of the Asia-Pacific Microwave Conference, Yokohama, Japan, 7–10 December 2010; pp. 1731–1734. [Google Scholar]
  9. Burdin, F. Design of compact reflection-type phase shifters with high figure-of-merit. IEEE Trans. Microw. Theory Tech. 2015, 63, 1883–1893. [Google Scholar] [CrossRef]
  10. Abbosh, A.M. Compact tunable reflection phase shifters using short section of coupled lines. IEEE Trans. Microw. Theory Tech. 2012, 55, 2465–2472. [Google Scholar] [CrossRef]
  11. Sun, K.-O.; Kim, K.J.; Yen, C.-C.; van der Weide, D. A Scalable Reflection Type Phase Shifter with Large Phase Variation. IEEE Microw. Wirel. Compon.Lett. 2005, 15, 647–648. [Google Scholar] [CrossRef]
  12. Gong, S.; Shen, H.; Barker, N.S. A 60-GHz 2-bit Switched-Line Phase Shifter Using SP4T RF-MEMS Switches. IEEE Trans. Microw. Theory Tech. 2011, 59, 894–900. [Google Scholar] [CrossRef]
  13. Tan, G.L.; Mihailovich, R.E.; Hacker, J.B.; DeNatale, J.F.; Rebeiz, G.M. A Very-Low-Loss 2-Bit X-Band RF MEMS Phase Shifter. In Proceedings of the 2002 IEEE MTT-S International Microwave Symposium Digest (Cat. No. 02CH37278), Seattle, WA, USA, 2–7 June 2002. [Google Scholar]
  14. Komisarezuk, J. Four bit phase shifter for the L band. In Proceedings of the 12th International Conference on Microwaves and Radar (MIKON), Krakow, Poland, 20–22 May 1998; Volume 2, pp. 590–594. [Google Scholar]
  15. Hayden, J.S.; Rebeiz, G.M. 2-Bit MEMS Distributed X-Band Phase Shifters. IEEE Microw. Guided Wave Lett. 2000, 10, 540–542. [Google Scholar] [CrossRef] [PubMed]
  16. Miyaguchi, K.; Hieda, M.; Nakahara, K.; Kurusu, H.; Nii, M.; Kasahara, M.; Takagi, T.; Urasaki, S. An Ultra-Broad-Band Reflection-Type Phase-Shifter MMIC with Series and Parallel LC Circuits. IEEE Trans. Microw. Theory Tech. 2001, 49, 2446–2452. [Google Scholar] [CrossRef]
  17. Guan, C.-E.; Kanaya, H. 360° Phase Shifter Design Using Dual-Branch Switching Network. IEEE Microw. Wirel. Compon. Lett. 2018, 28, 675–677. [Google Scholar] [CrossRef]
  18. Trinh, K.T.; Feng, J.; Shehab, S.H.; Karmakar, K.N. 1.4 GHz Low-Cost PIN Diode Phase Shifter for L-Band Radiometer Antenna. IEEE Access 2019, 7, 95274–95284. [Google Scholar] [CrossRef]
  19. Boire, D.C.; Onge, G.S.; Barratt, C.; Norris, G.; Moysenko, A. 4:1 bandwidth digital five bit MMIC phase shifters. In Proceedings of the Digest of Papers, Microwave and Millimeter-Wave Monolithic Circuits Symposium, Long Beach, CA, USA, 12–13 June 1989; pp. 69–73. [Google Scholar]
  20. Ellinger, F.; Vogt, R.; Bächtold, W. Compact reflective-type phase shifter MMIC for C-band using a lumped-element coupler. IEEE Trans. Microw. Theory Tech. 2001, 49, 913–917. [Google Scholar] [CrossRef]
  21. Sun, K.-O.; Ho, S.-J.; Yen, C.-C.; van der Weide, D. A Compact Branch-Line Coupler Using Discontinuous Microstrip Lines. IEEE Microw. Wireless Comp. Lett. 2005, 15, 519–520. [Google Scholar] [CrossRef]
  22. Amin, F.; Liu, Y.; Zhao, Y.; Hu, S. Compact and Low-loss phase shifters and multi-bit phase shifters based on the inverted-E topology. IEEE Trans. Microw. Theory Tech. 2021, 69, 2120–2129. [Google Scholar] [CrossRef]
  23. Qureshi, M.T.; Desmaris, V.; Geurts, M.; van de Sluis, J. Passive Reciprocal High-Pass/Low-Pass 4-Bit Phase Shifter at 2.45 GHz. In Proceedings of the 44th European Microwave Conference, Rome, Italy, 6–9 October 2014. [Google Scholar]
Figure 1. Block diagram of the proposed SUTBRTPS.
Figure 1. Block diagram of the proposed SUTBRTPS.
Electronics 12 02412 g001
Figure 2. (a) Detailed block diagram of the proposed SUTBRTPS. (b) Equivalent circuit model of DVCRB.
Figure 2. (a) Detailed block diagram of the proposed SUTBRTPS. (b) Equivalent circuit model of DVCRB.
Electronics 12 02412 g002aElectronics 12 02412 g002b
Figure 3. Finalized layout of the proposed SUTBRTPS.
Figure 3. Finalized layout of the proposed SUTBRTPS.
Electronics 12 02412 g003
Figure 4. Photographs of the fabricated circuits. (a) 45°/90° SUTBRTPS. (b) 22.5°/180°. SUTBRTPS.
Figure 4. Photographs of the fabricated circuits. (a) 45°/90° SUTBRTPS. (b) 22.5°/180°. SUTBRTPS.
Electronics 12 02412 g004
Figure 5. (ad) Measured (solid lines) and simulated (dotted lines) magnitude response of the fabricated 45°/90° SUTBRTPS.
Figure 5. (ad) Measured (solid lines) and simulated (dotted lines) magnitude response of the fabricated 45°/90° SUTBRTPS.
Electronics 12 02412 g005
Figure 6. Measured (solid lines) and simulated (dotted lines) phase response of the fabricated 45°/90°. SUTBRTPS.
Figure 6. Measured (solid lines) and simulated (dotted lines) phase response of the fabricated 45°/90°. SUTBRTPS.
Electronics 12 02412 g006
Figure 7. (ad) Measured (solid lines) and simulated (dotted lines) magnitude response of the fabricated 22.5°/180° SUTBRTPS.
Figure 7. (ad) Measured (solid lines) and simulated (dotted lines) magnitude response of the fabricated 22.5°/180° SUTBRTPS.
Electronics 12 02412 g007
Figure 8. Measured (solid lines) and simulated (dotted lines) phase response of the fabricated 22.5°/180° SUTBRTPS.
Figure 8. Measured (solid lines) and simulated (dotted lines) phase response of the fabricated 22.5°/180° SUTBRTPS.
Electronics 12 02412 g008
Figure 9. Proposed layout using meandered/folded lines for size reduction of 45°/90° SUTBRTPS.
Figure 9. Proposed layout using meandered/folded lines for size reduction of 45°/90° SUTBRTPS.
Electronics 12 02412 g009
Figure 10. Simulated results of the proposed design using folded lines. (a) Return loss. (b) Phase shift response.
Figure 10. Simulated results of the proposed design using folded lines. (a) Return loss. (b) Phase shift response.
Electronics 12 02412 g010
Table 1. Synthesized parameters values of the proposed SUTBRTPS (units are in mm).
Table 1. Synthesized parameters values of the proposed SUTBRTPS (units are in mm).
PrototypeW0L0W1L1W2/W3L2L3L4L5
45°/90°1.118.461.8645.31.143.9812.6221.99.9
22.5°/180°5.722.984.5
Table 2. Comparison of the proposed SUBTBRTPS with other state-of-the-art designs.
Table 2. Comparison of the proposed SUBTBRTPS with other state-of-the-art designs.
Refs.Topology/StructureFrequency BandPhase Shift BitsRL/IL (dB)No. of ElementsSize (λg × λg)
[7]1-bit Loaded line0.8–1.2 GHz45/9014/0.5
10/1.3
6 stubs,
3 switches
3.8 × 3.6
3.2 × 3.2
[12]4-bit Switched type/cascaded50–75 GHz0/90/180/270>20/2.54 TL, 2 SP4T switches1.5 × 1.5
[16]1-bit RTPSDC-25 GHz90/180--/3.7One coupler,
two refelctive loads
N/A
[18]4-bit RTPS/cascaded1.37–1.43 GHz22.5/45/90/18016/2.34 couplers,
8 diodes
# 0.8 × 0.48
[22]3-bit Inverted-E/single-unit2.2–2.611.25/22.5/45>12/1.821 stubs,
21 diodes
0.58 × 0.39
[23]4-bit High pass/low pass/cascaded2.3–2.6 GHz22.5/45/90/180>13/8.88 filter sections and switches0.87 × 0.95
This workSUTBRTPS/Single-unit0.9–1.1 GHz45/90
22.5/180
>17/1.7 (max)
>19/2.1 (max)
1 Coupler,
6 diodes
* 0.44 × 0.46
0.54 × 0.46
# uses meandered lines; * 50% further size reduction can be achieved using folded transmission lines (0.24 × 0.26).
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Amin, F.; Liu, L.; Liu, Y.; Zhao, Y. Compact Single-Unit Two-Bit Reflection-Type Phase Shifters with Large Phase Shift Range. Electronics 2023, 12, 2412. https://doi.org/10.3390/electronics12112412

AMA Style

Amin F, Liu L, Liu Y, Zhao Y. Compact Single-Unit Two-Bit Reflection-Type Phase Shifters with Large Phase Shift Range. Electronics. 2023; 12(11):2412. https://doi.org/10.3390/electronics12112412

Chicago/Turabian Style

Amin, Faisal, Lingyun Liu, Yun Liu, and Yongjiu Zhao. 2023. "Compact Single-Unit Two-Bit Reflection-Type Phase Shifters with Large Phase Shift Range" Electronics 12, no. 11: 2412. https://doi.org/10.3390/electronics12112412

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop