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Article
Peer-Review Record

Parasitic-Aware Simulation-Based Optimization Design Tool for Current Steering VGAs

Electronics 2023, 12(1), 132; https://doi.org/10.3390/electronics12010132
by Nehad Mansour *, Mohamed Elnozahi and Hani Ragaai
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Electronics 2023, 12(1), 132; https://doi.org/10.3390/electronics12010132
Submission received: 6 December 2022 / Revised: 21 December 2022 / Accepted: 23 December 2022 / Published: 28 December 2022
(This article belongs to the Special Issue 5G Mobile Telecommunication Systems and Recent Advances)

Round 1

Reviewer 1 Report

1.     The authors present web-based parasitic-aware automation and optimization design tool for digitally con-11 trolled current steering VGAs. The optimization is based on a simulator based optimizer embedded within the virtuoso environment.

2.     In the table II, the optimizer different stages with the corresponding parameters to be optimized for the required specification should be demonstrated in detail.

3.     The manuscript has 20 figures; the number of the figures should be decreased.

4.     Revise the English thoroughly before submission.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

The authors have used PAS-based optimization design tool for current steering VGAs. This paper is well-written but need some minor improvements. Following are my comments.

1. Abstract is short. Add more quantitative analysis and potential applications.

2. The novelty of this work should be more stressed in last paragraph of the introduction section.

3. Quality of Fig. 1 should be improved. 

4. In Fig. 1, RC FB Network is not properly explained. Explain this in details.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

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