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Article
Peer-Review Record

Characteristic Analysis of Fractional-Order Memristor-Based Hypogenetic Jerk System and Its DSP Implementation

Electronics 2021, 10(7), 841; https://doi.org/10.3390/electronics10070841
by Chuan Qin, Kehui Sun * and Shaobo He
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Electronics 2021, 10(7), 841; https://doi.org/10.3390/electronics10070841
Submission received: 7 March 2021 / Revised: 27 March 2021 / Accepted: 29 March 2021 / Published: 1 April 2021
(This article belongs to the Special Issue Memristive Devices and Systems: Modelling, Properties & Applications)

Round 1

Reviewer 1 Report

The paper deals with the fractional-order memristive model. By simulations, the coexistence of attractors is shown.

In the paper, known methods are applied to the known model. Nevertheless, the results are interesting and up-to-date. The paper is well prepared, I did not found logical gaps to be corrected. 

I recommend the paper for publication.

Comments:

-typos have to be corrected, like missing spaces, e.g. Rev.[26] without Rev

-is the formula (2.5) (formula between (2) and (3)) correct?

-reference to QR method will be useful

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

In this paper, the authors present a fractional-order memristive model with infinite coexisting attractors. The mathematical model's numerical solution governing the device has been based on the Adomian decomposition method (ADM). Finally, the authors analyzed the proposed device's dynamic behaviours through several techniques popular in this research field.

The paper is well written, but it has several weaknesses which have to be fixed before to accept for publication:

1) The authors have to explain more clearly the novelty of the proposed device compare with those available in the literature, avoiding generic statements as "the system has broad application prospects" or similar;

2) The Adomian Decomposition Method is a technique broadly used to analyze this kind of device (see [1-4]), so the authors should explain the novelty of their methodological approach more clearly;

3) Although in the abstract the authors stated, "Finally, the digital signal processor (DSP) implementation verifies the correctness of the solution algorithm and the physical feasibility of the system", this kind of analysis was not reported in the paper, i.e. the authors have not provided i) the schematic diagram, ii) the flow chart of the DSP implementation, and iii) pictures of the physical implementation of the proposed device (see [4]).

References

[1] Ye, X., Wang, X., Mou, J., Yan, X., & Xian, Y. (2018). Characteristic analysis of the fractional-order hyperchaotic memristive circuit based on the Wien bridge oscillator. The European Physical Journal Plus133(12), 516.

[2] Yang, F., & Li, P. (2019). Characteristics analysis of the fractional-order chaotic memristive circuit based on Chua’s circuit. Mobile Networks and Applications, 1-9.

[3] Yang, F., Mou, J., Ma, C., & Cao, Y. (2020). Dynamic analysis of an improper fractional-order laser chaotic system and its image encryption application. Optics and Lasers in Engineering129, 106031.

[4] He, S., Sun, K., & Wang, H. (2015). Complexity analysis and DSP implementation of the fractional-order Lorenz hyperchaotic system. Entropy17(12), 8299-8311.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 3 Report

This paper investigates a fractional-order memristive model with infinite coexisting attractors.

At first, I would suggest some language and grammar revision. Although the article is well readable, there are some linguistic errors.

The introduction is well written and very well documented. I would suggest extending the paragraph where the authors describe their work in this paper. A more detailed description of what they do and the results they confirm would be advisable.

The mathematical models in sections 2 and 3 are thorough.

Section 4, line 172, the authors claim the design of the digital circuit. Which circuit? Perhaps detail how the network model was translated/synthesized into a circuit.

Please detail the DSP implementation.

Explain in what respect is the result form Figure 11 consistent with Figure 9?

The conclusions are rather expeditory.

In my opinion, what started as a very good paper regarding the introduction and the theoretical fundaments, became rather superficial in the simulation/experimental section. My advice is to revise sections 4 and 5. Present the tests in more detail.   

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

Although in the updated version of their paper, the authors have addressed some of the questions I have pointed out, they have not described the novelty of the proposed device adequately compared with those available in the literature. I think that the issue I have raised must be discussed, and I am a bit surprised that the authors have not considered it.

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 3 Report

My comments have been addressed. I have no further remarks

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

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