Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators

Zhai, Huishan; Ling, Bingo Wing-Kuen

doi:10.3390/app10175785

Open AccessArticle

Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators

by

Huishan Zhai

and

Bingo Wing-Kuen Ling

^*

School of Information Engineering, Guangdong University of Technology, Guangzhou 510006, China

^*

Author to whom correspondence should be addressed.

Appl. Sci. 2020, 10(17), 5785; https://doi.org/10.3390/app10175785

Submission received: 14 July 2020 / Revised: 13 August 2020 / Accepted: 18 August 2020 / Published: 21 August 2020

(This article belongs to the Special Issue Advances in Information and Communication Technologies (ICT))

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Abstract

:

This paper is an extension of the existing works on the frequency-domain-based bit flipping control strategy for stabilizing the single-bit high-order interpolative sigma delta modulator. In particular, this paper proposes the implementation and performs the performance evaluation of the control strategy. For the implementation, a frequency detector is used to detect the resonance frequencies of the input sequence of the sigma delta modulator. Then, a neural-network-based controller is used for finding the solution of the integer programming problem. Finally, the buffers and the combinational logic gates as well as an inverter are used for implementing the proposed control strategy. For the performance evaluation, the stability region in terms of the input dynamical range is evaluated. It is found that the control strategy can significantly increase the input dynamical range from 0.24 to 0.58. Besides, the control strategy can be applied to a wider class of the input signals compared to the clipping method.

Keywords:

high-order interpolative sigma delta modulator; bit flipping control; quantization; fractal; chaos; complex number

1. Introduction

A single-bit high-order interpolative sigma delta modulator [1,2] consists of a negative feedback of a high order loop filter and a single bit quantizer [3]. If the loop filter is designed properly, then the magnitude of the noise transfer function can be very small at the signal band and the noise is mainly localized outside the signal band. On the other hand, the magnitude of the signal transfer function can also be very small outside the signal band and the signal is mainly localized in the signal band. As the signal and the noise are separated in different frequency bands, a very good analog to digital conversion performance can be achieved by applying a simple lowpass filtering at the quantizer output. This technique is known as the noise shaping technique [1,4]. As an oversampling operation for an audio signal can be implemented using an existing hardware [5,6], a single-bit high-order interpolative sigma delta modulator is widely employed for the analog to digital conversion in the audio devices [7,8].

However, the loop filter is required to be unstable (not bounded input bounded output stable) in order to achieve a high signal to noise ratio. Therefore, a single-bit high-order interpolative sigma delta modulator may suffer from the internal instability problem [9,10]. That is, the state variables of the loop filter may diverge. To address this issue, control is required for the stabilization purpose [7,11,12,13].

The most common control method is clipping. Here, the values of the output of the loop filter are clipped to a certain value when they exceed a certain value [7]. However, this control method usually results to the occurrence of a limit cycle [14]. This is because it will reach the same set of state vectors every time when the control action takes place. Another common control method is to reset the state vector to a certain vector in its largest invariant set if the largest invariant set of the state vectors exists [11]. However, the determination of the largest invariant set of the state vectors requires a very high computational power [15]. Therefore, the implementation cost of this approach is very expensive.

To address the drawbacks of the existing clipping control strategy, a sliding mode control-based method was proposed [12,13]. However, the conventional sliding mode control technique usually requires an amplifier with the gain higher than the saturation level of the quantizer. Equivalently speaking, this flipping strategy is valid only for the input signal with a very small dynamic range.

To address the drawbacks of the above control strategies, a frequency-domain-based bit flipping control strategy was proposed [1]. Although the theoretical analysis was discussed in detail in [1], the implementation of this control strategy and the detail performance evaluation have not performed. The main contribution of this paper is to propose an implementation to realize this control strategy such that the stability region in terms of the input dynamical range can increase significantly.

The outline of this paper is as follows. In Section 2, the implementation of the frequency-domain-based bit flipping controller is proposed. In Section 3, the performance evaluations are presented. Finally, a conclusion is drawn in Section 4.

2. Implementation of the Frequency-Domain-Based Bit Flipping Controller

Since this control strategy is based on the cancellation of certain frequency contents of the input sequence of the sigma delta modulator, it only requires a frequency detector [16,17,18] to detect the resonance frequencies of the input sequence of the sigma delta modulator, a neural-network-based controller for finding the solution of the integer programming problem [19,20,21], the buffers and the combinational logic gates as well as an inverter for implementing the proposed control strategy. The block diagram of the proposed method is shown in Figure 1.

First, the frequency detector detects the existence of the resonance frequencies in the input sequence. Here, the resonance frequencies relate to those eigenvalues of

A

lying on the unit circle. To detect the resonance frequencies, it is equivalent to test whether

\sum_{n \geq 0} u [n] d_{i}^{- n}

is bounded or not with

| d_{i} | = 1

for those

i \in {0, \dots, P - 1}

. However, as the length of the signal is infinite, the implementation involves the infinite sum. This has an implementation difficulty. To address this issue, a buffer is employed to preload a block of signal and the summation is evaluated only over the points in the block. Now, a simple accumulator is employed for computing the summation of the real part of the points in the block. Similarly, another simple accumulator is employed for computing the summation of the imaginary part of the points in the block. Finally, two comparators are employed to test whether both the absolute values of the summed real part and the summed imaginary part of the points in the block are larger than a threshold value or not.

Second, the loop filter is implemented via the direct form structure. Here, only the delay cells, the multipliers and the adders are required for the implementation. The state variables of the digital filter are stored in the delay cells.

Third, the quantizer is implemented via the comparators. The output of the loop filter is compared to the quantization levels of the quantizer via the comparators. Finally, the quantizer gives the output which is the output of the corresponding comparator.

Fourth, the controller implements the integer programming algorithm via a neural network. The decision vector of the optimization problem is the weight vector of the neural network. The update of the decision vector is implemented via the update of the weight vector of the neural network. Once the update of the weight vector is converged, the converged weight vector is used to control the inverter.

Finally, the bit streams of the output of the quantizer is compared to the converged weight vector of the neural network. If the bit streams of the output of the quantizer are different from the converged weight vector of the neural network, then the corresponding bit is inverted by the inverter. Otherwise, the bit streams of the output of the quantizer remain unchanged.

3. Performance Evaluation

Since the control objective is to guarantee the stability of the sigma delta modulator and the stability only depends on the input signal for a given sigma delta modulator and the control strategy, the input dynamical range is employed as the criterion for the comparison.

As discussed in Section 1 that the clipping method [7] is the most common control method, the clipping method [7] is compared. More precisely, the clipping rule is to reset the state vector

x (k)

to the zero vector when the absolute values of the outputs of the loop filter are greater than or equal to one.

In this paper, a single bit fifth order interpolative sigma delta modulator realized using the state space representation with the following state space matrices is considered:

A = [\begin{matrix} 0.9990 & 1.0000 & 0.0000 & 0.0000 & 0.0000 \\ - 0.0020 & 0.9990 & 0.0530 & 0.1764 & 0.5164 \\ 0 & 0 & 0.9997 & 1.0000 & - 0.0000 \\ 0 & 0 & - 0.0007 & 0.9997 & 0.3567 \\ 0 & 0 & 0 & 0 & 1.0000 \end{matrix}], B = {[\begin{matrix} 0 & 0 & 0 & 0 & 1 \end{matrix}]}^{T}

and

C = [\begin{matrix} 0.0307 & 0.4153 & 0.0828 & 0.2754 & 0.8063 \end{matrix}]

This sigma delta modulator is chosen for the comparison because it is widely used in the audio industry [7].

It is worth noting that the eigenvalues of

A

are

0.9990 + 0.0445 j

,

0.9990 - 0.0445 j

,

0.9997 + 0.0264 j

,

0.9990 - 0.0264 j

and

1

. As all the eigenvalues are on the unit circle, this loop filter is not bounded input bounded output stable. For the ease of the implementation, assume that the initial state vector is zero. Since this loop filter contains a DC pole, the step input is applied to this sigma delta modulator for illustration purposes. This is because this input will result to the occurrence of the resonance. Therefore, control is required for stabilizing the sigma delta modulator. Here, three-step input signals with different step sizes are illustrated. For the first case, an input step size equal to 0.24 is applied to the sigma delta modulator. That is,

u (k) = 0.24

for

k \geq 0

. Figure 2a,b show the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. Figure 2c,d show the magnitude responses of the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. It can be seen from Figure 2a that the output of the loop filter under our proposed control strategy is bounded. This implies that there exists a binary sequence in

Y_{d_{i}}

or the neural network finds a solution of Problem (P) such that the objective functional value of Problem (P) is exactly equal to zero. Besides, it can be seen from Figure 2c that the output of the loop filter is a wide band signal. Its frequency content is very rich. This means that the sigma delta modulator exhibits the chaotic behavior. On the other hand, it can be seen from Figure 2b that the output of the loop filter under the clipping strategy [7] is periodic. This is because the state vectors are reset to the same state every time when the reset action takes place. Besides, it can be seen from Figure 2d that the output of the loop filter only consists of the DC frequency and the Nyquist sampling frequency. This implies that the sigma delta modulator exhibits the limit cycle behavior. For the audio application, this frequency component with the high amplitude refers to the annoying audio tune, which should be avoided.

In order to evaluate the performance on the analog to digital conversion of the sigma delta modulator under various control strategies, the peak signal to noise ratio is employed as the performance index. Since the passband of the loop filter is

(- \frac{π}{64}, \frac{π}{64})

, the ideal lowpass filter with the passband equal to

(- \frac{π}{64}, \frac{π}{64})

is applied to the quantizer output. Here, the ideal lowpass filtering is implemented using the discrete Fourier transform approach. That is, those discrete Fourier transform coefficients outside the frequency band

(- \frac{π}{64}, \frac{π}{64})

are set to zero. It is found that the signal to noise ratio of the signal based on our control strategy is 36.98 dB. On the other hand, the signal to noise ratio of the signal based on the clipping method [7] is −1.76 dB. This is because the output of the loop filter only consists of the DC frequency and the Nyquist sampling frequency while there is no DC component in the input signal. Therefore, the signal to noise ratio of the signal is significantly worse.

Now, consider another input step size. Here, the input step size is incremented by 0.01. More precisely, an input step size of 0.25 is applied. That is,

u (k) = 0.25

for

k \geq 0

. Figure 3a,b show the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. Figure 3c,d show the magnitude responses of the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. It can be seen from Figure 3a,c that the sigma delta modulator exhibits the similar behavior as before if our proposed control strategy is applied. On the other hand, it is worth noting that the increase in the input step size causes the absolute value of the output of the loop filter greater than or equal to one at every time instant if no control force is applied. Therefore, if the clipping control strategy [7] is applied, then the clipping action takes place at every time instant. Hence, it can be seen from Figure 3b,d that the output of the loop filter is always equal to zero if the clipping control strategy [7] is applied. In this case, the sigma delta modulator is not working properly.

Likewise, it is found that the signal to noise ratio of the signal based on our control strategy is 35.37 dB. On the other hand, the signal to noise ratio of the signal based on the clipping method [7] is exactly 0 dB.

Next, a very large input step, which is equal to 0.58, is applied. Figure 4a,b show the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. Figure 4c,d show the magnitude responses of the outputs of the loop filters when our control strategy and the clipping method [7] are applied, respectively. It can be seen from Figure 4a,c that the sigma delta modulator also exhibits the similar behavior as before if our proposed control strategy is applied. Similarly, it can be seen from Figure 4b,d that the output of the loop filter is always zero under the clipping control strategy [7]. From here, it can be seen that our proposed control method can achieve a larger stability region in terms of the input dynamical range.

Likewise, it is found that the signal to noise ratio of the signal based on our control strategy is 32.52 dB. On the other hand, the signal to noise ratio of the signal based on the clipping method [7] is exactly 0 dB.

To further demonstrate the effects of the input step size on the stability of the sigma delta modulator, Figure 5a,b show the maximum absolute value of the output of the loop filter against the input step size under our proposed control strategy and the clipping control strategy [7], respectively. For our proposed control strategy, it can be seen from Figure 5a that the input step sizes being smaller than or equal to 0.58 will yield the maximum absolute values of the outputs of the loop filter being equal to nonzero. This means that the sigma delta modulator can be stabilized. However, the modulus of

{U (z) |}_{z = d_{i}}

increases as the input step size increases. Eventually,

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} \notin Y_{d_{i}}

. In this case, the sigma delta modulator cannot be stabilized. Therefore, it can be seen from Figure 5a that the maximum absolute values of the outputs of the loop filter are equal to zero when the input step sizes are larger than 0.58. On the other hand, for the clipping control method [7], it can be seen from Figure 5b that the input step sizes being smaller than or equal to 0.24 will yield the maximum absolute values of the outputs of the loop filter being equal to nonzero. However, the maximum absolute values of the outputs of the loop filter are equal to zero when the input step sizes are larger than 0.58. This also demonstrates that our proposed control method yields a wider stability region in terms of the input dynamical range.

As the phases of the eigenvalues of

A

are

0.0142 π

,

- 0.0142 π

,

0.0084 π

,

- 0.0084 π

and

0

, the sinusoidal inputs with the angular frequencies equal to

0.0142 π

and

0.0084 π

are applied for the illustration purpose. Here, the amplitude of the sinusoidal input is equal to 0.24, which is chosen the same as before for the comparison purpose. For the simplicity reason, there is no phase shift on the sinusoidal input. Figure 6a,b show the outputs of the loop filters when the angular frequency is equal to

0.0142 π

under our control strategy and the clipping method [7], respectively. Figure 6c,d show the magnitude responses of the outputs of the loop filters when the angular frequency is equal to

0.0142 π

under our control strategy and the clipping method [7], respectively. Figure 7a,b show the outputs of the loop filters when the angular frequency is equal to

0.0084 π

under our control strategy and the clipping method [7], respectively. Figure 7c,d show the magnitude responses of the outputs of the loop filters when the angular frequency is equal to

0.0084 π

under our control strategy and the clipping method [7], respectively. It can be seen from both Figure 6 and Figure 7 that the sigma delta modulator exhibits the similar behavior as before for our proposed control strategy.

To demonstrate the application value of our proposed method, the sigma delta modulator is applied to an electromyogram [1]. Figure 8 shows the electromyogram. Figure 9a,b show the outputs of the loop filters under our control strategy and the clipping method [7], respectively. Figure 9c,d show the magnitude responses of the outputs of the loop filters under our control strategy and the clipping method [7], respectively. It can be seen from Figure 9a,c that the sigma delta modulator exhibits similar behavior to before for our proposed control strategy. This demonstrates the generality of our proposed method and the possibility of applying our proposed method to some practical signals.

4. Conclusions

This paper proposed an implementation of the frequency-domain-based bit flipping control strategy [1] for stabilizing the single-bit high-order interpolative sigma delta modulator. In particular, a frequency detector was used to detect the resonance frequencies of the input sequence of the sigma delta modulator. Moreover, a neural-network-based controller was used for finding the solution of the integer programming problem. Moreover, the buffers and the combinational logic gates as well as an inverter were used for implementing the control strategy. The implementation cost was low. The computer numerical simulation results show that the stability region in terms of the input dynamical range increased from 0.24 to 0.58. Moreover, the control strategy could be applied to a wider class of the input signals compared to the clipping method.

Author Contributions

Conceptualization, H.Z. and B.W.-K.L.; methodology, software, H.Z. and B.W.-K.L.; validation, B.W.-K.L.; formal analysis, H.Z. and B.W.-K.L.; investigation, H.Z. and B.W.-K.L.; resources, B.W.-K.L.; data curation, H.Z.; writing—original draft preparation, H.Z.; writing—review and editing, H.Z.; visualization, H.Z.; supervision, B.W.-K.L.; project administration, B.W.-K.L.; funding acquisition, B.W.-K.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded partly by the National Nature Science Foundation of China [no. U1701266, no. 61372173 and no. 61671163], the Team Project of the Education Ministry of the Guangdong Province [no. 2017KCXTD011], the Guangdong Higher Education Engineering Technology Research Center for Big Data on Manufacturing Knowledge Patent [no. 501130144], the Guangdong Province Intellectual Property Key Laboratory Project [no. 2018B030322016] and Hong Kong Innovation and Technology Commission, Enterprise Support Scheme [no. S/E/070/17].

Conflicts of Interest

The authors declare no conflict of interest

Appendix A. Review on the Conversions between the Integers and the Corresponding Binary Sequences

First, consider the case when a non-negative integer is represented using the octave integer base. Denote mod

(\cdot, \cdot)

and

⌊ \cdot ⌋

as the modulo operator and the operator taking the smallest integer of a real number, respectively. Define the following nonlinear map:

ℑ : Z^{+} \cup {0} \to {- 1, 1} \times {- 1, 1} \times \dots

, such that

x^{'} = ℑ (n)

and the

k

th element of

x^{'}

is equal to

2 \mod (⌊ \frac{n}{2^{k - 1}} ⌋, 2) - 1

. This nonlinear map is to convert a non-negative decimal number

n

to a vector of a binary sequence

x^{'}

, in which the elements in

x^{'}

are either 1 or −1. For example, if

n = 11

, then

x^{'} = {[\begin{matrix} 1 & 1 & - 1 & 1 & - 1 & - 1 & \dots \end{matrix}]}^{T}

. Define a vector

ξ

in which the

k

th element of

ξ

is equal to

2^{k - 1}

and denote the vector

1

as the vector with all its elements being equal to 1. Then, we have

ξ^{T} \frac{x^{'} + 1}{2} = n

. This equation is to convert the vector of the binary sequence

x^{'}

back to a non-negative decimal number

n

. From here, we can see that

ℑ

is invertible.

For the completeness, consider the case when a non-negative integer is represented using the non-octave integer bases. Similarly, define the following nonlinear map:

ℑ^{'} : Z^{+} \cup {0} \to {0, \dots, λ^{'} - 1} \times {0, 1, \dots, λ^{'} - 1} \times \dots

, such that

x^{″} = ℑ^{'} (n)

and the

k

th element of

x^{″}

is equal to

\mod (⌊ \frac{n}{{λ^{'}}^{k - 1}} ⌋, λ^{'})

. This nonlinear map is to convert a non-negative decimal number

n

to a vector of an integer sequence

x^{″}

in which the elements in

x^{″}

are in

{0, 1, \dots, λ^{'} - 1}

. Define a vector

ξ^{'}

in which the

k

th element of

ξ^{'}

is equal to

{λ^{'}}^{k - 1}

. Then, we have

{ξ^{'}}^{T} x^{″} = n

. This equation is to convert the vector of the integer sequence

x^{″}

back to a non-negative decimal number

n

. From here, we can also see that

ℑ^{'}

is invertible.

Appendix B. Review on Both the Fractal and the Chaotic Behaviors of the Dynamical System with Its State Vectors Being the Corresponding Binary Sequences of the Consecutive Integers

Now, denote

λ

as a complex number with its modulus greater than 1. Define

Γ = {λ^{- (k - 1)} : k \geq 1}

. Let

c_{k} \in {1, - 1}

for

k \geq 1

be a binary combinational coefficient. Define a vector

ψ

in which the

k

th element of

ψ

is

λ^{- (k - 1)}

. Let

y (n)

be a complex number that can be represented as a binary combination of the elements in

Γ

. That is,

y (n) = \sum_{k \geq 1} c_{k} λ^{- k}

. Denote

Y \equiv {y (n) : n \geq 0}

. In this section, we will characterize

Y

. First, the integer 0 is converted to the corresponding binary sequence

ℑ (0)

. Then, we can compute the corresponding complex number

y (0)

. Next, increment the integer 0 to the integer 1 and convert the integer 1 to the corresponding binary sequence

ℑ (1)

and compute

y (1)

. Eventually, we obtain

Y

. More precisely, for a given binary sequence

x (n)

, as

ℑ

is invertible, the corresponding integer is

ξ^{T} (\frac{x (n) + 1}{2})

. Hence, the incremented integer is

1 + ξ^{T} (\frac{x (n) + 1}{2})

and the corresponding incremented binary sequence is

ℑ (1 + ξ^{T} (\frac{x (n) + 1}{2}))

. As a result, we can define a nonlinear discrete time dynamical system as follows:

x (n + 1) = ℑ (1 + ξ^{T} (\frac{x (n) + 1}{2}))

and

y (n) = ψ^{T} x (n)

for

n \geq 0

. Here,

x (n)

and

y (n)

are the state vector and the output of the nonlinear discrete time dynamical system, respectively, where

x (n)

is the binary sequence and the

k

th element of

x (n)

is

c_{k}

. Moreover,

y (n)

is the corresponding complex number. However, it is worth noting that

Y

is not the whole complex plane. That means, some complex numbers cannot be represented by the binary combinations of the elements in

Γ

.

Since

ℑ

involves the modulo operator, the nonlinear discrete time dynamical system may exhibit both the fractal phenomenon and the chaotic phenomenon [22]. Figure A1 shows some computer numerical simulation results of

Y

with

∠ λ = \frac{π}{10}

for

| λ | = 1.1

,

| λ | = 1.3

,

| λ | = 1.5

and

| λ | = 1.9

. On the other hand, Figure A2 shows some computer numerical simulation results of

Y

with

| λ | = 1.5

for

∠ λ = 0

,

∠ λ = \frac{π}{4}

,

∠ λ = \frac{π}{2}

and

∠ λ = π

. It can be seen from Figure A1 that the size of

Y

becomes smaller as

| λ |

increases. This is because the distance between the complex numbers

λ^{- k}

and

- λ^{- k}

decreases as

| λ |

increases. Besides, it is worth noting that

Y

does not contain a neighborhood around the origin as

| λ |

increases. In addition, if

∠ λ

is an integer multiple of

π

, then

λ

is a real number. In this case,

Y

can only contain the real numbers in the range

(- \frac{λ}{λ - 1}, \frac{λ}{λ - 1})

. If

λ

is a real number with

| λ | \geq 2

, then

Y

does not contain all real numbers in the range

(- \frac{λ - 2}{λ - 1}, \frac{λ - 2}{λ - 1})

.

This investigation will be applied to derive a stability condition for the sigma delta modulator. Moreover, it will be used for formulating a frequency-domain-based bit flipping control strategy for stabilizing the sigma delta modulator.

Figure A1. (a)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.1

. (b)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.3

. (c)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.5

. (d)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.9

.

Figure A1. (a)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.1

. (b)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.3

. (c)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.5

. (d)

Y

with

∠ λ = \frac{π}{10}

and

| λ | = 1.9

.

Figure A2. (a)

Y

with

| λ | = 1.5

and

∠ λ = 0

. (b)

Y

with

| λ | = 1.5

and

∠ λ = \frac{π}{4}

. (c)

Y

with

| λ | = 1.5

and

∠ λ = \frac{π}{2}

. (d)

Y

with

| λ | = 1.5

and

∠ λ = π

.

Figure A2. (a)

Y

with

| λ | = 1.5

and

∠ λ = 0

. (b)

Y

with

| λ | = 1.5

and

∠ λ = \frac{π}{4}

. (c)

Y

with

| λ | = 1.5

and

∠ λ = \frac{π}{2}

. (d)

Y

with

| λ | = 1.5

and

∠ λ = π

.

Appendix C. Review on the Frequency-Domain-Based Bit Flipping Control Strategy

Denote the transfer function of the loop filter as

F (z)

. Denote the noise transfer function and the signal transfer function as

N T F (z)

and

S T F (z)

, respectively. In order to achieve a high signal to noise ratio, it is desired to achieve

N T F (z) \to 0

and

S T F (z) \to 1

in the signal band as well as

N T F (z) \to 1

and

S T F (z) \to 0

in the noise band. Since

N T F (z) = \frac{1}{1 + F (z)}

and

S T F (z) = \frac{F (z)}{1 + F (z)}

, it is implied that

| F (z) | \to + \infty

in the signal band and

F (z) = 0

in the noise band. This further implies that

F (z)

contains some unstable poles ((1) the poles outside the unit circle; or (2) the poles on the unit circle with the frequencies inside the signal band in which the resonance could occur). As the loop filter is unstable, the stability issue is very critical. As a result, the control of the sigma delta modulator is very important.

Assume that the loop filter could be realized via the state space representation with the state space matrices

A

,

B

,

C

and

D

. Here,

D = 0

. Let the input sequence and the quantized output sequence of the sigma delta modulator be

u (n)

and

s (n)

, respectively. Denote the state vector as

x (n)

. Then, it can be shown that:

x (n) = A^{n} x (0) + \sum_{k = 0}^{n - 1} A^{n - 1 - k} B (u (k) - s (k))

Assume that

A

is diagonalizable. Denote a matrix

T

in such a way that the columns of

T

are the eigenvectors of

A

. Moreover, denote a diagonal matrix

D

in such a way that its diagonal elements are the corresponding eigenvalues of

A

. That is,

A = T D T^{- 1}

. Let the diagonal elements of

D

be

d_{i}

. Assume that the state vectors are

N

dimensional. Denote:

\tilde{x} (n) = {[\begin{matrix} {\tilde{x}}_{0} (n) & \dots & {\tilde{x}}_{N - 1} (n) \end{matrix}]}^{T} = T^{- 1} x (n)

and

\tilde{B} = {[\begin{matrix} {\tilde{b}}_{0} & \dots & {\tilde{b}}_{N - 1} \end{matrix}]}^{T} = T^{- 1} B

Then, we have:

\begin{array}{l} x (n) = T D^{n} T^{- 1} x (0) + \sum_{k = 0}^{n - 1} T D^{n - 1 - k} T^{- 1} B (u (k) - s (k)) \\ \tilde{x} (n) = T^{- 1} x (n) = D^{n} T^{- 1} x (0) + \sum_{k = 0}^{n - 1} D^{n - 1 - k} T^{- 1} B (u (k) - s (k)) \\ = D^{n} \tilde{x} (0) + \sum_{k = 0}^{n - 1} D^{n - 1 - k} \tilde{B} (u (k) - s (k)) \end{array}

This implies that:

{\tilde{x}}_{i} (n) = d_{i}^{n} {\tilde{x}}_{i} (0) + \sum_{k = 0}^{n - 1} d_{i}^{n - 1 - k} {\tilde{b}}_{i} (u (k) - s (k))

In other words, we have:

\frac{{\tilde{x}}_{i} (n)}{{\tilde{b}}_{i} d_{i}^{n - 1}} = \frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + \sum_{k = 0}^{n - 1} \frac{u (k) - s (k)}{d_{i}^{k}}

Denote the z-transform of the input sequence and that of the quantized output sequence of the sigma delta modulator as

U (z)

and

S (z)

, respectively. Suppose that the eigenvectors in

T

and the corresponding eigenvalues in

D

are arranged in such a way that

| d_{i} | \geq {| d |}_{j}

for

j > i

. Moreover, assume that there are

P

unstable eigenvalues in

D

. That is,

| d_{i} | \geq 1

for

i = 0, \dots, P - 1

. By flipping some values in the quantizer output, denote the z-transform of the new quantizer output as

\hat{S} (z)

. In order to stabilize the sigma delta modulator, we have:

\lim_{n \to + \infty} \frac{{\tilde{x}}_{i} (n)}{{\tilde{b}}_{i} d_{i}^{n - 1}} = 0 = \frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} - {\hat{S} (z) |}_{z = d_{i}}

for

i = 0, \dots, P - 1

. This further implies that

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} = {\hat{S} (z) |}_{z = d_{i}}

for

i = 0, \dots, P - 1

.

Define

Y_{d_{i}}

as the set of complex numbers where the elements inside

Y_{d_{i}}

can be represented as the binary combinations of the elements in the sequences

{d_{i}^{- k} : k \geq 0}

. That is,

\exists c_{k} \in {1, - 1}

\forall k \geq 0

such that

\sum_{k \geq 0} c_{k} d_{i}^{- k} \in Y_{d_{i}}

. If

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} \in Y_{d_{i}}

for

i = 0, \dots, P - 1

, then there exists a binary sequence

c_{k} \in {1, - 1}

\forall k \geq 0

such that the single bit interpolative sigma delta modulator is internally stable with the z-transform of the quantizer output equal to

\hat{S} (z)

.

The above result characterizes a condition for stabilizing the single-bit high-order interpolative sigma delta modulator via flipping some values of the quantizer output. However, it can be seen from Section 2 that

Y_{d_{i}}

does not include all complex numbers. This implies that if

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} \in C \ Y_{d_{i}}

, then there does not exist any binary sequence such that the sigma delta modulator can be stabilized. On the other hand, if

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}} \in Y_{d_{i}}

, then there exists a binary sequence such that the sigma delta modulator can be stabilized. For this case, it is required to find this binary sequence. In particular, an integer programming approach is employed to address this issue. The objective function of the optimization problem is to minimize the error energy between

\frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} + {U (z) |}_{z = d_{i}}

and

{S (z) |}_{z = d_{i}}

subject to the binary constraint imposed to the quantizer output. That is, the optimization problem is formulated as follows:

Problem (P)

\min_{x^{'}} \sum_{\forall i \in {0, \dots, P - 1}} {| ψ_{i}^{T} x^{'} - \frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} - {U (z) |}_{z = d_{i}} |}^{2},

subject to

{x^{'}}_{k} \in {1, - 1}

\forall k \geq 0

.

Here,

{x^{'}}_{k}

is the

k

^th element of

x^{'}

and

d_{i}^{- k}

is the

k

^th element of

ψ_{i}

. If there exists a set of binary sequences such that the single-bit high-order interpolative sigma delta modulator is internally stable, then the objective functional value of Problem (P) for these binary sequences in this set will be exactly equal to zero. In this case,

x^{'}

is the global minimum of Problem (P). Hence, by finding a solution of Problem (P), we can find a stable binary sequence stabilizing the sigma delta modulator. However, it is difficult to find a solution of Problem (P). This is because it is an infinite dimensional optimization problem. To address this issue, the quantizer output bit streams are divided into blocks with the length of each block is equal to

M

. Denote the vector of the binary sequence in the

m

^th block as

{x^{″}}_{m}

for

m \geq 0

. Define a vector

{ψ^{″}}_{i, m}

such that the

k

^th element of

{ψ^{″}}_{i, m}

is equal to

d_{i}^{- m M - k}

for

k = 0, \dots, M - 1

. Denote

x_{m}^{*}

for

m \geq 0

as a solution of the following finite dimensional integer programming problem:

Problem ( ${P^{'}}_{m}$ )

\min_{x^{'}} \sum_{\forall i \in {0, \dots, P - 1}} {| {ψ^{″}}_{i, m}^{T} {x^{″}}_{m} + \sum_{n = 0}^{m - 1} {ψ^{″}}_{i, n}^{T} x_{n}^{*} - \frac{d_{i} {\tilde{x}}_{i} (0)}{{\tilde{b}}_{i}} - {U (z) |}_{z = d_{i}} |}^{2},

subject to

{x^{″}}_{k, m} \in {1, - 1} \forall k \in {0, \dots, M - 1} .

here,

{x^{″}}_{k, m}

is the

k

^th element of

{x^{″}}_{m}

. It is worth noting that Problem (

{P^{'}}_{m}

) is a standard integer programming problem. There are many existing algorithms [23] for finding a solution of Problem (

{P^{'}}_{m}

). Besides, it is worth noting that if

M

is large enough, then the solution of Problem (

{P^{'}}_{m}

) will be close to that of Problem (P).

References

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Figure 1. Block diagram of the proposed system.

Figure 2. (a) Output of the loop filter when

u (k) = 0.24

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24

for

k \geq 0

under the clipping strategy [7].

Figure 2. (a) Output of the loop filter when

u (k) = 0.24

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24

for

k \geq 0

under the clipping strategy [7].

Figure 3. (a) Output of the loop filter when

u (k) = 0.25

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.25

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.25

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.25

for

k \geq 0

under the clipping strategy [7].

Figure 3. (a) Output of the loop filter when

u (k) = 0.25

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.25

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.25

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.25

for

k \geq 0

under the clipping strategy [7].

Figure 4. (a) Output of the loop filter when

u (k) = 0.58

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.58

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.58

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.58

for

k \geq 0

under the clipping strategy [7].

Figure 4. (a) Output of the loop filter when

u (k) = 0.58

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.58

for

k \geq 0

under the clipping strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.58

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.58

for

k \geq 0

under the clipping strategy [7].

Figure 5. (a) The maximum absolute value of the output of the loop filter against the input step size under our proposed control strategy. (b) The maximum absolute value of the output of the loop filter against the input step size under the clipping control strategy [7].

Figure 6. (a) Output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under the clipping control strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under the clipping control strategy [7].

Figure 6. (a) Output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under the clipping control strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0142 π k)

for

k \geq 0

under the clipping control strategy [7].

Figure 7. (a) Output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under the clipping control strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under the clipping control strategy [7].

Figure 7. (a) Output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under our proposed control strategy. (b) Output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under the clipping control strategy [7]. (c) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under our proposed control strategy. (d) Magnitude response of the output of the loop filter when

u (k) = 0.24 \sin (0.0084 π k)

for

k \geq 0

under the clipping control strategy [7].

Figure 8. Electromyogram.

Figure 9. (a) Output of the loop filter under our proposed control strategy when the input is an electromyogram. (b) Output of the loop filter under the clipping control strategy [7] when the input is an electromyogram. (c) Magnitude response of the output of the loop filter under our proposed control strategy when the input is an electromyogram. (d) Magnitude response of the output of the loop filter under the clipping control strategy [7] when the input is an electromyogram.

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Zhai, H.; Ling, B.W.-K. Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators. Appl. Sci. 2020, 10, 5785. https://doi.org/10.3390/app10175785

AMA Style

Zhai H, Ling BW-K. Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators. Applied Sciences. 2020; 10(17):5785. https://doi.org/10.3390/app10175785

Chicago/Turabian Style

Zhai, Huishan, and Bingo Wing-Kuen Ling. 2020. "Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators" Applied Sciences 10, no. 17: 5785. https://doi.org/10.3390/app10175785

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Implementation and Performance Evaluation of the Frequency-Domain-Based Bit Flipping Controller for Stabilizing the Single-Bit High-Order Interpolative Sigma Delta Modulators

Abstract

1. Introduction

2. Implementation of the Frequency-Domain-Based Bit Flipping Controller

3. Performance Evaluation

4. Conclusions

Author Contributions

Funding

Conflicts of Interest

Appendix A. Review on the Conversions between the Integers and the Corresponding Binary Sequences

Appendix B. Review on Both the Fractal and the Chaotic Behaviors of the Dynamical System with Its State Vectors Being the Corresponding Binary Sequences of the Consecutive Integers

Appendix C. Review on the Frequency-Domain-Based Bit Flipping Control Strategy

References

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