Effect of Gate Dielectric Material on the Electrical Properties of MoSe₂-Based Metal–Insulator–Semiconductor Field-Effect Transistor

Abstract

In this study, we fabricated metal–insulator–semiconductor field-effect transistors (MISFETs) based on nanolayered molybdenum diselenide (MoSe₂) using two insulator materials, silicon dioxide (SiO₂) and silicon nitride (SiN). We performed morphological and electrical characterizations in which the devices showed good electronic performance, such as high mobility and high I_on/I_off ratios exceeding 10⁴. The subthreshold swing (ss) was somewhat high in all devices owing to the dimensions of our devices. In addition, the transfer curves showed good controllability as a function of gate voltage. The photogating effect was weakened in MoSe₂/SiN/Si, indicating that SiN is a good alternative to silicon oxide as a gate dielectric material.

1. Introduction

Two-dimensional (2D) transition metal dichalcogenides (TMDCs) have attracted considerable attention because of their unique electronic [1], photonic [2], electrochemical [3], and mechanical [4] properties, which are significant advantages for the fabrication of next-generation electronic and optoelectronic devices [5]. Scaling down electronic device dimensions, in particular field-effect transistors (FETs) including metal–insulator–semiconductor field-effect transistors (MISFETs), is challenging owing to Moore’s law, because the reduction in the channel size and in the thickness of the gate dielectric material cause short channel effects and increases in leakage current, respectively [6]. Moreover, devices with reduced dimensions require decreased power consumption; in other words, a low threshold voltage is necessary to achieve the best electronic performance [7]. Therefore, selecting a gate dielectric material with the best physical properties, such as a high dielectric constant and low mismatch with the channel material, is as important as selecting the 2D active layer in FET-based devices. We previously reported the investigation of van der Waals hexagonal boron nitride (h-BN) (indirect bandgap E_g = 5.955 eV [8] and dielectric constant ε = 3.3 [9]) as an alternative gate dielectric material; however, the results showed low electrical performance and a kink effect due to carrier trapping at the interface between h-BN and molybdenum diselenide (MoSe₂) [10]. MoSe₂-based FETs have been reported to have excellent device characteristics, such as an on/off ratio of 10⁶ and Hall mobilities exceeding 250 cm²/V·s for both holes and electrons [11].

In this paper, we report the fabrication and characterization of MoSe₂-based MISFET transistors using silicon dioxide (SiO₂) and silicon nitride (SiN) as gate dielectric materials. The aim of our research is to investigate the incorporation of SiN, which is a high-κ dielectric material [12] (with a dielectric constant ε = 7.5, almost two times higher than that of SiO₂, ε = 3.9), as an insulator layer. We used the same fabrication process and device properties (i.e., device size, active-layer thickness, dielectric material thickness, etc.). The electrical characteristics of the MISFET devices were determined, and their mobilities, subthreshold swing (ss) values, and other parameters were calculated and analyzed.

2. Materials and Methods

We used two types of substrates in this study: SiO₂/Si and SiN/Si substrates using p+-doped Si with a resistivity lower than 0.005 Ω·cm. The thicknesses of the SiO₂ and SiN were 300 nm. SiN (300 nm) was deposited using low-pressure chemical vapor deposition (LPCVD). Thereafter, Ti contacts with thicknesses of 50 nm were deposited by electron-beam evaporation. Then, nanolayered MoSe₂ flakes purchased from HQ Graphene were transferred onto the SiO₂/Si and SiN/Si substrates using polydimethylsiloxane (PDMS, Sylgard 184 Dow silicones corporation, Carrollton, KY, USA). Four devices were fabricated on the SiO₂/Si substrates using MoSe₂ flake thicknesses of 7, 21, 63, and 90 nm, and another four devices were fabricated on SiN/Si with MoSe₂ flake thicknesses of 29, 36, 47, and 87 nm. Finally, the MISFET devices were annealed at 400 °C for 2 h under Ar gas and atmospheric pressure. A semiconductor parameter analyzer (4155A, Hewlett Packard, Tokyo, Japan) and probe station were used for electrical characterization. Scanning electron microscopy (SEM, Hitachi, Jena, Germany) was used to observe the surface of the MoSe₂ flakes, and the thickness of MoSe₂ was determined using atomic force microscopy (AFM, XE-200, PSIA Corp., Seoul, Korea).

3. Results and Discussion

3.1. Electrical Characterization of All Samples

Figure 1a,b show the drain current (I_d) dependence on the drain–source voltage (V_ds) curves of the MISFETs fabricated on SiO₂/Si and SiN/Si substrates, respectively. All devices showed symmetric electrical characteristics, except for the device using the thinnest MoSe₂ layer (7 nm) on SiO₂/Si because of the high electrical resistivity of the layer. Figure 1c,d depict the transfer curves of the same devices. All devices showed n-type behavior with normal turn-on behavior. The devices with thinner MoSe₂ flakes exhibited poor transfer curves. The electrical properties of all eight devices were extracted from the transfer curves and are presented in

Table 1. Electrical mobilities, subthreshold swing (ss) values, and on/off ratios of MISFETs.

Property	SiO2	SiO2	SiO2	SiO2	SiN	SiN	SiN	SiN
	7 nm	21 nm	63 nm	90 nm	29 nm	36 nm	47 nm	87 nm
${\mathsf{\mu }}_{\mathrm{eff}}$(cm2/V·s)	0.8	72.0	116.5	43.5	63.9	55.5	51.3	164.0
ss (mV/dec)	3.7 × 103	1.4 × 103	5.0 × 103	2.8 × 104	2.6 × 103	2.5 × 103	1.5 × 103	3.7 × 103
On/Off ratio	7.0 × 102	1.2 × 104	1.0 × 104	3.1 × 101	1.2 × 104	9 × 103	1.7 × 105	9.6 × 102

. In general, the devices showed good electrical properties, with the highest carrier mobility in MoSe₂/SiN/Si with the MoSe₂ thickness of 87 nm; this device also showed a high on/off ratio exceeding 10⁴. The ss values were relatively lower in the MoSe₂/SiN/Si-based devices, indicating that using SiN as a gate dielectric material enhanced the electrical properties.

As shown in Table 1, MoSe₂/SiO₂/Si with the MoSe₂ thickness of 21 nm and MoSe₂/SiN/Si with the MoSe₂ thickness of 29 nm had similar electrical properties; these were chosen for further investigation to determine the best gate dielectric material. The field-effect mobilities (${\mathsf{\mu }}_{\mathrm{eff}}$) of the devices were estimated using the equation ${\mathsf{\mu }}_{\mathrm{eff}}=\left[{\mathrm{dI}}_{\mathrm{d}}/{\mathrm{dV}}_{\mathrm{g}}\right]\times \left[\mathrm{L}/\left({\mathrm{WC}}_{\mathrm{i}}{\mathrm{V}}_{\mathrm{ds}}\right)\right]$, where ${\mathrm{C}}_{\mathrm{i}}$ is the gate capacitance calculated using the equation ${\mathrm{C}}_{\mathrm{i}}={\mathsf{\epsilon }}_0{\mathsf{\epsilon }}_{\mathrm{r}}/\mathrm{d}$; and ${\mathsf{\epsilon }}_{\mathrm{r}}$ is equal to 7.5 and 3.9, respectively, in the cases of SiN and SiO₂. The thicknesses of the SiN and SiO₂ were 300 nm, the gate capacitances were 1.15 × 10⁻⁴ and 2.21 × 10⁻⁴ F·m⁻², and L and W were the channel length and width, respectively.

3.2. Morphological Characterization

Figure 2a,d show the SEM images of the devices (MoSe₂/SiO₂/Si with the MoSe₂ thickness of 21 nm and MoSe₂/SiN/Si with the MoSe₂ thickness of 29 nm), the corresponding AFM images are shown in Figure 2b,e, and the topographic analysis for both devices are shown in Figure 2c,f. The channel length and width were 20 and 7 µm, respectively, as shown in Figure 2a.

3.3. Electrical and Optoelectronic Characterization

The I_d-V_ds characteristics of both devices as a function of gate voltage are shown in Figure 3a,b. The MoSe₂/SiO₂/Si device exhibited Schottky-like behavior, while MoSe₂/SiN/Si exhibited better and almost ohmic contact. Both devices showed good gate-voltage controllability of their current–voltage curves.

3.4. Electrical Characterizations of All Samples

Figure 4a,b show the variation in the transfer curves (I_d–V_G) versus the V_ds. The current was measured by setting V_ds to 1, 5, 10, or 15 V and varying the back-gate voltage from −40 V to 40 V. When V_G increased to a positive value, the carrier density increased, and the current increased. Kink effects were observed in the MoSe₂/SiN/Si device (Figure 4b) at the polarization voltages of 10 and 15 V. Similar behavior was observed in a previously reported MoSe₂/h-BN/Si-based FET device [10] and FET devices based on 2D materials such as black phosphorus [13] and graphene [14]. The kink effect in our device can be explained by the effect of carrier de-trapping from the interface at a high polarization voltage during carrier transport. The I_on/I_off values were 6.32 × 10², 3.49 × 10³, 8.04 × 10³, and 1.22 × 10⁴ at V_ds values of 1, 5, 10, and 15 V, respectively, in the MoSe₂/SiO₂/Si device. However, in the MoSe₂/SiN/Si device, the values were 5.92 × 10¹, 5.88 × 10², 5.27 × 10², and 1.27 × 10⁴ at 1, 5, 10, and 15 V, respectively.

The I_d–V_ds curves in both devices, in the absence of an applied V_G, are shown in Figure 5. Very narrow hysteresis was observed in both devices, which originated from the trapping and de-trapping effects of charges at the interfaces and surface of MoSe₂. It is well known that when multilayered MoSe₂ is exposed to ambient air, oxygen molecules can be converted into chemisorbed oxygen anions (O₂⁻) on the surface of MoSe₂, where they act as electron traps [15]. In addition to chemisorbed O₂⁻, humidity can induce trapping center formation [16]. Annealing devices in Ar can remove surface-adsorbed water vapor and oxygen [17]. However, charged impurities at the channel/SiO₂ interface and charge traps in SiO₂ can limit the electrical performance of FET [16,18]. Similar to SiO₂, SiN can exhibit extrinsic charges owing to defect density and impurities, including hosting trapped charges and surface adsorbates [19].

Finally, we investigated the optoelectronic properties of the same devices under different laser excitation powers of 0.00155, 0.0155, 0.155, 1.147, 4.96, and 13.95 µW. Figure 6a,b show the I_d–V_ds characteristics at different laser powers of the MoSe₂/SiO₂/Si and MoSe₂/SiN/Si devices, respectively. As expected, the current increased with increasing laser power. Thereafter, we deduced the photocurrent I_ph according to the equation ${\mathrm{I}}_{\mathrm{ph}}={\mathrm{I}}_{\mathrm{ds}}\left(illumination\right)-{\mathrm{I}}_{\mathrm{ds}}\left(dark\right)$, then drew I_ph as a function of the laser power (P) and interpolated the curve according to the equation ${\mathrm{I}}_{\mathrm{ph}}\propto {\mathrm{P}}^{\alpha }$. Here, $\alpha$ can be used to determine the carrier transport origin [20,21], that is, if $\alpha$ is close to unity, the photoconductive effect dominates, and if $\alpha$ is close to zero, the photogating effect dominates. The photogating effect originates from the long-lived trap states [22,23]. As seen in Figure 6c,d, α is higher in the MoSe₂/SiN/Si MISFET device, which means that the photoconductive effect is higher in this case. Photogating is dominant in the MoSe₂/SiO₂/Si MISFET (or MOSFET) device, which means that the trap concentration is higher in this case.

4. Conclusions

We fabricated eight MISFETs based on nanolayered MoSe₂. We compared two devices with similar dimensions and different gate dielectric materials of SiO₂ and SiN. The MoSe₂/SiO₂/Si- and MoSe₂/SiN/Si-based MISFETs showed good electrical performance with high carrier mobility and high on/off ratios exceeding 10⁴. Moreover, their current–voltage characteristics showed good gate-voltage controllability. In terms of carrier transport, the photoconductive effect is more apparent in the MoSe₂/SiN/Si device, and the photogating effect is dominant in the MoSe₂/SiO₂/Si device; therefore, SiN can be a good alternative to SiO₂, especially for optoelectronic devices such as high-speed photodetectors. In future research, the temperature dependence of the electrical properties of multilayered MoSe₂-based MISFETs can be characterized with the aim of investigating the carrier trap density.