A High-Gain and High-Efficiency Photovoltaic Grid-Connected Inverter with Magnetic Coupling

Abstract

Conventional photovoltaic (PV) grid-connected systems consist of a boost converter cascaded with an inverter, resulting in poor efficiency due to performing energy processing twice. Many pseudo DC-link inverters with single energy processing have been proposed to improve system efficiency and simplify circuits. However, their output voltage gain is limited by the non-ideal characteristics of the power diode, making them difficult to apply in high-output voltage applications. This paper proposes combining a boost converter with magnetic coupling and a full-bridge unfolding circuit to develop an inverter featuring high voltage-gain and high efficiency. According to the desired instantaneous output voltage, the high-gain boost converter and the full-bridge unfolding circuit are sequentially and respectively controlled by SPWM. A sinusoidal output voltage can be generated by performing energy processing only once, effectively improving the conversion efficiency. Magnetic coupling is adopted to increase the voltage gain of step-up, and the step-down function is realized by the full-bridge unfolding circuit to reduce conduction loss. Finally, a 500 W prototype was fabricated for the proposed high-gain inverter. The experimental results were used to verify the correctness of the theoretical analysis and the feasibility of the circuit structure.

1. Introduction

Recently, air pollution has become increasingly serious due to the high consumption of fossil fuels. To reduce carbon dioxide emissions to mitigate global warming and climate change, many researchers are committed to developing renewable energy sources such as photovoltaic (PV), wind, hydro, geothermal and biogas [1,2,3]. Among them, PV energy is attracting increasing attention, and is widely used around the world. There are three types of PV power systems: grid-connected, stand-alone, and hybrid [4,5,6], in which grid-connected systems are the most popular. The PV grid-connected system converts the direct current (DC) of solar energy into alternating current (AC) and feeds it into the grid [7,8].

Due to the low voltage of the PV panels, a low-frequency transformer needs to be added after the inverter in order to be connected with utility, as shown in Figure 1a. However, the low-frequency transformer significantly increases the size and cost of this PV power system. The transformer-less PV grid-connected system is the alternative structure, as shown in Figure 1b. It uses a boost converter to step-up the PV voltage and then converts it to AC power for connection with the utility [9,10]. The transformer-less structure has the advantages of small size and low cost, but its efficiency is reduced because of multiple energy processing stages.

Several single-stage inverters derived from boost or buck converters have been proposed to improve the efficiency [11,12,13], but their application is limited by the need for multiple input sources and the inability to cover a wide range of input voltage variations. Therefore, many pseudo DC-Link inverters have been proposed to overcome these drawbacks [14,15,16,17,18]. Figure 2 shows the block diagram of the pseudo DC-Link inverter, in which a DC/DC converter with both step-up and step-down capabilities is used to generate a rectified sine wave with unipolarity, and an unfolding circuit is cascaded to switch the polarity and to obtain a sinusoidal output voltage. Since the unfolding circuit switches only with the frequency of utility line, a pseudo DC-link inverter that requires only one energy processing can effectively improve conversion efficiency. However, the step-down function is achieved by connecting an additional power switch in series, resulting in higher conduction loss. In addition, the output voltage gain is limited because of the non-ideal characteristics of the power diode, making it unusable for low input voltage or high output voltage applications.

Based on the above considerations, this paper proposes a high-gain and high-efficiency inverter with magnetic coupling, the block diagram of which is shown in Figure 3. The proposed inverter combines a high-gain boost converter with coupling inductor and a full-bridge unfolding circuit. When the instantaneous output voltage is higher than the input voltage, the high-gain boost converter is controlled by sinusoidal pulse-width modulation (SPWM), and the full-bridge unfolding circuit is only used for switching the polarity of the output voltage. When the instantaneous output voltage is lower than the input voltage, the power switch of the high-gain boost converter remains in off state, and the full-bridge unfolding circuit is controlled by SPWM to step down the input voltage to the desired output voltage. This control method is called partial SPWM (P-SPWM), because the high-gain boost converter and the full-bridge unfolding circuit are sequentially and respectively controlled by high-frequency SPWM as the instantaneous output voltage varies. Generally, the following features of the proposed inverter are:

• Because the high-gain boost converter and the full-bridge unfolding circuit perform high-frequency switching at different times, only one energy processing stage is required to generate the sinusoidal output voltage, which can effectively improve the conversion efficiency.
• Magnetic coupling is adopted to increase the voltage gain of step-up so that the proposed inverter can be operated with utility of high voltage [19,20].
• The full-bridge unfolding circuit is used to realize the step-down function so that additional series power switch is not required, which can reduce conduction losses.
• The proposed inverter has both step-up and step-down capabilities, making it suitable for applications with a wide range of input voltage variations.

2. Circuit Configuration

Figure 4 shows the circuit configuration of the proposed high-gain inverter with magnetic coupling, in which V_DC is the input voltage, and v_o(t) is the output voltage. In this circuit, the first stage is a high-gain DC-DC boost converter that is controlled by P-SPWM to generate a rectified sine wave with unipolarity. It is formed mainly by the power switch S_Bo, the diode D_Bo, and the coupled inductor. The second stage is a full-bridge unfolding circuit that is controlled by P-SPWM to accomplish step-down function and switches the polarity of the rectified sine wave during step-up mode. The unfolding circuit is mainly composed of the switches S_Bu1, S_Bu2, S_Bu3, and S_Bu4, and a low-pass filter formed by the inductor L_f and the capacitor C_f.

The proposed inverter can be operated in either step-up or step-down mode, depending on the levels of the input and output voltages. In step-down mode, the switch S_Bo remains in off state, and the diode D_Bo remains in the on state. The switches S_Bu1 and S_Bu2 are controlled by high-frequency SPWM and switch complementarily. The switches S_Bu3 and S_Bu4 switch complementarily with line frequency. Additionally, the low-pass filter is used to filter out the high-frequency components of the output voltage.

When the desired output voltage is higher than the input voltage, the proposed inverter enters step-up mode. In this mode, the switch S_Bo switches with the high-frequency SPWM control. The switches S_Bu1, S_Bu4 maintain conductance to transfer energy to the output side during the positive half-cycle, and the switches S_Bu2, S_Bu3 maintain cut-off. In the negative half-cycle, the roles of the switches S_Bu1, S_Bu4 and the switches S_Bu2, S_Bu3 are swapped so that the output voltage polarity can be switched.

The high-gain DC-DC boost converter and the full-bridge unfolding circuit do not perform high-frequency switching at the same time, which means that only one energy processing stage is required to convert a low DC voltage into the required AC voltage. Therefore, the conversion efficiency of the proposed inverter can be effectively improved.

3. Operation Principles

In this section, the detailed operating principles of the proposed inverter are addressed; the following assumptions are made to simplify the circuit analysis:

• All circuit elements are ideal.
• The circuit operates in steady state.
• Inductor currents are continuous.
• The dead time of power switches is extremely short and can be ignored.

Figure 5 presents the timing diagram of the proposed high-gain inverter within one cycle of output voltage v_o(t), where V_M is the amplitude of v_o(t), T_o is the period of v_o(t), and d_Bo(t), d_Bu1(t), and d_Bu3(t) are the duty ratios of switches S_Bo, S_Bu1, and S_Bu3. Additionally, V_GS,Bo(t), V_GS,Bu1(t), V_GS,Bu2(t), V_GS,Bu3(t), and V_GS,Bu4(t) are the conceptual gate-driving signals of all power switches.

The output voltage v_o(t) is sinusoidal and can be divided into positive and negative half-cycles. When the input voltage V_DC is higher than the absolute value of the instantaneous output voltage v_o(t), the inverter operates in step-down mode; otherwise, the inverter operates in step-up mode. The operation principles of the negative half-cycle are the same as those of the positive half-cycle, except that the driving signals of switches S_Bu1 and S_Bu2 are swapped and the driving signals of switches S_Bu3 and S_Bu4 are swapped. In the following, the operation principles of the proposed inverter are illustrated with respect to the positive half-cycle.

3.1. Step-Down Mode

During the positive half-cycle (0 < t < T_o/2), the switch S_Bu4 keeps turning on, and the switch S_Bu3 keeps turning off. When the input voltage V_DC is higher than the output voltage v_o(t), the inverter operates in step-down mode. In this mode, the switch S_Bo keeps turning off, and its duty ratio d_Bo(t) is zero. The coupled inductors L_P and L_S are connected in series as an input filter. The full-bridge unfolding circuit is controlled by unipolar SPWM. The gate driving signals of the switches S_Bu1, S_Bu2 are complementary, and their duty ratios can be expressed as follows:

$$d_{Bu1}(t)=\frac{V_M\cdot \sin \omega t}{V_{DC}},$$

(1)

$$d_{Bu2}(t)=1-\frac{V_M\cdot \sin \omega t}{V_{DC}},$$

(2)

within one switching period, when S_bu1 is turned on, and S_Bu2 is turned off, the input voltage V_DC simultaneously charges the inductor L_f and provides the energy required for the output load through the diode D_Bo. The equivalent circuit is shown in Figure 6a. When S_Bu1 is turned off, and S_Bu2 is turned on, the inductor L_f releases energy to the output load. The equivalent circuit is shown in Figure 6b.

Moreover, during the negative half-cycle (T_o/2 < t < T_o), the switches S_Bu3 and S_Bu4 exchange their operation states, and the switch S_Bo keeps turning off. The input voltage V_DC charges the inductor L_f and provides energy to the output load when the switch S_Bu2 turns on, and the equivalent circuit is shown in Figure 7a. When the switch S_Bu2 is turned off and the switch S_Bu1 is turned on, the inductor L_f releases energy to the output load. Figure 7b shows the equivalent circuit.

3.2. Step-Up Mode

When the instantaneous output voltage v_o(t) is higher than the input voltage V_DC, the proposed inverter enters step-up mode. During the positive half-cycle (0 < t < T_o/2), the switches S_Bu1 and S_Bu4 keep turning on, and the switches S_Bu2 and S_Bu3 keep turning off. The switch S_Bo operates with high-frequency SPWM control. Figure 8 shows the current waveforms of the coupled inductor operating in continuous current mode (CCM), in which T is the switching period. At the initial time t = 0, the switch S_Bo turns on to force the diode D_Bo to be off, and the capacitor C_o provides energy for the output load. Figure 9a shows the equivalent circuit of the switch S_Bo turning on.

The voltage across the primary winding of the coupled inductor, v_LP, is equal to the input voltage V_DC, and can be expressed as follows:

$$v_{LP}{=V}_{DC}{=L}_P\frac{{di}_{LP}}{dt}$$

(3)

According to Equation (3), the amount of current change in the primary inductor L_P during the on state of the switch S_Bo can be expressed as

$$\Delta i_{LP}{}_{\left(close\right)}=\frac{V_{DC}\cdot d_{Bo}T}{L_P},$$

(4)

where d_Bo is the duty ratio of S_Bo. In Figure 8, i_LP(0⁺) is the initial value of the primary inductor current, so the end value i_LP(d_BoT⁻) of the on state of the switch S_Bo can be expressed as

$$i_{LP}(d_{Bo}{T}^{-})=i_{LP}(0^{+})+\frac{V_{DC}\cdot d_{Bo}T}{L_P},$$

(5)

Assuming that the coupled inductor is an ideal element (coupling coefficient k = 1), the mutual inductance M can be expressed as follows:

$$M=\sqrt{L_P{L}_S},$$

(6)

In addition, if the turn ratio between primary and secondary windings is defined as 1/N, the relationship between primary inductor L_P and secondary inductor L_S can be expressed as follows:

$$L_S=N^2{L}_P,$$

(7)

Substituting Equation (7) into Equation (6) yields the following equation:

$$M=N{L}_P,$$

(8)

At the time t = d_BoT⁻, the switch S_Bo turns off, and the diode D_Bo is forced into the on state. The primary inductor L_P is connected in series with the secondary inductor L_S to release energy. The coupled inductor and the input voltage V_DC simultaneously transfer energy to the output and charge the capacitor C_o, as shown in Figure 9b. Since the primary and the secondary inductor currents are equal, the primary inductor current i_LP(d_BoT⁺) after switch S_Bo turns off can be determined by the law of energy conservation as follows:

$$i_{LP}(d_{Bo}{T}^{+})=i_{LS}(d_{Bo}{T}^{+})=\frac{1}{(1+N)}\times i_{LP}(d_{Bo}{T}^{-}),$$

(9)

When the switch S_Bo is in the off state, the voltage across the coupled inductor can be expressed as

$$v_{LP}+v_{LS}=(V_{DC}-v_o(t))=(L_P+L_S+2M)\times \frac{d{i}_{LP}}{dt},$$

(10)

Substituting Equations (7) and (8) into Equation (10), it can be simplified as follows:

$$(V_{DC}-v_o(t))={(1+N)}^2{L}_P\times \frac{d{i}_{LP}}{dt},$$

(11)

During the time between d_BoT and T, the inductor current decreases linearly due to the negative voltage across the coupled inductor in Equation (11). The amount of inductor current change during this time interval can be expressed as follows:

$$\Delta i_{LP}{}_{\left(open\right)}=\Delta i_{LS}{}_{\left(open\right)}=\frac{(V_{DC}-v_o(t))\cdot (1-d_{Bo})\times T}{{(1+N)}^2\times L_P},$$

(12)

From Equations (9) and (12), the minimum current on the primary winding of the coupled inductor i_LP(T⁻) can be expressed as follows:

$$i_{LP}(T^{-})=i_{LP}(d_{Bo}{T}^{+})+\Delta i_{LP}{}_{\left(open\right)}=\frac{i_{LP}(d_{Bo}{T}^{-})}{(1+N)}+\frac{(V_{DC}-v_o(t))\cdot (1-d_{Bo})\times T}{{(1+N)}^2{L}_P},$$

(13)

Substituting Equation (5) into Equation (13), the following equation is obtained:

$$i_{LP}(T^{-})=\frac{1}{(1+N)}\left[i_{LP}(0^{+})+\frac{V_{DC}\cdot d_{Bo}T}{L_P}\right]+\frac{(V_{DC}-v_o(t))(1-d_{Bo})T}{{(1+N)}^2{L}_P},$$

(14)

At the time t = T_S, the switch S_Bo1 turns on, and the primary inductor current can be obtained by the law of energy conservation as follows:

$$i_{LP}(T^{+})=(1+N)\times i_{LP}(T^{-}),$$

(15)

In steady-state operation, since the current i_LP(T⁺) is equal to i_LP(0⁺), the output voltage gain can be obtained by substituting Equation (15) into Equation (14) as follows:

$$\frac{v_o\left(t\right)}{V_{DC}}=\frac{1+N{d}_{Bo}\left(t\right)}{1-d_{Bo}\left(t\right)},$$

(16)

By expressing the output voltage v_o(t) as V_M·sinωt, the duty ratio of the switch S_Bo in step-up mode can be obtained as follows:

$$d_{Bo}\left(t\right)=\frac{V_M\cdot \sin \omega t-V_{DC}}{V_M\cdot \sin \omega t+N{V}_{DC}},$$

(17)

Moreover, when the proposed inverter operates in step-up mode during the negative half-cycle (T_o/2 < t < T_o), the switches S_Bu1, S_Bu4 are in the off state, and the switches S_Bu2, S_u3 are in the on state. The switch S_Bo keeps switching with high frequency, and the operation principles are the same as those for the positive half-cycle. The equivalent circuits for when switch S_Bo is turning on and off are shown in Figure 10a,b, respectively.

According to the analysis above, the status of all switching elements is listed in

Table 1. Status of switching elements of the proposed high-gain inverter.

Element	Positive Half-Cycle (0 < t < To/2)		Negative Half-Cycle (To/2 < t < To)
	Step-Down Mode	Step-Up Mode	Step-Down Mode	Step-Up Mode
SBu1	Switching with dBu1(t)	Always on	Switching with (1 − dBu1(t))	Always off
SBu2	Switching with (1 − dBu1(t))	Always off	Switching with dBu1(t)	Always on
SBu3	Always off	Always off	Always on	Always on
SBu4	Always on	Always on	Always off	Always off
SBo	Always off	Switching with dBo(t)	Always off	Switching with dBo(t)
DBo	Always on	Switching with (1 − dBo(t))	Always on	Switching with (1 − dBo(t))

. It can be clearly understood that the proposed inverter has only two power elements switching with high frequency in both step-down and step-up modes; therefore, switching losses can be reduced to improve the efficiency.

4. Design Considerations

To explain how to determine the component parameters, the design considerations of the coupled inductor, the semiconductor components, and the output filter are addressed in this section.

4.1. Boundary Condition of the Coupled Inductor

If the coupled inductor operates in boundary conduction mode (BCM), the minimum current on the primary side i_LP(T⁻), as shown in Figure 8, will reach zero just before the switch S_Bo enters the next switching cycle. In BCM, the average inductor current I_LB within one high-frequency cycle can be calculated as follows:

$$I_{LB}=\frac{1}{2}{\Delta i}_{LP\left(\mathrm{close}\right)}{\times d}_{Bo}+\frac{1}{2}{\Delta i}_{LP\left(\mathrm{open}\right)}\times (1-d_{Bo})$$

(18)

The amount of current increase and decrease on the primary winding in BCM have the following relationship:

$${\Delta i}_{LP\left(\mathrm{open}\right)}=\frac{{\Delta i}_{LP\left(\mathrm{close}\right)}}{(1+N)}$$

(19)

Substituting Equation (19) into Equation (18) gives

$$I_{LB}=\frac{∆i_{LP\left(\mathrm{close}\right)}{ \times (1+Nd}_{Bo})}{2(1+N)}$$

(20)

Substituting Equation (4) into Equation (20) yields

$$I_{LB}=\frac{V_{DC}{ \times d}_{Bo}{T \times (1+Nd}_{Bo})}{{2L}_P(1+N)}$$

(21)

Since the average current I_LB is equal to the instantaneous input current, the boundary condition I_o(B) of the instantaneous output current can be obtained from Equations (16) and (21), and the relationship of power balance as follows:

$$I_{o\left(B\right)}=\frac{V_{DC}{ \times d}_{Bo}T \times (1-d_{Bo})}{{2L}_P(1+N)}$$

(22)

When the instantaneous output current i_o(t) is equal to I_o(B), the proposed inverter operates in BCM, and the boundary inductance of the primary winding L_P(B) can be obtained as follows:

$$L_{P\left(B\right)}=\frac{V_{DC}{ \times d}_{Bo}T \times (1-d_{Bo})}{{2\times i}_o\left(t\right)\times (1+N)}$$

(23)

4.2. Voltage Stresses of the Power Components

When the switch S_Bo turns off in step-up mode, as shown in Figure 9b, the maximum voltage stress on S_Bo occurs at the peak output voltage, and can be expressed as follows:

$$V_{ds, Bo\left(\mathrm{Max}\right)}{=V}_{DC}+\frac{V_M-V_{DC}}{1+N}$$

(24)

When the switch S_Bo turns on, the diode D_Bo is forced to turn off, as shown in Figure 9a. The maximum voltage stress on D_Bo also occurs at the peak output voltage, and can be expressed as follows:

$$V_{D-Bo\left(\mathrm{Max}\right)}{=NV}_{DC}{+V}_M,$$

(25)

The maximum voltage stress on both the capacitor C_o and the capacitor C_f is the peak output voltage V_M, and can be expressed as follows:

$$V_{Co\left(\mathrm{Max}\right)}{=V}_{Cf\left(\mathrm{Max}\right)}{=V}_M,$$

(26)

According to Figure 9 and Figure 10, the voltage stresses on the switches S_Bu1, S_Bu2, S_Bu3 and S_Bu4 are equal to the voltage across the capacitor C_o. Therefore, the maximum voltage stresses on these four switches of the unfolding circuit can expressed as follows:

$$V_{ds, Bu1\left(\mathrm{Max}\right)}{=V}_{ds, Bu2\left(\mathrm{Max}\right)}{=V}_{ds, Bu3\left(\mathrm{Max}\right)}{=V}_{ds, Bu4\left(\mathrm{Max}\right)}{=V}_M.$$

(27)

4.3. Current Stresses of the Power Components

When the inverter operates in step-up mode and the switch S_Bo turns on, the current in the primary winding of the coupled inductor rises. When the output voltage v_o reaches the peak V_M, the current stress on the primary winding reaches its maximum, as indicated below:

$$I_{LP\left(\mathrm{Max}\right)}=\frac{V_{M }{(1+Nd}_{Bo})}{R(1-d_{Bo})}+\frac{V_{DC}{d}_{Bo}T}{L_P}$$

(28)

When the switch S_Bo turns off, the diode D_Bo is forward biased. The primary and secondary windings are connected in series to the discharge, so the maximum current stress of the secondary winding can be known from Equations (9) and (28), as follows:

$$I_{LS\left(\mathrm{Max}\right)}{=I}_{LP\left(\mathrm{Max}\right)}\times \frac{1}{(1+N)}=\left[\frac{V_{M }{(1+Nd}_{Bo})}{R(1-d_{Bo})}+\frac{V_{DC}{d}_{Bo}T}{L_P}\right] \times \frac{1}{(1+N)}$$

(29)

In step-up mode, the maximum current stress on the switch S_Bo1 is the same as that of the primary winding, expressed as follows:

$$I_{ds, Bo\left(\mathrm{Max}\right)}{=I}_{LP\left(\mathrm{Max}\right)}=\frac{V_{M }{(1+Nd}_{Bo})}{R(1-d_{Bo})}+\frac{V_{DC}{d}_{Bo}T}{L_P}$$

(30)

Additionally, when the diode D_Bo is conducting, its maximum current stress is the same as that of the secondary winding, expressed as follows:

$$I_{DBo\left(\mathrm{Max}\right)}{=I}_{LS\left(\mathrm{Max}\right)}=\left[\frac{V_{M }{(1+Nd}_{Bo})}{R(1-d_{Bo})}+\frac{V_{DC}{d}_{Bo}T}{L_P}\right] \times \frac{1}{(1+N)}$$

(31)

Assuming that the output high-frequency current ripple can be completely filtered out and ignored, the current stresses of the switches S_Bu1, S_Bu2, S_Bu3, S_Bu4, and the inductor L_S are the same as the output current, and their maximum values can be expressed as follows:

$$I_{ds, Bu1\left(\mathrm{Max}\right)}{=I}_{ds, Bu2\left(\mathrm{Max}\right)}{=I}_{ds, Bu3\left(\mathrm{Max}\right)}{=I}_{ds, Bu4\left(\mathrm{Max}\right)}{=I}_{Lf\left(\mathrm{Max}\right)}=\frac{V_{M }}{R}$$

(32)

4.4. Selection of the Output Filter

When the converter operates in step-down mode, the full-bridge unfolding circuit is controlled by SPWM, and the inductor L_f is used for energy storage. The boundary inductance of L_f can be expressed as follows:

$$L_{f\left(B\right)}=\frac{R \times (1-d_{Bu1})T}{2}$$

(33)

The inverter can operate in the CCM of step-down mode by selecting the inductance of L_f to be greater than the boundary inductance L_f(B).

In addition, the inductor L_f and the capacitor C_f are used as a low-pass filter in step-up mode, and its cut-off frequency f_c can be expressed as:

$$f_c=\frac{1}{2\mathsf{\pi }\sqrt{L_f{C}_f}}$$

(34)

Once the inductance of L_f is determined, the capacitance of C_f can be designed on the basis of Equation (34) according to the desired cut-off frequency.

5. Experimental Results

To verify the feasibility of the proposed high-gain inverter, an experimental prototype was built according to the electrical specifications listed in

Table 2. Electrical specifications of the proposed high-gain inverter.

Electrical Specifications
Input voltage, VDC	100–200 (V)
Output voltage, vo	220 (Vrms)
Line frequency, fo	60 (Hz)
Output power, Po	500 (W)
Switching frequency, f	20 (kHz)
Switching period, T	50 (μs)

. The prototype was tested using input voltages between 100 V and 200 V, in order to verify that the proposed inverter is suitable for PV panels with wide-range voltage variations. Additionally, the output voltage was selected as 220 V_rms in order to prove the high boosting capacity of the proposed inverter.

On the basis of the output voltage of 220 V_rms and the output power of 500 W, the equivalent load resistance (R) can be calculated as being 96.8 Ω. By selecting the BCM of step-down mode at an instantaneous output current i_o(t) of 0.6 A and an input voltage V_DC of 100 V, the boundary inductance of L_f can be calculated as being about 1 mH using Equation (33). By selecting a cut-off frequency f_c of 5 kHz, the capacitance of C_f can be obtained using Equation (34) as 1 μF.

To ensure that the maximum duty ratio is below 0.5, the turn ratio N is chosen as 1.5. At the input voltage of 100 V and the peak output voltage of 312 V, the maximum duty ratio can be calculated using Equation (17) as being around 0.46. Additionally, the condition of peak output current and 40% load is selected to operate in BCM, thus avoiding excessive values of primary inductance and the saturation of the magnetic core. From Equation (23), the boundary inductance of the primary winding L_P(B) can be obtained as being about 193 μH. In the actual design, 200 μH is used as the primary inductance, and the secondary inductance of 450 μH can be obtained from Equation (7). Based on the previous design and calculations, the selected component parameters of the experimental prototype are summarized in

Table 3. Component parameters of the proposed high-gain inverter.

Component Parameters
MOSEET, SBo	SPW47N60C3 (650 V/47 A)
MOSEETs, SBu1, SBu2, SBu3 and SBu4	IRFP460 (500 V/20 A)
Diode, DBo	C4D10120A (1200 V/14 A)
Turn Ratio, N	1.5
Primary Inductance, LP	200 μH
Secondary Inductance, LS	450 μH
Capacitor, Co	1 μF
Inductor, Lf	1 mH
Capacitor, Cf	1 μF

.

Figure 11 shows the measured waveforms of the output voltage v_o(t) and the output current i_o(t) under the condition of 100 V input voltage and 500 W output power. It can be seen that the output voltage and current are both near-ideal sinusoidal waves with low distortion, verifying that the proposed circuit is indeed capable of converting DC input to AC output.

Figure 12 shows the measured waveforms of the gate-driving signals of the switches S_Bo, S_Bu1 and S_Bu2 under the condition of 100 V input voltage and 500 W output power. When the absolute output voltage |v_o(t)| is lower than 100 V, the proposed inverter operates in step-down mode. The switches S_Bu1 and S_Bu2 switch with high frequency, and the switch S_Bo remains in the off state. Conversely, the proposed inverter operates in step-up mode. The switch S_Bo is switching with high frequency, and the switches S_Bu1 and S_Bu2 perform low-frequency switching only to switch the polarity of output voltage.

Figure 13 shows the measured waveforms of the currents and the voltages of the coupled inductor. From Figure 13a, the coupled inductor functions as a filter in step-down mode, so that the voltages v_LP and v_LS are almost zero. When the inverter operates in step-up mode, the voltages v_LP and v_LS vary with high-frequency switching of the switch S_Bo. Figure 13b shows the zoomed-in waveforms at the peak of the output voltage v_o(t). The inductor current i_LP is operated in CCM, verifying previous theoretical calculations and parametric design. Additionally, the inductor currents i_LP and i_LS are equal during the switch S_Bo turning off, because the primary and secondary inductors discharge in series.

To verify that the proposed inverter is suitable for a wide range of input voltages, the input voltage is increased to 200 V for testing. Figure 14 shows he measured waveforms of the output voltage v_o(t) and the output current i_o(t) under the condition of 200 V input voltage and 500 W output power. Both the output voltage and current can be maintained in low-distortion sine waves, which proves that the proposed inverter is suitable for a wide range of input voltages. The gate-driving signals at 200 V input voltage are shown in Figure 15. The control strategy is similar to that at 100 V input. Due to the higher input voltage, the time interval becomes longer for the step-down mode and shorter for the step-up mode.

Figure 16 presents the measured waveforms of the currents and the voltages of the coupled inductor. As shown in Figure 16a, the coupled inductor is still used as a filter in step-down mode, and the inductor voltages are almost zero. The waveforms are zoomed-in at the peak of the output voltage v_o(t) and shown in Figure 13b. Due to the higher input voltage, the duty ratio of the switch S_Bo is reduced, and the charging time of the primary inductor is shorter. During the switch S_Bo turning off, the inductor currents i_LP and i_LS are still the same, proving that the primary and secondary inductors are discharging in series to increase voltage gain.

The total harmonic distortion (T.H.D.) and odd-order harmonics of the output voltage at full load are measured and listed in

Table 4. The total harmonic distortion and odd-order harmonics of the output voltages.

Harmonic	100 V	200 V
T.H.D.	1.73%	1.13%
3rd Harmonic	1.57%	0.87%
5th Harmonic	0.36%	0.29%
7th Harmonic	0.24%	0.33%
9th Harmonic	0.11%	0.17%
11th Harmonic	0.07%	0.12%

. All measured harmonics comply with the standard of EN6100-3-2 Class C. The efficiency curves of the proposed inverter are illustrated in Figure 17. As can be seen, the conversion efficiencies reach up to 96.1% at 200V input voltage and up to 94.2% at 100V input voltage, verifying that the proposed inverter can indeed achieve high efficiency. Additionally, Figure 18 shows a photograph of the prototype hardware used for the experimental measurements, in which the dsPIC33FJ16GS504 development board is used to generate the P-SPWM driving signals, and a wire-wound resistor is used as a testing load.

To further verify that the proposed inverter has the ability to adjust with utility line voltage fluctuations, Figure 19 shows the experimental waveforms at 230 V_rms output and 100 V input. It can be seen that the output voltage is still a near-ideal sinusoidal wave with low distortions. Its measured T.H.D. is 1.75%, which is slightly higher than that of 220 V_rms output.

6. Conclusions

A high-gain and high-efficiency inverter with magnetic coupling was successfully developed and implemented. The digital signal processor dsPIC33FJ16GS504 was used to generate the gate-driving signals of the proposed inverter, which can simplify the complexity of the control circuit and improve the reliability. As the instantaneous output voltage changes, the proposed circuit sequentially operates in step-down and step-up modes. In each operation mode, only one energy processing is required to obtain the desired output voltage. In addition, to significantly reduce switching losses, conversion efficiency can be effectively improved because part of the energy is delivered directly to the output load. Additionally, by adding a coupled inductor to the boost circuit, the voltage gain of the proposed inverter can be increased, so that it is suitable for applications with low input voltage.