# Analytical Estimation of Power Losses in a Dual Active Bridge Converter Controlled with a Single-Phase Shift Switching Scheme

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## Abstract

**:**

## 1. Introduction

## 2. Dual Active Bridge DC/DC Converter

_{2}/N

_{1}and an additional inductor L

_{d}. The DAB converter may be driven using various control methods. Due to its simplicity of implementation, small inertia, and satisfactory dynamic performance, the single phase shift (SPS) switching scheme, where all transistors are switched with a 50% duty cycle ratio and the phase-shift ϕ is used to control the power flow (Figure 1b), was the most common scheme. Nevertheless, using SPS control causes a reduction in the operating range in which semiconductors are switched to soft conditions, especially when the input-to-output voltage ratio is significantly different from 1. Another disadvantage of the application of the SPS modulation scheme is an increase in the rms value of the transformer current at the converter’s low output power. As a result, a significant reactive power flow is then observed, which increases the conduction loss and the current stress of transistors and diodes [22,23]. To improve the converter efficiency by reducing the circulating power flow and limiting the current rms value, other control methods, which provide an extra degree of freedom, have been proposed such as extended phase shift (EPS), dual phase shift (DPS), or triple phase shift (TPS) modulation [24,25].

## 3. Currents Estimation in a DAB Converter

- -
- L
_{d}—inductance of the additional inductor; - -
- L
_{δ}_{1}, L_{δ}_{2}′—leakage inductance of each transformer winding converted to the bridge H_{1}side: L_{δ}_{2}′ = L_{δ}_{2}/n^{2}; - -
- L
_{δ}_{2}—leakage inductance of transformer winding at the H_{2}bridge side;n = N_{2}/N_{1}—transformer turns ratio.

_{2}bridge voltages and currents are also referred to the H

_{1}bridge side.

_{1}and u

_{2}/n with a 50% duty cycle (Figure 3).

_{1}and H

_{2}are controlled by the phase shift ϕ. To simplify the calculations, the impact of the transistors’ dead time may be neglected. Similarly, it can be assumed that the values of voltages U

_{DC}

_{1}and U

_{DC}

_{2}/n are high enough, which enables the voltage drop to be omitted at the transistors and diodes. In brief, positive values of the phase shift are used when U

_{DC}

_{1}> U

_{DC}

_{2}/n, however, for a negative value of ϕ, the results may be obtained using a similar approach. In Figure 4, exemplary theoretical waveforms are presented, when U

_{DC}

_{1}< U

_{DC}

_{2}/n and ϕ > 0.

_{L}, affecting the inductances in the AC-link, is described by:

- -
- for the time interval t
_{A}:$${u}_{L\left(A\right)}={u}_{1}-\frac{{u}_{2}}{n}={U}_{DC1}+\frac{{U}_{DC2}}{n},$$ - -
- for the time interval t
_{B}:$${u}_{L\left(B\right)}={u}_{1}-\frac{{u}_{2}}{n}={U}_{DC1}-\frac{{U}_{DC2}}{n}.$$

_{L}in specified time moments is described by:

_{DC}

_{1}and I

_{DC}

_{2}are given by:

_{A}= T

_{S}/2 − t

_{B}and substitutions (2) and (3) to (8), (9) leads to:

_{DC}

_{1(av)}or I

_{DC}

_{2(av),}n and U

_{DC}

_{1}or U

_{DC}

_{2}, the length of the time interval t

_{B}may be easily extracted by solving Equations (9) or (10). Next, the length of interval t

_{A}may be obtained for a specified switching time T

_{S}, which allows for a calculation of the values of current i

_{L}at characteristic moments of the DAB converter operating cycle.

## 4. Estimation of Transistor and Diode Power Losses

_{T}of a single transistor operating in a H-bridge is the sum of commutation losses and conduction loss P

_{C}

_{(T)}:

_{ON}

_{(T)}and P

_{OFF}

_{(T)}are the turn-on and turn-off switching losses, also called the commutation losses. The total power loss of a single diode P

_{D}may be defined in an analogous way.

_{D}(u

_{DS}) (Figure 5) allows one to estimate a voltage drop u

_{DS}depending on a drain current i

_{D}:

_{DS}

_{(N)}and I

_{D}

_{(N)}are the rated values of the transistor drain-to-source voltage u

_{DS}and drain current i

_{D}(given in the manufacturer’s datasheet).

_{DZ}(u

_{D}), the voltage drop u

_{D}caused by a flow of current i

_{DZ}may be calculated as:

_{FO}is a diode threshold voltage and r

_{D}is the diode dynamic resistance r

_{D}= Δu

_{D}/Δi

_{DZ}(Figure 5).

_{S}are given as follows:

- -
- for MOSFET:$${P}_{C\left(T\right)}=\frac{{U}_{DS\left(N\right)}}{{I}_{D\left(N\right)}{T}_{S}}{{\displaystyle \int}}_{{t}_{0}}^{{t}_{O}+{T}_{S}}{\left[{i}_{D}\left(t\right)\right]}^{2}dt=\frac{{U}_{DS\left(N\right)}}{{I}_{D\left(N\right)}}\cdot {I}_{D\left(rms\right)}{}^{2}$$
- -
- and for the diode:$${P}_{C\left(D\right)}={U}_{FO}\cdot {I}_{DZ\left(av\right)}+{r}_{D}\cdot {I}_{DZ\left(rms\right)}{}^{2},$$
_{D}_{(rms)}and I_{DZ}_{(rms)}are rms values of transistor and diode currents and I_{DZ}_{(av)}is an average value of a diode current i_{DZ}calculated for one switching period T_{S}.

_{D}reaches the value of the load current I

_{O}before the reduction in the drain-to-source voltage u

_{DS}[26] (Figure 7).

_{Z}reverse recovery, during the first stage of the turn-on process, the drain current rises to the value, which is a sum of the absolute values of load current I

_{O}and reverse recovery current I

_{RM}of diode D

_{Z}(Figure 7b). Considering the waveforms presented in Figure 6, the transistor current i

_{D}derivative with time is expressed by:

_{D}rise time t

_{RI}, a MOSFET gate circuit should be analyzed (Figure 8). During the transistor switching process, which is caused by drive voltage U

_{DR}changes, transistor parasitic capacitances C

_{GD}and C

_{GS}are recharged by the gate current i

_{G}[27]:

_{G}may also be described by the equation:

_{G}is an external gate resistance. In the manufacturer’s datasheet, the values of capacitances C

_{GD}and C

_{GS}are given as an input capacitance C

_{iss}and a reverse transfer capacitance C

_{rss}with the following relationships:

_{D}rise phase of the turn-on process, to simplify the calculations, it can be assumed that the voltage u

_{DS}remains constant and its derivative with time equals zero (Figure 7). Hence, Equation (22) may be modified as follows:

_{RI}is given by:

_{GS}

_{(TH)}is a MOSFET gate threshold voltage and U

_{GS}

_{(P)}is a minimal value of the gate-to-source voltage, enabling the conduction of the load current I

_{O}. These values may be obtained from a datasheet transfer characteristic i

_{D}(u

_{GS}). After the calculation of parameter t

_{RI}, the value of derivative di

_{D}/dt may be easily estimated using (16).

_{RM}and diode reverse recovery time t

_{RR}should be evaluated (Figure 7b). To solve this problem, a number of analytical methods using datasheet information have been proposed. For example, in [28], a regression method was proposed to obtain the reverse-recovery parameters during switching intervals, and in [29], a set of equations including, additionally, the impact of parasitic inductances and diode capacitance, was proposed. These methods offer satisfactory accuracy with a maximum error of parameter estimation lower than 10%, however, their application seems to be complex and time consuming. Considering the waveforms presented in Figure 7b, the values of parameters t

_{RR}, I

_{RM}, and Q

_{RR}depend on the load current I

_{O}, diode current derivative with time a

_{iDz}, and temperature [30]. In this paper, to be concise, the effect of temperature was omitted. Based on the results of the measurements and the manufacturer’s data, the following empirical relations enabling the estimation of t

_{RR}and I

_{RM}for various values of load current I

_{O}and a

_{iDZ}= di

_{DZ}/dt were derived:

- -
- -
- t
_{RR}_{(N)}is a nominal value of the diode D_{Z}reverse recovery time measured for the nominal load current I_{O}_{(N)}and nominal derivative with time of the diode current A_{iDZ}_{(N)}. These nominal values are usually given in the manufacturer’s datasheet.

_{RI}′ (Figure 7b) is given by:

_{DS}starts to fall and, by the end of interval t

_{FV}, the recombination process of the diode charge is finished—voltage u

_{DS}is reduced to zero and the diode current is zero (Figure 7b) [12]. Factually, at that moment, the diode current was limited to about 10% of I

_{RM}and the voltage u

_{DS}was reduced to the value resulting from the voltage drop on the conducting transistor. Hence, the transistor voltage fall time t

_{FV}is described by:

_{RI}′ and t

_{FV}, the turn-on power loss of the MOSFET P

_{ON}

_{(T)}under hard switching conditions is expressed by:

_{DS}voltage reaches the value of the supply voltage U

_{DC}before a reduction in the drain current i

_{D}(Figure 9) [26,31]. Analyzing the MOSFET turn-off process (Figure 9), two characteristic phases may be recognized:

- -
- during time interval t
_{RV}, voltage u_{DC}rises to U_{DC}; - -
- during time interval t
_{FI}, drain current i_{D}decreases do zero.

_{RV}, assuming the gate-to-source voltage u

_{GS}is constant, the transistor is turned off within the flat Miller Plateau Region. Because u

_{GS}= U

_{GS}

_{(P)}and du

_{GS}/dt = 0, Equation (22) may be simplified:

_{D}fall time may also be derived in an analogous way:

_{1}and T

_{4}in bridge H

_{1}is switched on when diodes D

_{1}and D

_{4}conduct, which forms soft switching conditions. Similarly, the turn-on process of transistors T

_{2}and T

_{3}also occurs under ZCS (zero current switching) conditions. Hence, it can be assumed that the turn-on power loss for these transistor pairs P

_{ON}

_{(T)}= 0. At moments t

_{4}and t

_{7}, transistor pairs T

_{1}, T

_{4}and T

_{2}, T

_{3}are switched off. In this study, the least favorable operating conditions of semiconductors were assumed, hence, to calculate the power loss P

_{OFF}

_{(T)}from Equation (36), it was assumed that transistor pairs T

_{1}, T

_{4}and T

_{2}, T

_{3}were turned off under hard-switching conditions with a current i

_{T}

_{1,T4}(t

_{4}) = i

_{T}

_{2,T3}(t

_{7}) = −I

_{1}= I

_{3}and supply voltage U

_{DC}= U

_{DC}

_{1}. From Figure 3, it can also be distinguished, that if I

_{2}< 0, then transistors T

_{5}, T

_{8}are switched on and diodes D

_{6}, D

_{7}are turned off under hard-switching conditions. To calculate transistor T

_{5}turn-on power losses P

_{ON}

_{(T5)}and diode D

_{6}turn-off power losses P

_{OFF}

_{(D6)}, Equations (31) and (32) should then be used for U

_{DC}= U

_{DC}

_{2}and I

_{O}= I

_{2}/n. The turn-off process of transistors T

_{5}, T

_{8}occurs under ZCS conditions, hence, the commutation loss P

_{OFF}

_{(T5)}equals zero. If I

_{2}> 0, the transistor T

_{5}, T

_{8}turn-on process ensues when diodes D

_{1}, D

_{4}conduct, which allows for the development of soft-switching conditions. Nevertheless, the H

_{2}bridge transistors’ turn-off process occurs under hard switching conditions. To calculate the commutation power loss P

_{OFF}

_{(T5)}, Equation (36) may be applied for U

_{DC}= U

_{DC}

_{2}and I

_{O}= I

_{2}/n. Notably, that power loss may be calculated only for one transistor and diode for each of bridges H

_{1}and H

_{2}. Hence, the power loss of transistor T

_{1}is given by:

_{1}conduction power loss P

_{C}

_{(T1)}may be calculated from (14):

_{T}

_{1(rms)}

^{2}is obtained by:

_{2}< 0 (from Figure 3a):

_{2}> 0 (from Figure 3b):

_{OFF}

_{(T1)}is described in Equation (36). Because diode D

_{1}is turned off under soft-switching conditions, only a conduction loss (see Equation (15)) may be taken into account:

_{D}

_{1(av)}and I

_{D}

_{1(rms)}

^{2}are given as follows:

_{2}< 0 (from Figure 3a):

_{2}> 0 (from Figure 3b):

_{1}, I

_{2}, and I

_{3}, the length of the time intervals (t

_{2}– t

_{1}), (t

_{3}– t

_{2}), and (T

_{S}/2 – t

_{3}) for specific values of voltage U

_{DC}

_{1}and U

_{DC}

_{2}/n may be obtained from modified Equations (4)–(6).

_{1}bridge transistors is equal to:

_{1}diodes are given by:

_{1}is equal to:

_{TH}

_{2}) and diodes (P

_{DH}

_{2}) in a H

_{2}bridge may be obtained in an analogous way.

## 5. Transformer Losses

_{TR}is a sum of the power loss in the core P

_{FE}, and the power losses generated in the primary and secondary windings are P

_{CU}

_{(prim)}and P

_{CU}

_{(sec)}.

_{FE}, a modified Steinmetz’s formula may be used, which for rectangular voltages is given as follows [32,33]:

- -
- f—inducplified waveforms of voltages;
- -
- B
_{M}—induction peak value [T]; - -
- T
_{C}—core temperature [°C]; - -
- V
_{C—}core volume [cm^{3}].

_{Lm}affecting the magnetizing inductance L

_{m}is described by:

_{1}and u

_{2}/n were equal to, respectively, ±U

_{DC}

_{1}and ±U

_{DC}

_{2}/n. From (51), it may be distinguished that the worst working conditions of core occurred when L

_{d}= 0 and L

_{δ}

_{2}= L

_{δ}

_{2}′. Hence, the magnetizing voltage u

_{Lm}is then given by:

_{M}reaches the maximum possible values. Based on waveforms presented in Figure 11, B

_{M}may be described in the following way:

- -
- if U
_{DC}_{1}= U_{DC}_{2}/n (Figure 11a):$${B}_{M}=\frac{\Delta {B}_{1}}{2}=\frac{{U}_{DC1}}{2{N}_{1}{S}_{c}}{t}_{B},$$ - -
- if U
_{DC}_{1}> U_{DC}_{2}/n (Figure 11b):$${B}_{M}=\frac{\Delta {B}_{1}+\Delta {B}_{2}}{2}=\frac{1}{4{N}_{1}{S}_{c}}\left[{U}_{DC1}\frac{{T}_{S}}{2}+\frac{{U}_{DC2}}{n}{t}_{B}\right],$$ - -
- if U
_{DC}_{1}< U_{DC}_{2}/n (Figure 11c):$${B}_{M}=\frac{\Delta {B}_{1}+\Delta {B}_{2}}{2}=\frac{1}{4{N}_{1}{S}_{c}}\left[{U}_{DC1}{t}_{B}+\frac{{U}_{DC2}}{n}\frac{{T}_{S}}{2}\right],$$_{C}is a cross-sectional area of the core.

_{CU}, calculations may be performed for the windings’ resistance measured for the switching frequency f

_{S}= 1/T

_{S}and the rms value of the windings’ currents according to the formula [32]:

_{CU}

_{(prim)}, R

_{CU}

_{(sec)}are the resistances of the transformer windings (respectively at the H

_{1}bridge side and H

_{2}bridge side) measured for the switching frequency f

_{S}; I

_{1(rms)}is the rms value of the transformer current at the bridge H

_{1}side; I

_{2(rms)}is the rms value of the transformer current at the bridge H

_{2}side given by:

## 6. Validation

_{IN}and output P

_{OUT}power (Figure 12) of the tested DAB converter, a Yokogawa WT5000 precision power analyzer was used. Importantly, the experimental measurements were performed for the DAB converter in a basic configuration without any additional sub-circuits (e.g., start-up resistors were disconnected). Voltages U

_{DC}

_{1}and U

_{DC}

_{2}were kept at a constant level U

_{DC}

_{1}= 670 V and U

_{DC}

_{2}= 385 V and the output P

_{OUT}power was controlled by changes in the load resistance R

_{L}. In the applied laboratory conditions, the maximum output power was limited to 5 kW due to the limitation of the measurement range of the used power analyzer. Waveforms of the current i

_{1}and voltage u

_{1}in the AC circuit were measured using a Tektronix DPO3034 oscilloscope equipped with the high-voltage differential probe P5210A and the current probe TCP404XL.

_{DC}

_{1(av)}was evaluated. For the known values of the output power P

_{OUT}and voltage U

_{DC}

_{2}, based on Equations (7)–(10), the average value of the input current was calculated and compared with the experimental results. The maximum noted difference between the estimated and measured values did not exceed 10% and the accuracy increased with the growth in the output power and input current value (Figure 13). Crucially, the proposed analytical approach was simplified, so the impact of some factors (e.g., time dead influence) was not factored in. As a result, the accuracy of the estimation at a lower level of load may be worse.

_{OUT}) characteristic followed the shape of the measured one with the highest accuracy noted for the output power exceeding 50% of the maximum out-power. The maximum noted efficiency for the tested DAB converter in a specific range of output power up to 5 kW reached 98%, which was confirmed by both the experimental and analytical results.

_{1}and H

_{2}. Notably, the considered DAB converter operated in conditions that correlated with the theoretical current and voltage waveforms presented in Figure 4a. As a result, transistors T

_{1}–T

_{4}were turned on under hard-switching conditions with current I

_{1}> 0 and I

_{1}= −I

_{3}. Thus, the commutation power losses in bridge H

_{1}resulted from the transistor’s turn-on process and the reverse recovery process of diodes D

_{1}–D

_{4}. Because value I

_{1}decreases with the growth of the DAB output power (Figure 16), the commutation losses in bridge H

_{1}also decrease, so, as a consequence, the bridge H

_{1}total power loss P

_{H}

_{1}is reduced.

_{5}–T

_{8}were turned off under hard-switching conditions with the current determined by the value of I

_{2}/n = −I

_{4}/n. Similarly, since the I

_{2}value increased with the growth of the out-power P

_{OUT}(Figure 16), the transistor’s commutation losses increased, so in bridge H

_{2}, the total power loss P

_{H}

_{2}grew. From Figure 15, the transformer loss P

_{TR}obtained using Equation (49) was significantly lower than the losses noted for bridges H

_{1}and H

_{2}.

_{1}and H

_{2}were mainly determined by switching losses, however, the share of conduction losses increased with the growth in the DAB converter output power, which resulted from Equations (14) and (15) (Figure 17).

_{TR}are determined by the loss in the core P

_{FE}(Figure 18). In the tested DAB converter, for the specified range of output power up to 5 kW, the value t

_{B}changed within a small range (coefficient t

_{B}/(0.5T

_{S}) does not fall below 0.95), hence, according to Equations (50)–(55), a slight reduction in the core loss P

_{FE}was observed. The windings’ total power loss P

_{CU}depends on the rms value of the primary and secondary windings currents, so it should grow with the increase in the DAB converter output power, which was confirmed by the results of the analytical calculations.

_{2}to H

_{1}. In this case, the obtained analytical characteristic η(P

_{OUT}) was also confirmed by the results of the experimental measurements, which validated the adopted approach (Figure 19). Moreover, the results of a detailed analysis of power loss distribution were also convergent with the description above.

_{1}to H

_{2}, are presented in Figure 20a. Higher accuracy of the proposed solution was noted, especially for the light load of the converter. At higher loads, the predominance of the proposed method was also distinguishable. However, the difference between the measured and estimated results using the approach in [19] decreased with the growth in the output power P

_{OUT}. One of the main assumptions of the method in [19] is that all transistors are switched-on under soft conditions. It should be noted that considering the assumed direction of energy flow, the transistors in bridge H

_{1}are turned on under hard-switching conditions. As a result of the transistors’ turn-on power losses omission, the total losses of bridge H

_{1}were underestimated, as presented in Figure 20b. Both compared methods enabled the estimation of the transistors’ turn-off losses. However, to simplify the calculations, in the method [19], constant values of the current fall time were assumed. For the converter light load, the obtained power losses of bridge H

_{2}were comparable. However, the difference between the calculated results slightly increased with the growth in the output power P

_{OUT}.

## 7. Conclusions

## Author Contributions

## Funding

## Conflicts of Interest

## References

- Han, W.; Ma, R.; Liu, Q.; Corradini, L. A conduction losses optimization strategy for DAB converters in wide voltage range. In Proceedings of the IECON 2016-42nd Annual Conference of the IEEE Industrial Electronics Society, Florence, Italy, 23–26 October 2016; pp. 2445–2451. [Google Scholar] [CrossRef]
- Zeng, J.; Rao, Y.; Lan, Z.; He, D.; Xiao, F.; Liu, B. Multi-Objective Unified Optimal Control Strategy for DAB Converters with Triple-Phase-Shift Control. Energies
**2021**, 14, 6444. [Google Scholar] [CrossRef] - Zhu, M.; Shao, C.; Wang, S.; Hang, L.; He, Y.; Fan, S. System Design of Dual Active Bridge (DAB) Converter Based on GaN HEMT Device. In Proceedings of the 2019 22nd International Conference on Electrical Machines and Systems (ICEMS), Harbin, China, 11–14 August 2019; pp. 1–6. [Google Scholar] [CrossRef]
- Xu, X.; Bao, G.; Ma, M.; Wang, Y. Multi-Objective Optimization Phase-Shift Control Strategy for Dual-Active-Bridge Isolated Bidirectional DC-DC Converter. Inf. MIDEM J. Microelectron. Electron. Compon. Mater.
**2021**, 51, 179. [Google Scholar] [CrossRef] - Hoang, K.D.; Wang, J. Design optimization of high frequency transformer for dual active bridge DC-DC converter. In Proceedings of the 2012 XXth International Conference on Electrical Machines, Marseille, France, 2–5 September 2012; pp. 2311–2317. [Google Scholar] [CrossRef] [Green Version]
- Yao, P.; Jiang, X.; Xue, P.; Li, S.; Lu, S.; Wang, F. Design Optimization of Medium-Frequency Transformer for DAB Converters with DC Bias Capacity. IEEE J. Emerg. Sel. Top. Power Electron.
**2020**, 9, 5043–5054. [Google Scholar] [CrossRef] - Xiao, Y.; Zhang, Z.; Andersen, M.A.E.; Sun, K. Impact on ZVS Operation by Splitting Inductance to Both Sides of Transformer for 1-MHz GaN Based DAB Converter. IEEE Trans. Power Electron.
**2020**, 35, 11988–12002. [Google Scholar] [CrossRef] - Yan, H.; Zhao, W.; Buticchi, G.; Gerada, C. Active Thermal Control for Modular Power Converters in Multi-Phase Permanent Magnet Synchronous Motor Drive System. IEEE Access
**2021**, 9, 7054–7063. [Google Scholar] [CrossRef] - Mukunoki, Y.; Horiguchi, T.; Nakayama, Y.; Nishizawa, A.; Nakamura, Y.; Konno, K.; Kuzumoto, M.; Akagi, H. Modeling of a silicon-carbide MOSFET with focus on internal stray capacitances and inductances, and its verification. In Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp. 2671–2677. [Google Scholar] [CrossRef]
- Zhuolin, D.; Dong, Z.; Tao, F.; Xuhui, W. A simple SiC power MOSFET model. In Proceedings of the IECON 2017-43rd Annual Conference of the IEEE Industrial Electronics Society, Beijing, China, 29 October 2017–1 November 2017; pp. 704–708. [Google Scholar] [CrossRef]
- Rabkowski, J.; Płatek, T. A study on power losses of the 50 kVA SiC converter including reverse conduction phenomenon. Bull. Pol. Acad. Sci. Tech. Sci.
**2016**, 64, 907–914. [Google Scholar] [CrossRef] [Green Version] - Kolar, J.; Zach, F.; Casanellas, F. Losses in PWM inverters using IGBTs. IEE Proc. Electr. Power Appl.
**1995**, 142, 285–288. [Google Scholar] [CrossRef] - Meng, Z.; Wang, Y.-F.; Yang, L.; Li, W. Analysis of Power Loss and Improved Simulation Method of a High Frequency Dual-Buck Full-Bridge Inverter. Energies
**2017**, 10, 311. [Google Scholar] [CrossRef] [Green Version] - Mestha, L.K.; Evans, P.D. Optimisation of losses in PWM inverters. In Proceedings of the Third International Conference on Power Electronics and Variable-Speed Drives, London, UK, 13–15 July 1988; pp. 394–397. [Google Scholar]
- Gopalan, A. Calculating Power Dissipation for a H-Bridge or Half Bridge Driver. 2022. Available online: https://www.ti.com/lit/an/slva504a/slva504a.pdf (accessed on 1 October 2022).
- Barlik, R.; Nowak, M.; Grzejszczak, P. Power transfer analysis in a single phase dual active bridge. Bull. Pol. Acad. Sci. Tech. Sci.
**2013**, 61, 809–828. [Google Scholar] [CrossRef] [Green Version] - Saha, J.; Gorla, N.B.Y.; Subramaniam, A.; Panda, S.K. Analysis of Modulation and Optimal Design Methodology for Half-Bridge Matrix-Based Dual-Active-Bridge (MB-DAB) AC–DC Converter. IEEE J. Emerg. Sel. Top. Power Electron.
**2021**, 10, 881–894. [Google Scholar] [CrossRef] - De Freitas Lima, G.; Lembeye, Y.; Ndagijimana, F.; Crebier, J.-C. Modeling of a DAB under phase-shift modulation for design and DM input current filter optimization. In Proceedings of the 2020 22nd European Conference on Power Electronics and Applications (EPE’20 ECCE Europe), Lyon, France, 7–11 September 2020; pp. P.1–P.10. [Google Scholar] [CrossRef]
- Wang, Z.; Castellazzi, A. Device loss model of a fully SiC based dual active bridge considering the effect of synchronous rectification and deadtime. In Proceedings of the 2017 IEEE Southern Power Electronics Conference (SPEC), Puerto Varas, Chile, 4–7 December 2017; pp. 1–7. [Google Scholar] [CrossRef]
- Jean-Pierre, G.; Altin, N.; El Shafei, A.; Nasiri, A. Overall Efficiency Improvement of a Dual Active Bridge Converter Based on Triple Phase-Shift Control. Energies
**2022**, 15, 6933. [Google Scholar] [CrossRef] - Krismer, F.; Kolar, J.W. Accurate Power Loss Model Derivation of a High-Current Dual Active Bridge Converter for an Automotive Application. IEEE Trans. Ind. Electron.
**2009**, 57, 881–891. [Google Scholar] [CrossRef] - Das, A.K.; Fernandes, B.G. Fully ZVS, Minimum RMS Current Operation of Isolated Dual Active Bridge DC-DC Converter Employing Dual Phase-Shift Control. In Proceedings of the 2019 21st European Conference on Power Electronics and Applications (EPE ’19 ECCE Europe), Genova, Italy, 3–5 September 2019; pp. P.1–P.10. [Google Scholar] [CrossRef]
- Calderon, C.; Barrado, A.; Rodriguez, A.; Alou, P.; Lazaro, A.; Fernandez, C.; Zumel, P. General Analysis of Switching Modes in a Dual Active Bridge with Triple Phase Shift Modulation. Energies
**2018**, 11, 2419. [Google Scholar] [CrossRef] [Green Version] - Guzmán, P.; Vázquez, N.; Liserre, M.; Orosco, R.; Castillo, S.E.P.; Hernández, C. Two-Stage Modulation Study for DAB Converter. Electronics
**2021**, 10, 2561. [Google Scholar] [CrossRef] - Zhang, H.; Isobe, T. An Improved Charge-Based Method Extended to Estimating Appropriate Dead Time for Zero-Voltage-Switching Analysis in Dual-Active-Bridge Converter. Energies
**2022**, 15, 671. [Google Scholar] [CrossRef] - Ahmed, R.M.; Todd, R.; Forsyth, A.J. Predicting SiC MOSFET Behavior Under Hard-Switching, Soft-Switching, and False Turn-On Conditions. IEEE Trans. Ind. Electron.
**2017**, 64, 9001–9011. [Google Scholar] [CrossRef] - Agrawal, B.; Preindl, M.; Bilgin, B.; Emadi, A. Estimating switching losses for SiC MOSFETs with non-flat miller plateau region. In Proceedings of the 2017 IEEE Applied Power Electronics Conference and Exposition (APEC), Tampa, FL, USA, 26–30 March 2017; pp. 2664–2670. [Google Scholar] [CrossRef]
- Naseri, F.; Farjah, E.; Ghanbari, T. KF-based estimation of diode turn-off power loss using datasheet information. Electron. Lett.
**2019**, 55, 1082–1084. [Google Scholar] [CrossRef] - Kundu, U.; Sensarma, P. Accurate Estimation of Diode Reverse-Recovery Characteristics from Datasheet Specifications. IEEE Trans. Power Electron.
**2018**, 33, 8220–8225. [Google Scholar] [CrossRef] - Jahdi, S.; Alatise, O.; Bonyadi, R.; Alexakis, P.; Fisher, C.A.; Gonzalez, J.A.O.; Ran, L.; Mawby, P. An Analysis of the Switching Performance and Robustness of Power MOSFETs Body Diodes: A Technology Evaluation. IEEE Trans. Power Electron.
**2014**, 30, 2383–2394. [Google Scholar] [CrossRef] [Green Version] - Yin, S.; Liu, Y.; Liu, Y.; Tseng, K.J.; Pou, J.; Simanjorang, R. Comparison of SiC Voltage Source Inverters Using Synchronous Rectification and Freewheeling Diode. IEEE Trans. Ind. Electron.
**2017**, 65, 1051–1061. [Google Scholar] [CrossRef] - Barlik, R.; Nowak, M.; Grzejszczak, P.; Zdanowski, M. Analytical description of power losses in a transformer operating in the dual active bridge converter. Bull. Pol. Acad. Sci. Tech. Sci.
**2016**, 64, 561–574. [Google Scholar] [CrossRef] - Rodriguez-Sotelo, D.; Rodriguez-Licea, M.A.; Araujo-Vargas, I.; Prado-Olivarez, J.; Barranco-Gutiérrez, A.-I.; Perez-Pinal, F.J. Power Losses Models for Magnetic Cores: A Review. Micromachines
**2022**, 13, 418. [Google Scholar] [CrossRef] [PubMed]

**Figure 1.**(

**a**) Dual active bridge DC/DC converter topology; (

**b**) single phase shift modulation scheme.

**Figure 3.**Simplified voltage and current waveforms of DAB converter for U

_{DC}

_{1}> U

_{DC}

_{2}/n: (

**a**) with I

_{2}< 0; (

**b**) with I

_{2}> 0.

**Figure 4.**Simplified voltage and current waveforms of the DAB converter for U

_{DC}

_{1}< U

_{DC}

_{2}/n: (

**a**) with I

_{1}> 0; (

**b**) with I

_{1}< 0.

**Figure 7.**Voltage and current waveforms in a basic switching cell during transistor turn-on process: (

**a**) without the diode D

_{Z}reverse recovery; (

**b**) with the diode D

_{Z}reverse recovery.

**Figure 9.**Voltage and current waveforms in a basic switching cell during the transistor turn-off process.

**Figure 10.**An equivalent circuit of the transformer with an additional choke L

_{d}with values transferred to the DAB H

_{1}bridge side.

**Figure 11.**Simplified waveforms of voltages u

_{1}, u

_{2}/n and magnetic induction B for (

**a**) U

_{DC}

_{1}= U

_{DC}

_{2}/n; (

**b**) U

_{DC}

_{1}> U

_{DC}

_{2}/n; (

**c**) U

_{DC}

_{1}< U

_{DC}

_{2}/n.

**Figure 12.**Laboratory setup for the experimental tests: (

**a**) Scheme; (

**b**) tested DAB converter; (

**c**) laboratory stand.

**Figure 13.**Difference between the measured and estimated average value of the input current i

_{DC}

_{1}.

**Figure 14.**The estimated and measured energy efficiency characteristics of the tested DAB converter.

**Figure 16.**Experimental waveforms of the current i

_{1}and voltage u

_{1}measured for: (

**a**) P

_{OUT}= 0.5 kW; (

**b**) P

_{OUT}= 2 kW.

**Figure 17.**Estimated power loss distribution in the considered DAB converter bridges: (

**a**) bridge H

_{1}; (

**b**) bridge H

_{2}.

**Figure 19.**The estimated and measured energy efficiency characteristics of the tested DAB converter for the case when energy is transferred from bridge H

_{2}to H

_{1}.

**Figure 20.**Comparison of the results obtained using the proposed method and approach presented by Wang and Castellazzi in [19]: (

**a**) estimated and measured energy efficiency characteristics of the tested DAB converter; (

**b**) power loss characteristics of bridges H

_{1}and H

_{2}.

Parameter | Explanation |
---|---|

P_{OUT} | Output power [W] |

U_{DC}_{1} | Input voltage [V] |

U_{DC}_{2} | Output voltage [V] |

n = N_{1}/N_{2} | Transformer turns ratio |

T_{S} | Switching period [s] |

L_{d} | Inductance of the additional inductor [-] |

L_{δ}_{1} | Leakage inductance of transformer winding at the H_{1} bridge side [-] |

L_{δ}_{2} | Leakage inductance of transformer winding at the H_{2} bridge side [-] |

U_{DS}_{(N)} | Rated value of MOSFET drain–to–source voltage [V] |

I_{D}_{(N)} | Rated value of MOSFET drain current [A] |

U_{FO} | Diode threshold voltage [V] |

r_{D} | Diode dynamic resistance [Ω] |

C_{iss} | MOSFET input capacitance [F] |

C_{rss} | MOSFET reverse transfer capacitance [F] |

R_{G} | MOSFET external gate resistance [Ω] |

U_{DR} | MOSFET gate driver voltage [V] |

U_{GS}_{(TH)} | MOSFET gate threshold voltage [V] |

U_{GS}_{(P)} | Minimal value of the MOSFET gate-to-source voltage enabling the conduction of load current I_{O} [V] |

t_{RR}_{(N)} | Nominal value of the diode D_{Z} reverse recovery time measured for the nominal load current I_{O}_{(N)} [s] |

A_{iDZ}_{(N)} | Nominal derivative with time of the diode current during reverse recovery current measurement [A/s] |

I_{RM}_{(N)} | Diode nominal reverse current measured for A_{iDZ}_{(N)} and I_{O}_{(N)} |

f | Induction frequency [Hz] |

B_{M} | Induction peak value [T] |

T_{C} | Transformer core temperature [°C] |

V_{C} | V_{C—}core volume [cm^{3}] |

Parameter | Specification |
---|---|

Rated output power | 5 kW |

U_{DC}_{1} | 670 V |

U_{DC}_{2} | 385 V |

T_{1}–T_{8}, D_{1}–D_{8} | F4-23MR12W1M1_B11 (Infineon) |

Switching frequency | 50 kHz |

N_{1}/N_{2} | 33/18 |

Transformer | 3C95 ferrite core (SMA Magnetics) O _{D} = 87/I_{D} = 5 6/H = 50 mm |

L_{d} | 25 µH |

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## Share and Cite

**MDPI and ACS Style**

Turzyński, M.; Bachman, S.; Jasiński, M.; Piasecki, S.; Ryłko, M.; Chiu, H.-J.; Kuo, S.-H.; Chang, Y.-C.
Analytical Estimation of Power Losses in a Dual Active Bridge Converter Controlled with a Single-Phase Shift Switching Scheme. *Energies* **2022**, *15*, 8262.
https://doi.org/10.3390/en15218262

**AMA Style**

Turzyński M, Bachman S, Jasiński M, Piasecki S, Ryłko M, Chiu H-J, Kuo S-H, Chang Y-C.
Analytical Estimation of Power Losses in a Dual Active Bridge Converter Controlled with a Single-Phase Shift Switching Scheme. *Energies*. 2022; 15(21):8262.
https://doi.org/10.3390/en15218262

**Chicago/Turabian Style**

Turzyński, Marek, Serafin Bachman, Marek Jasiński, Szymon Piasecki, Marek Ryłko, Huang-Jen Chiu, Shih-Hao Kuo, and Yu-Chen Chang.
2022. "Analytical Estimation of Power Losses in a Dual Active Bridge Converter Controlled with a Single-Phase Shift Switching Scheme" *Energies* 15, no. 21: 8262.
https://doi.org/10.3390/en15218262