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Article

Fractional PID Controller for Voltage-Lift Converters

by
Luis M. Martinez-Patiño
1,
Francisco J. Perez-Pinal
1,
Allan Giovanni Soriano-Sánchez
2,
Manuel Rico-Secades
3,
Carina Zarate-Orduño
4 and
Jose-Cruz Nuñez-Perez
5,*
1
Tecnológico Nacional de México, Instituto Tecnológico de Celaya, Celaya 38010, Mexico
2
CONACYT, Instituto Tecnológico de Celaya, Celaya 38010, Mexico
3
Escuela Politecnica de Ingenieria de Gijón, Universidad de Oviedo, 33204 Gijón, Spain
4
Tecnológico Nacional de México, CRODE Celaya, Celaya 38020, Mexico
5
Instituto Politécnico Nacional, IPN-CITEDI, Av. Instituto Politécnico Nacional No. 1310, Tijuana 22435, Mexico
*
Author to whom correspondence should be addressed.
Fractal Fract. 2023, 7(7), 542; https://doi.org/10.3390/fractalfract7070542
Submission received: 30 May 2023 / Revised: 9 July 2023 / Accepted: 10 July 2023 / Published: 13 July 2023
(This article belongs to the Special Issue Design, Optimization and Applications for Fractional Chaotic System)

Abstract

:
Voltage-lift is a widely used technique in DC–DC converters to step-up output voltage levels. Several traditional and advanced control techniques applicable to power electronic converters (PEC) have been reported and utilized for voltage-lift applications. Similarly, in recent years the implementation of fractional-order controllers (FOC) in PEC applications has gained interest, aiming to improve system performance, and has been validated in basic converter topologies. Following this trend, this work presents an FOC for a voltage-lift converter, requiring only output voltage feedback. A third-order non-minimal phase system is selected for experimentation to verify FOC implementations for more complex PEC configurations. A simple, straightforward design and approximation methodology for the FOC is proposed. Step-by-step development of the FOC, numerical and practical results on a 50 W voltage-lift converter are reported. The results show that PEC transient and steady-state responses can be enhanced using FOC controllers when compared with classical linear controllers. Extended applications of FOC for improved performance in power conversion is also discussed.

1. Introduction

To interconnect, in the best energy-efficient way, sources and loads from different capabilities and characteristics represent one fundamental purpose of power electronics (PE). Currently, there are elegant and remarkable solutions reported in the literature to achieve this purpose, where the application range usually varies from micro- to mega-watts, and it is foreseen that this tendency will remain over this decade. From the early days of PE, it was conceived as an interdisciplinary area combined with basic disciplines, i.e., circuits, communication, control, among others. However, in recent years PE’s complexity has increased due to the appearance of new concepts such as renewable energy (RE), electrified mobility (E-mobility), Industry 4.0, digitalization, and digital twins. This paradigm shift has increased the demand for advanced solutions to satisfy these new necessities.
To provide an alternative to step-up the voltage to these new PE demands, there exist different configurations. For instance, there are non-isolated/isolated, unidirectional/bidirectional, voltage-fed/current-fed, hard switched/soft switched, non-minimum-phase, and minimum-phase PEs. In particular, there are different voltage boost techniques such as: switched capacitor, voltage multiplier, switched inductor and voltage lift, magnetic coupling, and multi-stage level. A comprehensive review on step-up DC–DC converters can be found in [1].
On the other hand, the development of controller techniques for PE is in a stage of constant development and improvement, where a recent impulse has been given to fractional-order controllers (FOC). Therefore, this section will present a brief literature review, motivation, challenges and the main contributions of this work.

1.1. Literature Review

Over the years, considerable research has been conducted in control engineering, leading to the development of various control techniques aimed at improving system performance, stability, and robustness. Some notable control techniques adopted in the literature include proportional-integral-derivative (PID) control [2], model predictive control (MPC) [3], adaptive control [4], sliding mode control (SMC) [5], fuzzy logic control (FLC) [6], H-infinity control [7] and fractional-order control. Within this array of control techniques, FOC has emerged as a promising and innovative approach that departs from the traditional integer-order control paradigms. Although PID controls are widely adopted control techniques that use proportional, integral, and derivative actions to regulate a system by adjusting the control output based on the error, integral of error, and rate of change of error, they inherently suffer from limited adaptability to system changes and control flexibility [8]. Fractional-order control harnesses the mathematical concepts of fractional calculus to introduce non-integer-order derivatives and integrals into control system design. This novel approach offers several advantages, such as increased design flexibility, enhanced system response, and improved disturbance rejection [9].
Fractional-order controllers (FOC) have gained attention in control research for applications where precise system control is crucial due to its flexibility in adjusting the control behavior of a system. FOC has been successfully applied in various fields including power electronics (PE) [10], motor control [11], active power filters [12], process control [13], and chaos control [14]. A detailed review focused on FOC applied in power electronics was conducted in [15]. The study demonstrated that FOC offers advantages over integer-order controllers (IOC) in PE, such as robust performance, fast dynamic response, accurate tracking, quick transient responses, minimal overshoot, and low settling time for power converters.
In [16], a novel servomotor control mechanism for a permanent magnet synchronous motor system that utilizes specialized fractional-order PID (FOPID) controller together with a Bode’s Ideal cutoff filtering system was proposed. The result of the application when compared with the optimized integer-order controller counterpart demonstrated better performance and improved control characteristics. In another study [17], the researchers proposed a distributed FOC compensation scheme to regulate the voltage deviation of a DC microgrid, establishing stability in the controlled system. In [18], an uncomplicated approximation procedure for FOPID was explored for a synthesizable bulk converter in regulating its output voltage. The basic configuration of this FOC and its integer-order counterparts were characterized and compared. The findings showed a fast step response in stabilizing the control parameter with an accompanying negligible steady-state error. Furthermore, in [19], an example of the application of cohort intelligence (CI) optimization technique to FOPID controllers for buck converters can be found. The obtained results were consistent with the characteristics reported in [18]. Moreover, the utilization of FOPID controllers was extended to other fundamental converter topologies such as boost [20], buck [21], and buck/boost converters [22]. However, in this manuscript, we aim to further validate the applicability of FOPID controllers by exploring their performance in more complex converter topologies.

1.2. Motivation and Challenges

Power electronic converters (PEC) are generally considered as nonlinear in their dynamics since the outputs of the systems do not exhibit linear relationships with their inputs. This nonlinear behavior can be attributed to the switching actions of the nonlinear semiconductor devices that are incorporated within the PEC systems which introduces abrupt changes in their voltage level and current flow. The nonlinearity behaviors of PEC models contribute to the complexity of controlling and stabilizing their intrinsic electronic quantities making it difficult for traditional control techniques to achieve optimal performance. Traditional control approaches for power electronic (PE) systems often require the incorporation of an additional current feedback loop to regulate and manipulate system behaviors [23]. However, this additional system can introduce more complexities to the overall system. As a result, the utilization of fractional-order controllers has gained significant attention and interest. Additionally, its feasibility to be implemented with analog or digital techniques represents another attraction. A standardized design procedure for FOC applied to PEC is yet to be clearly defined. Nevertheless, several proposals including conventional and optimization methods have been reported [24,25,26]. For instance, the authors in [27] proposed an improved optimization version of the well-known hunger game search optimization algorithm to appropriately tune the FOPID controller parameter for achieving optimal voltage control in the PE. Optimization techniques have shown good results in simulations and relevant performance characteristics such as smooth control signal, outstanding tracking performance and fast transient response have been demonstrated. However, some of these optimization techniques have constraints features which may be difficult to implement physically. Hence, this study focuses on exploring a simplified and direct approach for tuning fractional-order controllers in power electronic converters. The objective is to assess the performance of FOCs and encourage their application in various power electronics control systems.

1.3. Contributions

In this work, we investigate a traditional non-isolated voltage lift converter to step-up output voltage level from a low voltage input, using an FOC as a main controller. The main goal of this investigation was to experimentally compare a traditional and an FOC controller for a Luo converter, qualitatively and quantitatively. Thus, the following contributions to the state of the art are hereby highlighted:
  • A systematic generalized procedure to design FOC for PE is reported, which can be easily applied to fourth-order and higher-order converters.
  • Classical I, PID, lag-lead, sliding mode, and FOC were fully numerically implemented using an analog approach and a performance comparison was performed. It was found that FOC achieves a fast transient dynamic response, minimal overshoot, and low settling time. Certainly, the analog implementation of the ‘I’ and FOC controller were in harmony with the numerical simulation.
  • It was concluded that FOC is simple, has no hands-on difficulty, and accomplishes a higher performance compared with the other control techniques. Indeed, in the authors’ opinion, FOC may become the principal PEC controller technique in the coming years.

1.4. Paper Organization

This paper is organized as follows: Section 2 presents the general considerations regarding the PEC as well as the FOC design. It includes the mathematical model, the steady-state equations and the design equations for the converter. The El-Khazali FOC method is introduced, a step-by-step process as well as a flowchart for the FOPID controller design is presented, including the electric circuit for analog implementation of the controller. In Section 3, the designed controller is presented as well as the obtained simulation and experimental results of the application of the controller in the third-order Super-lift Luo converter, and a comparison of the obtained performance with integer-order controllers is shown. A discussion about the obtained outcomes is provided in Section 4, and the most relevant conclusions are presented in Section 5.

2. Materials and Methods

In this section, the necessary preliminaries about the PEC and some of the control techniques commonly applied are presented.

2.1. Power Electronic Converter (PEC)

A notable example of the application of a voltage-lift technique is the Super-lift Luo converter series, whose elementary circuit is shown in Figure 1. It was introduced as an alternative to traditional voltage-lift techniques, in order to increase output voltage gain.
In traditional voltage-lift techniques, i.e., voltage-lift Luo converters [28], the output voltage increases with each stage in an arithmetic progression. In contrast, Super-lift Luo converters present an increase in output voltage in geometric progression, enhancing voltage gain in power series [29].
Super-lift Luo-converter main series consists of an elementary circuit and derived circuits constructed by adding additional stages of inductors, capacitors and diodes, i.e., Re-Lift, Triple-Lift, and higher-order lift circuits. An additional series is derived from the former, with additional voltage lifting capacities.

2.1.1. Operation

Super-lift Luo converter operation is well known [30,31] and can be briefly described as follows. When the switch Q 1 is in ON state, the diode D 1 is forward biased, causing current to flow through the inductor L and the capacitor C 1 , which is charged to the input voltage V i . Output current is maintained by the discharge of the capacitor C 2 through the output load resistance R. Figure 2 shows an equivalent circuit of the PEC in this interval.
Where i L is the inductor current, i C 1 is the current through capacitor C 1 , i C 2 is the current through capacitor C 2 , i o is the output current, v L is the inductor voltage, v C 1 is the capacitor C 1 voltage, and v C 2 is the capacitor C 2 voltage. Note that v C 2 is equal to the output voltage v o . When the switch Q 1 is turned off, diode D 1 is negative biased and D 2 is forward biased. Capacitor C 1 becomes discharged by inductor L current, thereby the current flows through both the capacitor C 1 and the inductor L to the output. Figure 3 shows the equivalent circuit of the PEC in this interval.
Equations for the output capacitor voltage ripple Δ v C 2 (1), inductor current ripple Δ i L (2), and relations between input and output voltage (3) and current (4) are presented below [29].
Δ v C 2 = I o C 2 ( 1 D ) T = V C 2 ( 1 D ) f C 2 R
Δ i L = V i L D T = V C 2 2 V i L ( 1 D ) T
V o = 2 D 1 D V i
I i = 2 D 1 D I o
where I i , I o , V i , V o , D , V C 1 , V C 2 denote the input current, output current, input voltage, output voltage, duty cycle, capacitor C 1 voltage and capacitor C 2 voltage, at the operation point, respectively.

2.1.2. Design Equations

Solving (1) and (2) for C 2 and L, respectively, design equations for the PEC can be derived. The resulting design equations are displayed below (5) and (6).
L = V i D Δ i L f
C 2 = V C 2 ( 1 D ) Δ v C 2 f R
To find an equation for the average duty cycle given input and output desired voltage values, (3) is solved for D. The resulting expression is displayed as follows (7).
D = V C 2 2 V i V C 2 V i

2.1.3. Third-Order Model

To apply both classical linear control and FOC, it is necessary to obtain a mathematical model of the system to be controlled. In this case, a third-order model of the converter can be obtained if at least one parasitic element is supposed, specifically a series resistor for the capacitor C 1 , E S R C 1 . A third-order model with additional parasitic components can more accurately represent the system, as demonstrated in [31], therefore it was selected for this study. Alternatively, a second-order model can be found in Appendix A. For a full non-ideal model of the Super-lift Luo converter as well as dynamic differences to the ideal second order model, the interested reader is referred to [31].
By analyzing the circuit shown at Figure 4 using Kirchhoff’s laws, assuming continuous conduction mode (CCM), the continuous averaged model can be obtained (8)–(10).
d i L d t = E S R C 1 ( 1 d ) L i L + 1 d L v C 1 1 d L v C 2 + 1 L v i
d v C 1 d t = 1 d C 1 i L + d C 1 E S R C 1 v C 1 + d C 1 E S R C 1 v i
d v C 2 d t = 1 d C 2 i L 1 C 2 R v C 2
where d stands for the averaged duty cycle. A small-signal average model with the following form (11) is created by linearizing by the small signal perturbation method around the equilibrium point [ I L , V C 2 ].
d d t x ^ b = A 2 x ^ b + B 2 d ^ + C 2 v ^ i
where:
x ^ b = i ^ L v ^ C 1 v ^ C 2
A 2 = E S R C 1 ( 1 D ) L ( 1 D ) L ( 1 D ) L ( 1 D ) C 1 1 C 1 E S R C 1 0 ( 1 D ) C 2 0 1 C 2 R
B 2 = E S R C 1 L I L V C 1 L + V C 2 L 1 C 1 I L V C 1 C 1 E S R C 1 + V i C 1 E S R C 1 I L C 2
C 2 = 1 L 1 C 1 E S R C 1 0
where i ^ L , v ^ C 2 , d ^ , v ^ i are the perturbation terms of i L , v C 2 , d , v i , respectively. Neglecting the perturbation terms of v ^ i , the third-order model control-to-output voltage is obtained by the duty-to-output relation (16), and is shown as follows (17).
x ^ b ( s ) d ^ ( s ) = ( s I A 2 ) 1 B 2 = i ^ L ( s ) d ^ ( s ) v ^ C 1 ( s ) d ^ ( s ) v ^ C 2 ( s ) d ^ ( s ) T
x ^ b 2 ( s ) d ^ ( s ) = v ^ C 2 ( s ) d ^ ( s ) = γ 2 s 2 + γ 1 s + γ 0 δ 3 s 3 + δ 2 s 2 + δ 1 s + δ 0
where the coefficients γ n and δ n are shown in Table 1.

2.2. Control Techniques for Power Converters

As reported in the literature, several control strategies have been proposed and successfully applied to regulate PEC. Classical linear control, including lag-lead compensators and PID controllers are extensively used in PE applications due to a simple design and implementation process [32], but are only effective around an operating point and that the performance is influenced by a variety of factors, including parameter variations, non-linearities, and bandwidth restrictions [33]. Additionally, for non-minimal phase systems, a popular solution is to use a minimal-phase variable control, hence, a current loop is introduced. Output voltage is then achieved by using voltage loop [34,35], achieving stability and better performance at the cost of additional circuitry and current sensors. Thus, some strategies are being researched to avoid this approach [36].
Sliding mode control (SMC) is a nonlinear control strategy applicable to both linear and nonlinear systems, and has been extensively used in PECs [37]. A fast finite-time response and robustness against parameter variations are the most notable features of SMC. However, one of the main drawbacks of the technique is its variable switching frequency, leading to electromagnetic interference (EMI) filtering design problems as well as degradation in performance and switching losses [33]. Some solutions proposed in the literature show good results at the cost of regulation performance or requiring a costly, non-trivial implementation that might not be suitable for overall DC/DC converter applications [38,39,40].
Model Predictive Control (MPC) is applied in PEC due to its advantages over other control techniques, such as adaptability, fast response and tolerance of parameter variations [37,41]. This method’s performance can be impacted by control loop delays, and model inaccuracies. MPC requires an accurate mathematical model of the process to predict, and demands more processing resources than other methods [33,42].
Intelligent control techniques such as fuzzy control and neural networks present key advantages, including immunity to parameter variations and noise, adaptability to operation conditions and non-linearities and do not require a complex model of the process [33,37]. However, these techniques tend to be computationally demanding and require expert knowledge for their design [43].

Fractional-Order PID Controller

In this work, FOC is selected as the control technique for this third-order PEC, due to its capacity for regulating non-linear systems being a linear control technique, and the advantages commonly attributed to FOCs, like robustness against parameter and gain variations, reduced levels of noise and straightforward implementation with fractal arrangements of electronic devices [21,44]. In this work, the purpose of using this technique is achieving an acceptable response using only one control loop, thus, avoiding the use of extra elements for current sensing and current control loop.
The FOPID controller is a generalization of the integer-order PID controller. A FOPID controller can be represented as follows (18) [15].
C ( s ) = K p + K i s α + K d s β
where α and β are the non-integer orders of the integrator and differentiator [15], and K p , K i , K d are the proportional, integral and derivative gains, respectively. These fractional orders give more flexibility when adjusting the controller gain and phase characteristics, acting as additional “tuning knobs”, and thus, providing a more precise response.
Several tuning methods for the FOPID controller have been proposed in the literature, including conventional and optimal tuning [24,25,26]. In this work, the El-Khazali method is used. For insights into the use of optimization methods with restrictions to achieve implementable results, interested readers are referred to [45].

2.3. Approximation of the Fractional-Order Operator

Commonly, the solution of fractional-order equations via analytical or numerical methods is not simple or computationally demanding, and the software tools used to simulate control systems are usually designed to work with integer orders of s [46]. Moreover, fractional-order transfer functions contain irrational terms, resulting in infinite-dimensional filters [15]. For analog implementation of controllers, electronic components such as resistors, capacitors, and inductors are frequently employed. It is not clear and difficult to implement fractional-order controllers directly using these elements [46,47].
Numerous integer-order approximations for the fractional-order operator have been proposed in the literature. The El-Khazali method, the Continued Fraction Expansion (CFE) method, the Matsuda method, the Outstaloup method and the Carlson method are some of the commonly used approximation techniques [15]. Each approximation technique has unique qualities that might make it better suited for a specific application. Readers who are interested in a comparison of these approximation techniques are directed to [48].

2.4. FOPID Controller Design Procedure

In this section, the procedure used to design the FOPID controller is presented, as well as the necessary adaptation to use it with non-minimal phase systems. For practical implementation, schematic circuit diagrams are shown.

2.4.1. El-Khazali Method

El-Khazali proposed a simple method to approximate the fractional-order Laplacian operator s α , and tuning the fractional-order controller [26]. Demonstration of this method’s effectiveness can be found at [20,21,22,49]. The method can be summarized in the following steps [21,49].
  • Model the desired system.
  • Determine the uncontrolled plant phase contribution φ p , as well as the desired phase margin of the controlled plant φ m d .
  • Compute the controller contribution φ c as follows (19) [21,49].
    φ c = φ m d φ p π
  • For the desired phase margin of the controlled plant, compute α , the required fractional order (20) [21,49].
    α = φ m d φ p π π / 2
  • Compute s α using (21) [21,49].
    s α a 0 s 2 + a 1 s + a 2 a 2 s 2 + a 1 s + a 0
    where
    a 0 = α 2 + 3 α + 2
    a 1 = 6 α t a n ( 2 α ) π 4
    a 2 = α 2 3 α + 2
  • Determine the controller structure G c ( s ) (25) [21,49].
    G c ( s ) = k p 1 + 1 T i s α + T d s μ
    where k p is the proportional gain, T i and T d are the integral and derivative time constants, respectively. Considering α = μ , expression (25) can be rewritten as (26):
    G c ( s ) = K c ( T i s α + 1 ) 2 s α
    where T i and K c can be initially approximated with the following expressions (27) and (28) [21,49]:
    T i = t a n ( φ c 2 ) + t a n ( 2 + μ π / 4 ) t a n ( φ c 2 ) t a n ( 2 + μ π / 4 ) ; φ c 2 + μ π / 8
    K c = g m g p [ ( a 0 a 2 ) 2 + a 1 2 ] ( a 0 a 2 ) 2 ( 1 T i ) 2 + a 1 2 ( 1 + T i ) 2 ; g p
    where g m is the desired gain margin, and g p corresponds to the gain margin. Note that in case that g p is not defined, the relation g m / g p can be substituted for a number, i.e., 1, and start tuning the variable k c to obtain an acceptable response [26].
  • Tune T i and k c to obtain the desired effect from the proposed controller.

2.4.2. Non-Minimal Phase Adaptation

In order to accomplish the control objective without the need for cascaded controllers, a modification of El-Khazali’s approach for non-minimal phase systems was proposed in [20]. For a non-minimal phase system of the form shown in (29).
t f ( s ) = a s + b c s 2 + d s + e
where a , b , and c , d , e correspond to the coefficients of the numerator and denominator, respectively. The transfer function can be divided in two elements: Its minimal and non-minimal parts, respectively, as follows (30), (31) [20].
t f ( s ) = ( t f m ( s ) ) ( t f n m ( s ) )
t f ( s ) = a ( b a + s ) c s 2 + d s + e b a s b a + s
where t f m ( s ) and t f n m ( s ) denote the minimal phase and non-minimal phase parts of the system, respectively. Note that the non-minimal phase part corresponds to the Padé approximation of the delay [20]. Working with the minimal phase part of the system allows El-Khazali’s design method to be applied without additional controllers, as the condition α < 1 is now fulfilled. Figure 5 presents a flowchart illustrating the overall process of FOC design.

2.4.3. Analog Implementation

Several analog implementations for fractional-order controllers have been proposed in the literature [50,51]. In this work, an implementation design using capacitors, resistors and operational amplifiers was chosen due to its simplicity and proven efficacy for controlling PECs [20,49]. In this approach, the resulting non-integer order approximation (26) is represented in its partial fraction expansion as follows (32).
G f ( s ) = K 1 1 ψ 1 s + 1 + K 2 1 ψ 2 s + 1 + K 3 1 ψ 3 s + 1 + K 4 1 ψ 4 s + 1 + K 5
where the terms 1 / ( ψ n s + 1 ) correspond to a first-order system transfer function and ψ n represents the time constant of each of these systems. This partial fraction expansion can be practically implemented via an RC circuit, as shown in Figure 6.
Where the component values of R n , R i n , R f n , R and C n correspond to the resulting first-order systems of (32). Component relations for the proposed controller are given in Section 4. Similarly, the arrangement illustrated in Figure 7 can be used to implement an “I” controller, where the R a 2 / R a 1 inverting Op-Amp configuration corresponds to the K i constant, and the C i , R i integrator Op-Amp array corresponds to the 1 / s integration operator.

3. Results

3.1. Implementation

In this section, the results of the design for the PEC and the FOPID controller are described, together with information on the electronic components used for the PEC and the FOPID controller’s practical implementation.

3.1.1. PEC Design and Implementation

For the design of the PEC, continuous conduction mode (CCM) is proposed. For instance, the following parameters were considered: input voltage = 19 V, output voltage = 48 V, maximum converter power output = 50 W, proposed switching frequency = 45 kHz, maximum inductor current ripple Δ I L = 40 % of I L , maximum output voltage ripple Δ V C 2 = 1 % of V C 2 . Thus, from (5) and (6), elements can be calculated as follows. L = 228.93 μ H, C 1 = C 2 = 33 μ F. It was desired to achieve a robust converter able to withstand any possible overvoltage/overcurrent during experimentation. Thus, component selection reflects this design choice.
For the single inductor of the converter, a fixed inductor from Würth Elektronik was selected (part No. 74437529203221), with 220 μ H, a 4.1 A 10% saturation current and a 8.8 A maximum rated current, and typical series resistance of 36.45 m Ω . For the capacitor C 1 , a polypropylene metallized film capacitor from Kemet was selected (part No. C4AQCBW5400A3LJ), with 40 μ F capacitance at 5% tolerance, a maximum voltage rating of 650V, and a negligible ESR of 2.8 m Ω . For the capacitor C 2 , the part selected was an aluminum polymer capacitor from Cornell Dubilier (part No. 476AVG100MGBJ). with 47 μ F capacitance at 20% tolerance, and a ESR of 38 m Ω , this capacitor is able to handle up to 100 V. The selected switch is a IRF540NPBF MOSFET from Infineon Technologies, which can handle a maximum of 100 V and 33 A drain current, with an ON state resistance of 44 m Ω . The diodes selected were MUR820G from On Semiconductor, with a current capability of 8 A and a forward voltage of 975 mV.

3.1.2. FOPID Controller Design and Implementation

For the design of the FOC, the process shown in Section 2.4 is used, substituting the component values of the PEC as well as the parameter of desired phase margin. Numeric results were computed using MATLAB®. Following El-Khazali’s FOPID design method, the first step consisted of modeling the system to be controlled. With the PEC parameters defined, a mathematical model can be obtained by substituting the selected PEC component values in (17) as follows (33).
G p c ( s ) = v ^ C 2 ( s ) d ^ ( s ) = 3.384 × 10 4 s 2 1.024 × 10 11 s + 5.664 × 10 15 s 3 + 3.082 × 10 6 s 2 + 1.487 × 10 9 s + 1.278 × 10 14
Using the non-minimal phase system adaptation for the procedure, (33) can be represented in the form (30). The minimal phase part is shown as follows (34).
G p m ( s ) = 33.843 × 10 3 ( s + 54.317 × 10 3 ) ( s + 3.082 × 10 6 ) s 3 + 3.082 × 10 6 s 2 + 1.487 × 10 9 s + 1.278 × 10 14
In a similar way, the non-minimal phase part is shown as follows (35).
G p n m ( s ) = 54.317 × 10 3 s 54.317 × 10 3 + s
To determine the required phase contribution, initially, a phase margin of at least 55° was proposed to ensure system stability before performance. The next step was computing alpha using (20), α = 0.1281 , which represents the required phase contribution of 11.53° to reach the desired phase margin. Then, s α results as follows (36):
s α 3.153 s 2 + 6.106 × 10 5 s + 1.533 × 10 10 2.384 s 2 + 6.106 × 10 5 s + 2.028 × 10 10
Figure 8 shows the Bode plot of the biquadratic approximation of s α .
The next step was to substitute (36) in the controller structure proposed by El-Khazali (26), obtaining the constants T i and K c with (27) and (28), respectively, and fine-tuning the parameters to obtain an implementable controller. Then, extensive testing of the resulting controller in simulation was performed to ensure it achieved an acceptable response with the desired system. Following this procedure, a working FOPID controller was found using the constants K c = 1.268 , T i = 1.845 . Note that even with a negative T i constant, the resultant approximation is implementable since the negative sign is canceled by the structure of (26). As an alternative, a similar FOPID approximation can be obtained with W c f = 3.208 × 10 4 , α = 0.5556 , T i = 8 , K c = 0.0073 . FOPID approximations for the controller G c ( s ) and the alternative G c a ( s ) are illustrated in Figure 9.
Thus, the resulting FOPID approximation G c ( s ) obtained from the substitution of (36) in (26), using the obtained K c and T i constants is shown as follows (37), where, for a better presentation, the coefficients of the transfer function are given in Table 2.
G c ( s ) = κ 4 s 4 + κ 3 s 3 + κ 2 s 2 + κ 1 s + κ 0 ν 4 s 4 + ν 3 s 3 + ν 2 s 2 + ν 1 s + ν 0
Table 3 shows the component relations resulting from the partial fraction expansion (32).
The controller obtained an open-loop phase margin larger than the desired value of 55 degrees, as shown in Figure 10. Its proper functionality was confirmed by PSIM simulation. For the practical controllers, surface-mount technology (SMT) X7R capacitors and metal electrode leadless face (MELF) precision resistors were used to ensure a good approximation of the FOPID transfer function.

3.2. Numerical Simulation Results

PSIM simulation was used to compare the response obtained with the FOPID controller with other commonly used controllers. Simulation conditions are as follows: The selected solver was Fixed Step, with a simulation step time of 1 × 10 7 s, starting with a step response of the system at 0.0 s. Then, a 50 % load variation is introduced at 0.06 s, and a +50% load variation is introduced at 0.08 s. ‘I’, ‘PID’ and Lag-Lead controllers were designed using MATLAB®, control system designer. Figure 11a shows the complete PSIM simulation results for the output voltage.
Figure 11b shows the detailed initial step response of the PEC. The fastest response times were achieved by FOPID and sliding mode control, with 0.658 ms and 0.621 ms, respectively, while the other techniques settling times were all above 3 ms. FOPID controller overshoot was substantially larger than that of the other techniques, with 20.954% overshoot. The results are summarized at Table 4.
Figure 12a,b show the response to a load variation, from 50 to 100% and from 100 to 50%, respectively. In this test, FOPID and Lag-Lead compensators exhibited the best performance, with a settling time at (2% criteria) of 0 ms, as the drop in voltage never surpasses this margin. The results are summarized in Table 5.

3.3. Dynamic Experimental Results

For practical experimentation, the following equipment was used: A KETSIGHT DSOX1102A with voltage and current probes to measure the signals of the PEC. A BK PRECISION S129B, DC power supply for the control circuit as well as a GW INSTEC GPE-3323 DC power supply for the PEC, equipment available at Instituto Tecnologico de Celaya, Celaya, Mexico. The study was conducted on the implemented PEC, with component number parts specified in Section 3.1.1. Figure 13a shows the block diagram of the test set-up. Figure 13b shows the designed practical set-up. It consists of the oscilloscope, main power supply, controller power supply, load resistor, an input current probe, the Super-lift boost converter, the proposed FOC, an integral compensator for comparison, and a common base plate for both controllers. The mutual section is used to interchange both controllers, and consists of the sensor voltage divider, a voltage follower to increase the input impedance from the voltage feedback, the adding point between reference and feedback, a TL 494 PWM circuit, and bypass and decoupling capacitors. The overall efficiency at steady state of the designed converter is 91%.
Figure 14a shows the FC’s output voltage step response during turn-on. It can be noticed that the converter’s output voltage starts from the input voltage due to the converter configuration. Furthermore, it can be seen that FOC’s reaction is extremely fast, reaching the desired output voltage in less than two milliseconds with negligible overshoot. However, from Figure 14a an interesting response can be seen in the output current (green). Before turning on the converter, a constant current is drawn, because the load is connected to the converter the entire time. Once the system is active, during the transient time, the current reaches the maximum level allowed by the source; after that, the current has a small oscillation, reaching the steady-state value. This behavior is due to the fact that in the proposed FOC only the voltage is controlled, and the current behaves without constraints. On the other hand, Figure 14b shows the integral’s output voltage step response during turn-on (yellow). Contrary to FOC, the response is slow, reaching the steady state nearly twelve-times greater than FOC. Additionally, it can be seen that the current’s reaction is also decelerated and smooth (green), arriving at the steady state in 33 milliseconds. Result of the step test for simulation and practical implementation are summarized in Table 4.
To evaluate both controller’s performance during load changes; they were tested with a load variation from 50 to 100%, Figure 15a,b, respectively. It is necessary to mention that both controllers have a good transient response. However, once again the FOC controller achieves the best response achieving an almost insignificant setting time and voltage drop, less than 5%. Table 5 summarizes the results of the load variation test, which involved a load change from 50 to 100%.

3.4. Frequency Analysis Experimental Results

The experimental measurement of the frequency response for the FOPID controller and the PEC was obtained, in order to corroborate the controller design and implementation. The device used was the AP Instruments Model 310 Analog Frequency Response Analyzer.
Figure 16a,b show the result of the frequency response experimental analysis for the PEC and the FOPID controller, respectively. In these screenshots, both the magnitude (blue) and phase (red) response can be observed. In Figure 16b, it can be noticed that the controller approximation contribution is around 10 kHz, as expected from the approximation shown in Figure 8. The PEC response corresponds to the non-minimal phase model (33), as it was obtained from the physical converter.

4. Discussion

To achieve high-performance power electronic interfaces at different power levels represents a mandatory requirement in the development of sustainable solutions. As a possible alternative to achieve this goal, in this work the authors have proposed the combination of a third-order DC–DC converter and a fractional-order controller. The main highlights of this study can be summarized as follows:
  • A simple, straightforward design process for the FOC as well as its analog implementation was validated for its application in PECs of higher complexity than the basic configurations previously reported. Specifically, the Super-lift Luo converter was selected for this study.
  • FOC demonstrated superior performance in the studied PEC application, exhibiting an extremely fast reaction time, reaching the desired output voltage in less than two milliseconds, which is faster than the integer-order controllers. Negligible overshoot was also observed when using FOC.
  • The load variation simulation test showed a similarly fast response between the non-linear SMC technique and the FOC, with the latter using only one feedback loop against the two of the SMC. Both FOC and integral controllers exhibited good transient response in the experimental load variation tests. However, FOC again outperformed the integer-order controller, showing an almost insignificant settling time and minimal voltage drop, less than 1.5%, against the 4.47% of the integral controller.
  • The analog implementation of the FOC was validated by an experimental frequency analysis, confirming the expected controller contribution around 10 kHz.
  • The obtained results showed an overall advantage for the use of FOC in PEC applications. Faster transient responses and a successful voltage regulation were observed.
Initially, a third-order model of the super-lift Luo converter is presented by considering only one parasitic in the lift capacitor. After that, a traditional small-signal average model is obtained, which is used to design the traditional and FOC converter. To design the FOC a variant of the well-known El-Khazali method is proposed, and a systematic procedure is provided so the FOC tuning can be adapted to some other high-order PEC. An advantage of the proposed FOC design, it is that it does not use any optimization method to find the parameters utilized. Please note that traditional Bode frequency response is used to design classical controllers (magnitude and phase). On the other hand, numerical results were reported using PSIM software for different controllers such as: integral, PID, sliding modes, and FOC. Finally, practical analog implementations by using operational amplifiers were reported. It is necessary to mention that digital implementation can also be realized, for more details, the interested reader is referred to [52].
As discussed in the previous section, the current study found that the FOC response is extremely fast, during start-up and load changes, compared with other controllers. Mainly, this response is due to the high gain in the FOC’s structure and that no current limit is provided. This response is desired in applications such as data centers, distributed energy, traction, to name a few. However, in the authors’ opinion, before FOC can be extended to other applications, some concerns arise that must be satisfied, which were observed during the implementation stage, including:
  • Theoretical parameters achieved in the FOC’s design must consider practical and feasible parameters to be utilized on the implementation stage. It was found that theoretical gains in the FOC’s design are not always realistic.
  • Care must be taken on power, ground, and signal routing in the PCB design. This is to reduce problems related with power integrity, signal integrity, electromagnetic interference (EMI), and electromagnetic compatibility (EMC).
  • Analog implementation of FOC requires high-performance devices, i.e., instrumentation operational amplifiers (high bandwidth), precision resistors, and capacitors with +/− 1% tolerance. Inadvertence of this concern generates a significant discrepancy between theoretical and practical results.
  • Although FOC’s response is extremely fast because no current limit is considered in the design stage, two undesired behaviors were observed: (i) The source’s current protection was reached during start-up and load changes. Therefore, a decrease in the overall gain of the FOPID controller was needed in the practical implementation, and (ii) the PEC’s components almost reached their maximum working operation point. A possible research direction is to use the well-known cascaded structure. However, it seems that extension of classical decoupling is not straightforward (voltage loop = slow response, current loop = fast response), because if both loops use FOC they will have a fast response. Some insights in this research direction are reported in [53,54].

5. Conclusions

In this work, the application of an FOC for voltage regulation of a third-order, non-minimal phase Super-lift Luo PEC was investigated. A simple, straightforward design method based on frequency response for the FOC was selected and validated for PEC of higher order. The reported numerical and practical experiments confirmed that FOC has an extraordinary dynamic voltage response during start-up and load changes when compared with classical controllers, achieving settling times up to ten-times faster compared with the integral controller, and only 6% slower than the non-linear SMC technique, which requires an additional current feedback loop. It was also observed to exhibit 67% reduced voltage variations during load changes when compared to the integral controller. This performance is only limited by the maximum allowable current from source and practical devices.
This study has positively shown that by using FOC, implemented on analog operational amplifiers, it is possible to regulate the output voltage by using one single voltage feedback, despite the controlled converter exhibiting a non-minimal behavior.
For future work, the most significant findings to emerge from this study are that theoretical parameters must consider practical and feasible parameters utilized on the implementation stage, and a cascaded structure would be required if the converter’s current exceeds the device’s and source’s limits. In the authors’ opinion, these results add to the rapidly expanding field of fractional-order controllers in power electronic converters, and it is foreseen that this research area will increase in the coming years expanding FOC to renewable energy, E-mobility, Industry 4.0, digitalization, and digital twins.

Author Contributions

Conceptualization, L.M.M.-P., F.J.P.-P. and A.G.S.-S.; methodology, F.J.P.-P. and A.G.S.-S.; validation, L.M.M.-P., F.J.P.-P. and J.-C.N.-P.; formal analysis, L.M.M.-P. and F.J.P.-P.; investigation, L.M.M.-P., F.J.P.-P., A.G.S.-S. and C.Z.-O.; resources, F.J.P.-P. and J.-C.N.-P.; writing—original draft preparation, L.M.M.-P., F.J.P.-P.; writing—review and editing, L.M.M.-P., F.J.P.-P., M.R.-S., C.Z.-O. and J.-C.N.-P.; visualization, F.J.P.-P. and A.G.S.-S. All authors have read and agreed to the published version of the manuscript.

Funding

The authors wish to thank the IDEA GTO CONV/024/2022, TecNM project 13824.22-P, and Instituto Politecnico Nacional, Secretaría de Investigación y Posgrado, for their support provided through the project SIP 20230135. In addition, the authors would like to express their gratitude to the COFAA-IPN for its financial support. The work of Luis M. Martinez-Patiño was supported by CONACYT through the M.Sc. Grant.

Data Availability Statement

Not applicable.

Acknowledgments

The authors would like to thank to Josué Soto-Vega for their contribution on the controller PCB design stage and Luis H. Diaz-Saldierna for their collaboration in the frequency response experimental measurement.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A. Second-Order Model

Assuming ideal components and continuous conduction mode (CCM), a second-order model can be obtained analyzing the elemenrary Super-lift Luo converter circuit using Kirchoff’s laws, with the assumption that capacitor C 1 charges at input voltage v i . The continuous averaged model is shown as follows.
d i L d t = ( 1 d ) L v C 2 + 2 d L v i
d v C 2 d t = ( 1 d ) C 2 i L + 1 C 2 R v C 2
where d stands for the averaged duty cycle. Linearization is then realized by the small signal perturbation method. The small-signal average model of the Super-lift Luo converter around the equilibrium point [ I L , V C 2 ] , is shown as follows.
d d t x ^ a = A x ^ a + B d ^ + C v ^ i
where
x ^ a = i ^ L v ^ C 2
A = 0 ( 1 D ) L 1 D C 2 1 C 2 R
B = V C 2 V i L I L C 2
C = 2 D L 0
where i ^ L , v ^ C 2 , d ^ , v ^ i are the perturbation terms of i L , v C 2 , d , v i , respectively. Neglecting the perturbation terms of v ^ i , the control-to-output transfer functions are given by the relation shown in (A8).
x ^ a ( s ) d ^ ( s ) = ( s I A ) 1 B = i ^ L ( s ) d ^ ( s ) v ^ C 2 ( s ) d ^ ( s ) T
The second-order model control-to-output voltage is of the form shown as follows.
x ^ a 1 ( s ) d ^ ( s ) = v ^ C 2 ( s ) d ^ ( s ) = ϵ 1 s + ϵ 0 ι 2 s 2 + ι 1 s + ι 0
were ϵ n and ι n coefficients are shown at Table A1.
Table A1. Coefficients for (A9).
Table A1. Coefficients for (A9).
SymbolValue
ϵ 1 R L I L
ϵ 0 ( V C 2 V i ) ( 1 D )
ι 2 C 2 L R
ι 1 L
ι 0 R ( 1 D ) 2

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Figure 1. Elementary circuit of Super-lift Luo converter.
Figure 1. Elementary circuit of Super-lift Luo converter.
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Figure 2. Super-lift Luo converter t o n interval.
Figure 2. Super-lift Luo converter t o n interval.
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Figure 3. Super-lift Luo converter t o f f interval.
Figure 3. Super-lift Luo converter t o f f interval.
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Figure 4. Super-lift Luo converter with one parasitic element.
Figure 4. Super-lift Luo converter with one parasitic element.
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Figure 5. FOC design methodology. PFE = Partial Fraction Expansion.
Figure 5. FOC design methodology. PFE = Partial Fraction Expansion.
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Figure 6. FOPID controller implementation circuit.
Figure 6. FOPID controller implementation circuit.
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Figure 7. ‘I’ controller implementation circuit.
Figure 7. ‘I’ controller implementation circuit.
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Figure 8. Bode plot of s α approximation.
Figure 8. Bode plot of s α approximation.
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Figure 9. Bode plot of FOPID approximation.
Figure 9. Bode plot of FOPID approximation.
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Figure 10. Open loop Bode plot of the minimal phase part of the system.
Figure 10. Open loop Bode plot of the minimal phase part of the system.
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Figure 11. PSIM simulation of the Super-lift Luo converter. (a) Complete simulation results, (b) close up on step response.
Figure 11. PSIM simulation of the Super-lift Luo converter. (a) Complete simulation results, (b) close up on step response.
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Figure 12. PSIM simulation, load variation response. (a) from 50 to 100%, (b) from 100 to 50%.
Figure 12. PSIM simulation, load variation response. (a) from 50 to 100%, (b) from 100 to 50%.
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Figure 13. Test setup for the Super-Lift Luo converter. (a) Practical set-up block diagram, (b) Practical set-up.
Figure 13. Test setup for the Super-Lift Luo converter. (a) Practical set-up block diagram, (b) Practical set-up.
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Figure 14. Step response for the Super-Lift Luo converter. (a) FOPID controller, (b) ‘I’ controller.
Figure 14. Step response for the Super-Lift Luo converter. (a) FOPID controller, (b) ‘I’ controller.
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Figure 15. Load variation response, from 50 to 100% load, for the Super-lift Luo converter. (a) FOPID controller, (b) ‘I’ controller.
Figure 15. Load variation response, from 50 to 100% load, for the Super-lift Luo converter. (a) FOPID controller, (b) ‘I’ controller.
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Figure 16. Frequency response analysis screenshots (a) PEC, (b) FOPID controller.
Figure 16. Frequency response analysis screenshots (a) PEC, (b) FOPID controller.
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Table 1. Coefficients for (17).
Table 1. Coefficients for (17).
SymbolValue
γ 2 R C 1 L E S R C 1
γ 1 R { [ ( C 1 V C 2 C 1 V C 1 ) E S R C 1 + L I L ] d + ( C 1 v C 1 C 1 V C 2 ) E S R C 1 }
γ 0 R [ ( V C 2 V i ) D 2 + ( 2 V i ( V C 2 + V C 1 ) ) D + ( V C 1 V i ) ]
δ 3 C 1 C 2 L E S R C 1 R
δ 2 ( C 1 C 2 E S R C 1 2 + C 2 L ) R D + ( C 1 L E S R C 1 C 1 C 2 E S R C 1 2 R )
δ 1 ( 2 C 2 + C 1 ) E S R R D 2
+ ( C 1 E S R C 1 2 + L ( 3 C 2 + 2 C 1 ) E S R C 1 R ) D
+ ( ( C 2 + C 1 ) E S R C 1 R C 1 E S R C 1 2 )
δ 0 R D 3 + ( 2 E S R C 1 2 R ) D 2 + ( R 3 E S R C 1 ) D + E S R C 1
Table 2. Coefficients for the FOPID Controller.
Table 2. Coefficients for the FOPID Controller.
ParameterValue
κ 4 1.989
κ 3 5.977 × 105
κ 2 5.419 × 1010
κ 1 1.395 × 1015
κ 0 1.083 × 1019
ν 4 1
ν 3 4.498 × 105
ν 2 6.297 × 1010
ν 1 2.893 × 1015
ν 0 4.136 × 1019
Table 3. Component relations.
Table 3. Component relations.
RelationValue
R 1 C 1 4.578207 × 10−6
R 2 C 2 2.537802 × 10−5
R 3 C 3 6.117183 × 10−6
R 4 C 4 3.401845 × 10−5
R f 1 / R i 1 1.441530
R f 2 / R i 2 0.940274
R f 3 / R i 3 0.262989
R f 4 / R i 4 0.394079
R f 5 / R i 5 1.989
Table 4. Step test results.
Table 4. Step test results.
Controller TypeRising Time (ms)Settling Time (ms)Overshoot (%)Steady State e. (%)
SimulationI21.733.50.09960.0756
PID2.23.80.17710.005
Lag-Lead1.23.40.1780.2059
Sliding0.2020.6214.6790.1656
FOPID0.1910.65820.9540.0357
Prac.I22.831.50.7170.2538
FOPID1.92.72.3060.0941
Table 5. Load variation test results.
Table 5. Load variation test results.
Controller TypeSettling Time (ms)Voltage Drop (%)
SimulationI1.33.631
PID0.62.917
Lag-Lead01.527
Sliding0.3774.276
FOPID01.667
Prac.I2.64.474
FOPID01.475
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MDPI and ACS Style

Martinez-Patiño, L.M.; Perez-Pinal, F.J.; Soriano-Sánchez, A.G.; Rico-Secades, M.; Zarate-Orduño, C.; Nuñez-Perez, J.-C. Fractional PID Controller for Voltage-Lift Converters. Fractal Fract. 2023, 7, 542. https://doi.org/10.3390/fractalfract7070542

AMA Style

Martinez-Patiño LM, Perez-Pinal FJ, Soriano-Sánchez AG, Rico-Secades M, Zarate-Orduño C, Nuñez-Perez J-C. Fractional PID Controller for Voltage-Lift Converters. Fractal and Fractional. 2023; 7(7):542. https://doi.org/10.3390/fractalfract7070542

Chicago/Turabian Style

Martinez-Patiño, Luis M., Francisco J. Perez-Pinal, Allan Giovanni Soriano-Sánchez, Manuel Rico-Secades, Carina Zarate-Orduño, and Jose-Cruz Nuñez-Perez. 2023. "Fractional PID Controller for Voltage-Lift Converters" Fractal and Fractional 7, no. 7: 542. https://doi.org/10.3390/fractalfract7070542

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