Sizing CMOS Amplifiers by PSO and MOL to Improve DC Operating Point Conditions

Abstract

The sizes of the metal-oxide-semiconductor (MOS) transistors in an operational amplifier must guarantee strong direct current operating point (DCOP) conditions. This paper shows the usefulness of two population-based optimization algorithms to size transistors, namely—particle swarm optimization (PSO) and many optimizing liaisons (MOL). Both optimization algorithms link the circuit simulator SPICE to measure electrical characteristics. However, SPICE provides an output-file indicating that a transistor is in strong inversion but the DCOP can be in the limit, and it can switch to a different condition. In this manner, we highlight the application of PSO and MOL to size operational transconductance amplifiers (OTAs), which DCOP conditions are improved by the introduction of a procedure that handles constraints to ensure that the transistors are in the appropriate DCOP. The Miller and RFC-OTA are the cases of study, and their sizing is performed using UMC 180 nm CMOS technology. In both OTAs, the objective function is the maximization of the gain-bandwidth product under the main constraint of guaranteeing DCOPs to improve two figures of merit and to provide robustness to Monte Carlo simulations and PVT variations.

1. Introduction

In electronics, the design of integrated circuits (IC) using complementary metal-oxide-semiconductor (CMOS) technology is a kind of art. For instance, analog IC designers can use circuit simulators like SPICE (simulation program with IC emphasis) to evaluate electrical characteristics [1,2], which can be improved when the sizes of the MOS transistors are varied, and this process can be performed within an optimization algorithm. Some examples of optimization are—maximizing slew rate in CMOS amplifiers [3], minimizing power, noise [4,5], voltage [6], layout area [7,8,9], and so on. Therefore, as one can infer, due to the many target specifications, the many design variables and constraints, and the sparse ranges of the search spaces of every performance of an IC, then analog design automation tools are required to optimize CMOS ICs. On the one hand, some works are focused on the generation of behavioral models [10], which are used in the automatic design of amplifiers [11], and for the optimization of complex designs like switched-capacitors sigma-delta modulators [12]. However, optimization by using behavioral models barely found optimal solutions because they do not consider real models of the MOS transistors. On the other hand, metaheuristics have shown their usefulness in optimizing analog ICs, which link circuit simulators like SPICE to evaluate electrical characteristics that are associated to a CMOS technology, as shown in References [13,14,15,16,17]. The main drawback of those metaheuristics relay on the fact that they do not guarantee that the MOS transistors work in the desired direct current operating point (DCOP), so that a slight variation in the voltage or current levels can degrade the performance of the sized analog IC. In this manner, we introduce a procedure that handles constraints to ensure that the transistors are in the appropriate DCOP. This is performed by applying two metaheuristics, namely: particle swarm optimization (PSO) and many optimizing liaisons (MOL) algorithms.

In this paper we show the application of PSO and MOL with the proper encoding of the design variables to evaluate the objective function that is associated to the gain-bandwidth product (GBW). The sizes of the MOS transistors are encoded by integer numbers to perform the genetic operations, and afterwards the design variables are replaced by real numbers to evaluate the electrical characteristics within SPICE [18]. Our main contribution is oriented to handle constraints within PSO and MOL during the sizing of a CMOS OTA, through the inclusion of a procedure to evaluate the DCOP conditions of each MOS transistor in each individual in the population. The handling of constraints receives an output text-file provided by SPICE to verify that all MOS transistors in an OTA are working in saturation region. We propose that the improvement of the DCOP is accomplished when the drain-to-source voltage is at least three times greater than the difference between the gate-to-source and threshold voltages ($V_{DS}\ge 3(V_{GS}-V_{TH})$), in each transistor. This enhances the performances of OTAs, as the ones in References [19,20,21,22,23].

Two figures of merit are used herein to compare the optimal sizing of OTAs by PSO and MOL. The sizing optimization process considers GBW as the objective function [24], and also evaluates as constraints some performances like gain [25], common-mode rejection ratio (CMRR) [26], slew rate (SR) [3], among others that are listed in the next Sections. The feasible sized solutions will be tested under process-voltage-temperature (PVT) variations [27], to highlight that a strong DCOP accomplishes better performances. The cases of study are the two-stage Miller OTA and the recycled-folded-cascode (RFC) OTA, which is one of the amplifiers in the current state of the art in analog ICs design [3,21,22,23]. The RFC-OTA is a modification of the traditional Folded Cascode (FC) OTA, and basically it converts the folding node current source of FC-OTA into a driven current source by using a recycling current mirror with a gain equal to $K=3$ to maintain power and area characteristics equal to the FC-OTA. In addition, the RFC-OTA improves the transconductance and the slew rate of the FC-OTA. The differential pair of the FC-OTA is divided in half to fix the current to $I=2$, which results in $gm=2gm1a$. Another improvement is achieved by using a cross coupled format at the differential pairs-output with the objective of increasing the bandwidth.

The rest of the article is organized as follows—Section 2 describes the problem formulation and handling of constraints to improve the DCOP conditions of the MOS transistors and highlights the operation in strong inversion, which is the main constraint to be accomplished when sizing CMOS OTAs. The PSO and MOL algorithms are described in Section 3. The encoding of the design variables of the OTAs and the pseudo-codes of the adaptation of PSO and MOL including our proposed procedure to handle constraints are given in Section 4. The feasible sized solutions of the two-stage Miller OTA and the RFC-OTA are listed in Section 5, which include the evaluation of two figures of merit and PVT analysis. Finally, the conclusions are given in Section 6.

2. Problem Formulation and Handling of Constraints

Metaheuristics are a good option in the sizing of analog ICs [28,29,30]. One can handle constraints to guide the optimization algorithm to find feasible solutions and also one can identify sets of MOS transistors having the same sizes or scaled values in order to reduce the search spaces of the design variables [18], and to ensure robustness when performing PVT variation analysis [28].

One of the main problems in sizing analog ICs is guaranteeing DCOP conditions of the MOS transistors. If a MOS transistor is not operating in the specific region, the circuit will not have the desired performance, thus affecting the output characteristics. Seminal CMOS design textbooks like Reference [31], provide guidelines to set the DCOP in a desired region. In an OTA, the MOS transistors operate in the saturation region, as shown in Figure 1, which necessary condition accomplishes (1). However, a bad sizing may lead the DCOP being located in the limit with the triode region, so that a slight variation of the voltages can lead the DCOP to be in the triode or cut-off region. In this manner, to guarantee that the MOS transistor works in the saturation region, we propose accomplishing (2), which is evaluated within PSO and MOL by introducing a procedure to handle this constraint. The OTAs used as cases of study are shown in Figure 2, which will be sized using CMOS technology of 180 nm, to accomplish a differential gain ≥ 60 dB and other performances to improve two figures of merit that are given in the following sections.

$$V_{DS}>V_{GS}-V_{TH}$$

(1)

$$V_{DS}\ge 3(V_{GS}-V_{TH}).$$

(2)

As mentioned above, we show the application of PSO and MOL algorithms to maximize GBW of the two OTAs shown in Figure 2, the contribution focus on guaranteeing that all MOS transistors work in saturation region accomplishing (2). Both metaheuristics link SPICE to evaluate electrical characteristics of each OTA. Our proposed procedure for handling constraints in the sizing problem by applying PSO and MOL is formulated as follows:

Search for the widths ($W_i$) and lengths ($L_i$) of each MOS transistor in a CMOS OTA, such that:

Maximize the GBW product of the OTA,

subject to: $V_{DS}\ge 3(V_{GS}-V_{TH})$, for each MOS transistor, and amplifier’s DC gain ≥ 60 dB, phase margin (PM) $\ge {45}^{\circ }$, common-mode rejection ratio (CMRR) ≥ 60 dB, power supply rejection ratio (PSRR) $\ge 60$ dB, and slew rate (SR) $\ge 10v/\mu s$.

It is worthy mentioning that a maximization problem can be transformed to a minimization one by multiplying by minus one the desired objective. In this case, the maximization of GBW can be transformed to the minimization of −GBW.

3. PSO and MOL Algorithms

The history of PSO began from 1995, and nowadays it has been widely applied to size analog ICs [32,33,34], but still several open problems need attention [35]. The MOL algorithm has also shown good results in optimizing electric systems like in [36].

3.1. Particle Swarm Optimization Algorithm

PSO is based on a mathematical model developed by Kennedy and Eberhart in 1995 [35]. It describes the social behavior of birds or fishes. The model is based on the basic principles of self-organization that are used to describe complex systems. PSO is one of the most used mono-objective metaheuristics due to its success in solving optimization problems. As detailed in Reference [37], it starts from a set of randomly distributed particles in a limited search space. These particles have an initial position and velocity that are represented by simple mathematical expressions. These expressions suggest the movement of each particle towards the best position as an individual and the best global position, besides there are different variants using different update rules. The general idea is to initialize a set of particles in a search space, this gives the particles a favorable initial position, in addition an initial velocity vector is assigned, which allows the particles to change their position in each iteration while the speed is adjusted depending on some random parameters. Each particle can remember its best position and recognize if its current position is the best among the other particles, that is, the best global. The particles have to be updated according to their positions and past speeds. Mathematically, the updating equations are given in (3) and (4),

$$v_i(t+1)=v_i\left(t\right)+c_1\mathrm{rand}\left(\right)(p_{best}\left(t\right)-p_i\left(t\right))+c_2\mathrm{rand}\left(\right)(g_{best}\left(t\right)-p_i\left(t\right))$$

(3)

$$p_i(t+1)=p_i\left(t\right)+v_i(t+1),$$

(4)

where $v_i(t+1)$ and $p_i(t+1)$ represent the velocity and position of the particle in the i${}_{th}$ iteration, respectively; rand() is a function that returns uniform random real number values between 0 and 1; $p_{best}$ and $g_{best}$ represent the best position of the particle and the best global position among all the particles; $c_1$ and $c_2$ are two parameters that represent the confidence of the particle itself (cognition) and in the swarm (social behavior), respectively. These last constants are the most relevant in (3), according to a set of tests it was found that the higher the constants the faster the convergence will be. As mentioned in [35], the constants $c_1$ and $c_2$ have values that may improve the convergence, but it depends on the kind of problem. As already shown in [37], the PSO algorithm works fine if these constants are set to $c_1=c_2=2$.

3.2. Many Optimizing Liaisons Algorithm

MOL is a variant of PSO that is based on eliminating the best known position of the particle $p_{best}$ in (3), which updates to (5). This variant behaves similarly or better than the PSO algorithm, where it proposes several combinations for the MOL parameters w, $c_2$, given in (5), and the number of individuals (particles) for different problems, and thus one calibrates the algorithm depending on the dimensions of the problem and the number of evaluations of the objective function. MOL is a purely social algorithm tending to follow the best swarm’s particle ($g_{best}$), thus when the inertia coefficient $w=1$, it restricts the particles exploring better solutions in the search space, so that a challenge is finding the appropriate w value that allows the particles exploring different directions to find better solutions in the entire search space, in addition to maintain the velocity’s limits in a previously defined range. In this work the MOL parameters are set to $w=-0.31$ and $c_2=2.03$.

$$v_i(t+1)=w{v}_i\left(t\right)+c_2\mathrm{rand}\left(\right)(g_{best}\left(t\right)-p_i\left(t\right)).$$

(5)

4. Sizing OTAs by PSO and MOL to Improve DCOP Conditions

The pseudo-code provided in [38] associated to PSO algorithm, is used herein and it is adapted to size the two CMOS OTAs shown in Figure 2. The evaluation process links SPICE, which data is manipulated through writing and reading text-files that contain the descriptions and analyses of the CMOS OTAs. The pseudo-code of PSO is given in Algorithm 1, where one can see the call to SPICE and the verification of the DCOP conditions of the MOS transistors to guarantee that they are in saturation. The only difference between PSO and MOL algorithms in the pseudo-code is when the velocity of the particle is updated, in this case, the pseudo-code of MOL is the same as PSO but replacing (3) by (5).

An OTA must guarantee high differential-mode gain under the condition that all MOS transistors operate in saturation according to (2). If all MOS transistors are in the appropriate DCOP condition, then the OTA sized solutions are feasible. In this manner, and based on the selection mechanism given in [39], to select the best particle our proposed handling of constraints performs the following procedure: If two particles that satisfy (2) are compared, the particle with the highest GBW is chosen, for the case when one particle satisfies (2) and the other not, choose the one that satisfies (2). Finally, if none of the particles satisfy (2), the particle with more MOS transistors accomplishing the DCOP conditions is chosen. This constraint handling is used each time a particle is updated in both the PSO and MOL algorithms.

Algorithm 1 PSO

1: procedurePSO($nPop,MaxIt$) 2:     Generate the input file of the OTA (netlist) according to SPICE 3:     for $i=1:nPop$ do 4:         Initialize randomly the design variables: width (W), (L) of the MOS transistors and the bias current ($I_B$) 5:         Replace randomly the design variables into the netlist 6:         Simulate the OTA${}_i$ in SPICE 7:         Get the electrical characteristics of the output file (${}_{*}.list$) according to SPICE 8:         Calculate the constraints with respect to the electrical characteristics and update the $p_{best}$ particle 9:         Update the $g_{best}$ particle by checking the constraints. 10:     end for 11:     for $it=1:MaxIt$ do 12:         for $i=1:nPop$ do 13:            Copy particle i to p 14:            Update the particle p velocity according to (3) 15:            Update the particle p position (design variables) according to (4) 16:            Replace the new design variables into de netlist 17:            Simulate the OTA${}_p$ in SPICE 18:            Compare particles i and p 19:            Update $p_{best}$ and $g_{best}$ particles by checking the constraints. 20:         end for 21:     end for 22: end procedure

The netlist of the OTAs is generated according to SPICE, and the design variables W and L are encoded by integer numbers, as already shown in [18]. An additional design variable is the bias current that is labeled as $I_B$ in the two OTAs shown in Figure 2 between 10 $\mathsf{\mu }$A and 100 $\mathsf{\mu }$A. W is set between 10 and 1500, and are scaled to microns within SPICE by using the command $.option$$scale$. The scale is equated to 0.09 $\mathsf{\mu }$ within SPICE, which is equivalent to the lambda of the CMOS technology of 180 nm. The length of the MOS transistor L is set between 2 and 10, and also is scaled to the lambda of the technology. An example of using these commands within SPICE is given below.

.option scale = 0.09 u

.param W1 = 56 W2 = 67 L = 4 IB = 50.

In the case that PSO or MOL produce a negative number when evaluating (3), it is replaced by the minimum value of the search space of W. The DCOP condition is guaranteed by extracting the values of $V_{DS}$, $V_{GS}$ and $V_{TH}$ for each MOS transistor and from the output text-file provided by SPICE, with extension. lis. In this text-file, each MOS transistor (M1, M2, …, M6) has currents $I_d$ in the ranges of microns ($\mathsf{\mu }$), and the voltages in milli-volts (m). Each column is verified to accomplish that the ratio in (2) is greater than 3 (see 3($V_{GS}-V_{TH}$) in Figure 1), so that the DCOP of the MOS transistor is in saturation. If the ratio is lower than 3, the MOS transistor is in triode region, which is not appropriate for the OTAs. If all MOS transistors are in saturation, PSO and MOL algorithms evaluate the GBW, and updates the best individual associated to the highest GBW of the population.

In this paper, the process to calculate the silicon area of each MOS transistor is based on the layout and the smallest W and L allowed by the technology, and scaled by $\lambda$, which is 0.09 $\mathsf{\mu }$m. Figure 3 shows the minimum dimensions in $\lambda$ occupied by an N-type and a P-type MOS transistor. As one sees, the estimation of the area is performed considering W and L of the transistor. The equations that estimate the area of an N-type and a P-type MOS transistor are given in (6) and (7), respectively. Therefore, the estimated total area is associated to the sum of each of the MOS transistors that are included into the OTAs shown in Figure 2. It is important to mention that these equations are only an estimate, since the area of the contacts and the metallic interconnections were not considered.

$$Are{a}_{N-transistor}=(W\lambda +5\lambda )(L\lambda +16\lambda )$$

(6)

$$Are{a}_{P-transistor}=(W\lambda +12\lambda )(L\lambda +24\lambda ).$$

(7)

5. Feasible Sized Solutions Provided by PSO and MOL

Both PSO and MOL were executed during 30 runs to size the CMOS Miller and RFC-OTAs already shown in Figure 2, and 100 generations were considered for each run with populations of 10 particles. The characteristics of the two solved problems are summarized in

Table 1. Electrical characteristics for the sizing of the OTAs.

Topology	Miller OTA	Recycled-Folded-Cascode OTA
UMC CMOS technology	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$m
Voltage supply (V)	±0.9	±0.9
$C_L$(pF)	5	5
DC Gain (dB)	≥60	≥60
GBW (MHz)	>100	>20
PM (${}^{\circ }$)	>45	>45
CMRR (dB)	≥60	≥60
SR+ (V/$\mathsf{\mu }$s)	≥10	≥10
SR− (V/$\mathsf{\mu }$s)	≥10	≥10
PSRR+ (dB)	≥60	≥60
PSRR− (dB)	≥60	≥60
Power Dissipation (mW)	<5	<10
MOS AREA ($\mathsf{\mu }$m${}^2$)	≤1500	≤4500
SAT	≥3	≥3

. Both sizing algorithms guarantee DCOP conditions accomplishing (2).

The feasible solutions (sizes) can be compared through evaluating a figure of merit (FoM). In this case, and according to [27], the criteria is that the higher the value of the FoM, the better the performance of the OTA. As the GBW is the objective function, the small-signal $Fo{M}_s$ [5,40,41], is evaluated by (8), and the large-signal $Fo{M}_l$ by (9).

$$Fo{M}_s={\displaystyle \frac{\mathrm{GBW}\times C_L}{I_B}}$$

(8)

$$Fo{M}_l={\displaystyle \frac{SR\times C_L}{I_B}}.$$

(9)

An important aspect and one of the advantages of sizing applying metaheuristics is that it allows us to obtain a set of solutions that satisfy the established specifications. These solutions are called feasible solutions. On the other hand, by having a set of feasible solutions and not a single solution, it allows the designer to choose the design that best suits their requirements.

5.1. Sizing the Two-Stage Miller Amplifier

In both PSO and MOL the direction of the particle gradually changes to move in the direction of the best found positions, looking in its vicinity and potentially discovering better positions according to Equations (3)–(5). In sizing CMOS OTAs, the position of the particle represents the W, L and $I_B$ that are being updated in order to find the best GBW product. According to the constraint-handling mechanism implemented herein, the best particle is the one that meets the greatest number of constraints, lowest silicon area and differential-mode gain of at least 60 dB. This is shown in Figure 4 where GBW is evaluated for 10 particles at each generation for 30 runs. One can see the evolution of the best global particle, when the problem formulation is oriented to minimize GBW. These results are summarized in

Table 2. Electrical characteristics and feasible W/L sizes of the Miller OTA guaranteeing DCOP conditions of the MOS transistors applying PSO for the best 10 runs. The best values are highlighted in bold face.

Solution	1	2	3	4	5	6	7	8	9	10
GBW (MHz)	108.93	108.88	108.26	108.32	107.85	107.85	108.41	108.37	108.19	108.16
DC GAIN (dB)	60.597	60.884	60.827	62.273	60.463	60.463	62.214	62.373	62.579	62.589
PM (${}^{\circ }$)	52.46	51.8	53.34	51.72	54.06	54.06	51.45	51.78	51.53	51.6
CMRR (dB)	70.865	72.584	74.884	72.005	66.5559	66.5559	73.557	72.005	71.1141	67.7927
SR+ (v/$\mathsf{\mu }$s)	45	45	45	45	45	44	45	45	45	45
SR− (v/$\mathsf{\mu }$s)	26	26	26	26	26	24	26	26	26	26
PSRR+ (dB)	67.549	67.715	67.391	67.777	67.15	67.15	67.822	67.777	67.845	67.831
PSRR− (dB)	72.903	73.566	73.428	75.072	72.605	72.605	74.939	75.072	75.793	75.818
Power dissipation (mW)	3.68	3.73	3.72	3.75	3.81	3.81	3.73	3.74	3.83	3.73
MOS AREA ($\mathsf{\mu }$m${}^2$)	1306.77	1255.58	1049.35	1179.94	1075.95	1075.95	1255.85	1183.72	1085.83	1073.07
$Fo{M}_s$	5446.5	5444	5413	5416	5392.5	5392.5	5420.5	5416	5409.5	5408
$Fo{M}_l$	1300	1300	1300	1300	1300	1200	1300	1300	1300	1300
W1 (M1,M2) ($\mathsf{\mu }$m)	49.5	49.32	49.14	49.77	49.23	49.23	49.86	50.77	49.68	49.68
W2 (M4,M5,M6) ($\mathsf{\mu }$m)	63.72	55.35	43.02	49.77	49.23	49.23	55.71	49.77	40.14	39.33
W3 (Mb,M3,M7) ($\mathsf{\mu }$m)	67.5	72.45	60.57	66.69	55.26	55.26	68.67	66.69	67.68	67.05
L1 (M1,M2) ($\mathsf{\mu }$m)	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45
L2 (M4,M5,M6) ($\mathsf{\mu }$m)	0.36	0.36	0.36	0.45	0.36	0.36	0.45	0.45	0.45	0.45
L3 (Mb,M3,M7) ($\mathsf{\mu }$m)	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27
Ib ($\mathsf{\mu }$A)	88	100	100	100	100	100	100	100	100	100

and

Table 3. Electrical characteristics and feasible W/L sizes of the Miller OTA guaranteeing DCOP conditions of the MOS transistors applying MOL for the best 10 runs. The best values are highlighted in bold face.

Solution	1	2	3	4	5	6	7	8	9	10
GBW (MHz)	107.82	108.57	108.92	108.95	108.98	109	108.98	108.98	109	109
DC GAIN (dB)	61.3	61.192	60.77	60.778	60.719	60.617	60.659	60.66	60.592	60.57
PM (${}^{\circ }$)	52.69	52.01	51.26	51.79	51.85	51.8	51.87	51.9	51.89	52.02
CMRR (dB)	70.02	67.716	67.07	73.052	70.5329	68.235	68.759	74.41	67.652	74.42
SR+ (v/$\mathsf{\mu }$s)	45	45	45	45	45	45	45	45	45	45
SR− (v/$\mathsf{\mu }$s)	−26	−26	−26	−27	−27	−27	−26	−26	−26	−26
PSRR+ (dB)	67.759	67.716	67.785	67.7	67.68	67.671	67.668	67.662	67.652	67.626
PSRR− (dB)	74.337	74.293	73.314	73.324	73.187	72.96	73.053	73.064	72.902	72.864
Power dissipation (mW)	3.8	3.8	3.85	3.84	3.84	3.85	3.85	3.85	3.85	3.85
MOS AREA ($\mathsf{\mu }$m${}^2$)	697.03	686.11	966.24	893.59	922.47	997.59	958.66	950.21	1003.26	994.03
$Fo{M}_s$	5429.5	5428.5	5446	5447.5	5449	5450	5449	5449	5450	5450
$Fo{M}_l$	1300	1300	1300	1350	1350	1350	1300	1300	1300	1300
W1 (M1,M2) ($\mathsf{\mu }$m)	49.14	49.14	49.5	49.41	49.5	49.59	49.5	49.5	49.59	49.59
W2 (M4,M5,M6) ($\mathsf{\mu }$m)	41.76	40.86	67.86	61.11	63.99	71.37	67.59	66.78	72	71.19
W3 (Mb,M3,M7) ($\mathsf{\mu }$m)	72	70.29	76.41	72.45	72	72.36	71.91	71.64	71.73	70.74
L1 (M1,M2) ($\mathsf{\mu }$m)	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45	0.45
L2 (M4,M5,M6) ($\mathsf{\mu }$m)	0.36	0.36	0.36	0.36	0.36	0.36	0.36	0.36	0.36	0.36
L3 (Mb,M3,M7) ($\mathsf{\mu }$m)	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27	0.27
Ib ($\mathsf{\mu }$A)	88	100	100	100	100	100	100	100	100	100

for PSO and MOL, respectively. The gain constraint given in Table 1 is accomplished as shows in the first row of each Table. The objective function GBW values are listed in the second row. The other performances are listed in the Tables above the evaluation of the $Fo{M}_s$ and $Fo{M}_l$. Below the figures of merit we list the best sizes for each run that are associated to the MOS transistors, and the bias current in the last row of each Table.

As recommended in Reference [35], the parameters w and $c_2$ of the MOL algorithm must be tuned according to the problem at hand. In this work they are set to $w=-0.31$ and $c_2=2.03$, and the same parameters are used to size the RFC-OTA.

5.2. Recycled Folded Cascode Operational Transconductance Amplifier

Figure 5 shows the behavior of the best global particle for 30 runs using the PSO and MOL algorithms to size the RFC-OTA. This figure just shows only the feasible solutions. For both PSO and MOL algorithms, it takes some generations to obtain these feasible solutions. It can be appreciated that unlike the Miller OTA, the feasible solutions of the RFC-OTA are more dispersed, however, in each run both the objective function and constraints are fulfilled around 100 generations.

Table 4. Electrical characteristics and feasible W/L sizes of the RFC-OTA guaranteeing DCOP conditions of the MOS transistors applying PSO for the best 10 runs. The best values are highlighted in bold face.

Solution	1	2	3	4	5	6	7	8	9	10
GBW (MHz)	67	53	54	47	51	49	48	43	47	44
DC GAIN (dB)	68	67	70	68	67	64	71	72	69	64
PM (${}^{\circ }$)	66.51	62.92	62.45	65.88	56.88	61.93	50.06	59.83	65.42	69.8
CMRR (dB)	106.2	103	107.606	99.932	106.952	99.225	109.857	105.176	107.558	99.235
SR+ (v/$\mathsf{\mu }$s)	17	18	17	14	16	17	16	11	11	10
SR− (v/$\mathsf{\mu }$s)	−28	−42	−48	−52	−40	−41	−35	−37	−35	−33
PSRR+ (dB)	67	67	70	68	67	65	71	72	70	64
PSRR− (dB)	99	90	106	99	91	85	111	119	90	88
Power dissipation	7	6	6	2	6	5	6	5	6	6
MOS AREA ($\mathsf{\mu }$m${}^2$)	3293.53	3501.53	3482.8	3605.79	4076.81	3345.75	4217.65	4081.78	4012.82	3536.89
$Fo{M}_s$	3361.9	3050	2718	3651.23	2566.4	2477.3	2411.85	3013.25	2449.32	2463.54
$Fo{M}_l$	850	900	850	1076	800	850	800	753	572	555
W1 ($\mathsf{\mu }$m)	90	90	90	11.79	70.56	37.26	47.34	49.77	90	90
W2 ($\mathsf{\mu }$m)	75.69	71.64	90	90	90	90	90	88.56	71.46	55.17
W3 ($\mathsf{\mu }$m)	71.1	90	48.6	90	90	90	90	90	90	90
W4 ($\mathsf{\mu }$m)	13.05	0.99	7.65	55.26	26.91	0.99	49.32	22.23	0.99	0.99
W5 ($\mathsf{\mu }$m)	0.99	28.62	39.51	0.99	90	33.96	19.17	0.99	6.57	29.61
W6 ($\mathsf{\mu }$m)	41.4	27.09	36.99	13.95	14.4	11.45	90	27.72	90	87.66
W7 ($\mathsf{\mu }$m)	27.81	36.36	33.48	90	90	27.15	41.49	90	72.09	90
W8 ($\mathsf{\mu }$m)	90	89.73	90	57.06	33.84	90	89.37	90	64.35	10.08
L1 ($\mathsf{\mu }$m)	0.54	0.63	0.9	0.18	0.9	0.9	0.72	0.9	0.9	0.63
L2 ($\mathsf{\mu }$m)	0.27	0.27	0.36	0.72	0.36	0.36	0.36	0.36	0.18	0.18
L3 ($\mathsf{\mu }$m)	0.45	0.45	0.36	0.36	0.54	0.54	0.72	0.9	0.9	0.9
L4 ($\mathsf{\mu }$m)	0.45	0.18	0.81	0.72	0.63	0.18	0.72	0.54	0.27	0.18
L5 ($\mathsf{\mu }$m)	0.72	0.27	0.18	0.27	0.36	0.27	0.9	0.9	0.9	0.18
L6 ($\mathsf{\mu }$m)	0.81	0.63	0.54	0.18	0.27	0.45	0.72	0.9	0.9	0.72
L7 ($\mathsf{\mu }$m)	0.18	0.36	0.18	0.54	0.63	0.18	0.27	0.9	0.54	0.45
L8 ($\mathsf{\mu }$m)	0.36	0.63	0.45	0.18	0.27	0.9	0.54	0.54	0.45	0.18
Ib ($\mathsf{\mu }$A)	100	91	100	65	100	100	100	73	96	90

and

Table 5. Electrical characteristics and feasible W/L sizes of the RFC-OTA guaranteeing DCOP conditions of the MOS transistors applying MOL for the best 10 runs. The best values are highlighted in bold face.

Solution	1	2	3	4	5	6	7	8	9	10
GBW (MHz)	78	95	71	66	66	65	62	61	60	62
DC GAIN (dB)	64	62	65	69	69	62	62	68	63	70
PM (${}^{\circ }$)	65.07	67.08	68.08	63.59	64.22	82.7	64.36	64.38	56.55	54.71
CMRR (dB)	100	98	101	104	105	97	111	100	104	87
SR+ (v/$\mathsf{\mu }$s)	21	24	20	20	20	12	18	24	19	15
SR− (v/$\mathsf{\mu }$s)	75	24	50	51	51	59	17	46	43	17
PSRR+ (dB)	63	62	65	70	70	63	61	68	63	68
PSRR− (dB)	87	84	94	93	93	84	90	104	85	94
Power dissipation	7	7	6	6	6	6	6	6	6	8
MOS AREA ($\mathsf{\mu }$m${}^2$)	3701.18	4284.09	4007.16	4284.09	4251.3	2726.97	2642.06	3779.43	4036.81	3808.75
$Fo{M}_s$	3900	4750	3550	3300	3300	3250	3100	3050	3000	3100
$Fo{M}_l$	1050	1200	1000	1000	1000	600	900	1200	950	750
W1 ($\mathsf{\mu }$m)	90	90	90	90	90	90	90	90	90	25.83
W2 ($\mathsf{\mu }$m)	90	76.59	90	90	90	90	51.66	90	90	90
W3 ($\mathsf{\mu }$m)	90	90	90	90	90	21.15	72.9	19.8	90	90
W4 ($\mathsf{\mu }$m)	22.86	8.19	7.2	0.99	0.99	0.99	17.82	18.72	18.27	25.29
W5 ($\mathsf{\mu }$m)	0.99	0.99	0.99	0.99	0.99	1.8	0.99	0.99	90	0.99
W6 ($\mathsf{\mu }$m)	59.94	83.97	90	90	90	29.52	14.22	90	90	54.99
W7 ($\mathsf{\mu }$m)	14.13	21.96	90	90	90	90	15.58	90	16.2	90
W8 ($\mathsf{\mu }$m)	90	57.33	22.23	90	90	19.08	21.51	90	38.61	90
L1 ($\mathsf{\mu }$m)	0.63	0.45	0.9	0.9	0.9	0.54	0.9	0.9	0.9	0.18
L2 ($\mathsf{\mu }$m)	0.27	0.27	0.36	0.36	0.36	0.27	0.27	0.36	0.36	0.18
L3 ($\mathsf{\mu }$m)	0.36	0.36	0.36	0.36	0.36	0.18	0.36	0.18	0.36	0.9
L4 ($\mathsf{\mu }$m)	0.36	0.18	0.18	0.18	0.18	0.18	0.9	0.36	0.45	0.9
L5 ($\mathsf{\mu }$m)	0.9	0.18	0.18	0.18	0.18	0.54	0.9	0.18	0.18	0.9
L6 ($\mathsf{\mu }$m)	0.54	0.63	0.9	0.9	0.9	0.36	0.18	0.9	0.9	0.9
L7 ($\mathsf{\mu }$m)	0.18	0.18	0.63	0.54	0.36	0.45	0.18	0.45	0.18	0.63
L8 ($\mathsf{\mu }$m)	0.27	0.27	0.18	0.27	0.27	0.18	0.18	0.54	0.18	0.27
Ib ($\mathsf{\mu }$A)	100	100	100	100	100	100	100	100	100	100

show the feasible electrical characteristics of the RFC-OTA applying PSO and MOL. These values demonstrate that the sizes found by the particles meet all the constraints that were determined in the problem definition. A key point for these constraints to be fulfilled and the objective function to be improved is the way the constraints handling is performed. In this work, at the beginning the algorithm looks for the solutions that best comply with the constraints and then is responsible for improving the objective function. A comparison among the solutions generated by PSO and MOL for the 30 runs and for both OTAs is shown in Figure 6. It can be appreciated that MOL finds better feasible solutions on average (with greater GBW), and also it can find better isolated solutions.

As one can infer, sizing the RFC-OTA requires a higher computational effort than the OTA Miller. However, the application of PSO and MOL, provided better figures of merit compared to the literature. For example: according to Table 4 and Table 5, the $Fo{M}_s$ value is 3361.9 and 4750 by applying PSO and MOL, respectively. These values are much better than the reported one in [21] as 1029, [3] as 2642, [23] as 260.4, [42] as 1920, [43] as 2101, [27] as 2365, [44] as 404.44, and in [45] as 2540. Thus demonstrating that our proposed sizing approach by guaranteeing DCOP conditions is capable of achieving better results than those found in the state-of-the-art.

5.3. Monte Carlo and PVT Analyses

Montecarlo is a statistical analysis where $V_{TH}$, $T_{OX}$, W, L and mismatch are varied randomly in the circuit devices. Nevertheless, to guarantee the robustness of the integrated circuits it is also necessary to carry out a process-voltage-temperature (PVT) analysis, since it performs variations in voltage and/or temperature without taking into account mismatch, and the process variation includes corner analysis.

5.3.1. Monte Carlo Analysis

Monte Carlo method is quite important in the statistical analysis of integrated circuits, besides there is no equation for the forward relation between the simulated data and the model parameters. Therefore, Monte Carlo simulations are commonly performed to analyze experimental data and eventually to acquire predictive capabilities. In this paper, Monte Carlo analysis was performed to the 30 optimized results shown in Figure 4 and Figure 5 during 1000 runs. The data from each Monte Carlo simulation was processed to find statistical data, such as the mean and standard deviation. From these data we selected the 10 best solutions shown in Table 2, Table 3, Table 4 and Table 5. The criterion for selecting these solutions were those with greater GWB average and low standard deviation.

The statistical comparison of all Monte Carlo solutions during 1000-runs was carried out, and the results are shown in Figure 7, where the mean and standard deviation of each OTA are plotted when applying PSO and MOL. An important aspect that should be highlighted is that the sizing of the RFC-OTA is more complex than that of the Miller OTA. However, the variability of the Monte Carlo analysis does not affect the best solution obtained by PSO and MOL.

From the above analysis, the best solutions are shown in Figure 8, where one can see the Monte Carlo simulation results for the GBW of the Miller and RFC-OTA, respectively. The results provided by PSO and MOL are almost similar in Figure 8a for the Miller-OTA, but as the RFC-OTA is more complex, PSO and MOL provided different results as shown in Figure 8b. The simulations were carried out assuming 10% deviation (with a Gaussian distribution) in W and L for all the MOS transistors.

5.3.2. PVT Analysis

The analog IC design faces a lot of challenges as ensuring that all target specifications are achieved. In this manner, the feasible solutions provided by a metaheuristic yet need to satisfy other statistical analyses like PVT variations. It is worth mentioning that process variations depend on global variations such as wafer imperfections or chemical processes, voltage variations are due to untimely changes in the supply voltages that affect the DCOP of the transistors, and temperature variations occur in most cases when the circuit is near heat-sources or by the same energy of the circuit. In this manner, and as mentioned in Section 2, guaranteeing the DCOP of each transistor is an important aspect because it influences directly the performance of the CMOS OTA. Currently, the conditions in which the ICs work are not ideal, therefore they must maintain their electrical characteristics despite being affected by PVT variations. In this manner, we include PVT analysis to demonstrate that the feasible solutions of the OTAs accomplish the condition given in (2). Therefore, the PVT simulation results for the Miller and RFC-OTA are shown in Figure 9 and Figure 10, and they confirm that the GBW remains within a stable range, as does the DC gain because the DCOP was guaranteed during the optimization. Each figure shows one of the corners of the typical-typical (TT), fast-fast (FF), slow-slow (SS), fastN-slowP (FNSP) and slowN-fastP (SNFP) cases. Each corner case is performed by varying the voltage by $\pm 10\%$ of the supply voltage, and the temperature by varying from −20 degrees, 60 degrees to 120 degrees.

In the optimization process, the OTA Miller was encoded with three widths and three lengths, and the RFC-OTA was encoded with eight widths and eight lengths. The feasible sizes solutions have the ranges shown for the OTA Miller in Figure 11. In the case of the RFC-OTA, the ranges of the feasible sizes are shown in Figure 12. These box plots show the median and quartiles of the data, so that one can choose design variables in the less sensitive values. For example, in the second rows of Figure 11 and Figure 12, one can conclude that the more sensitive values are associated to the length L1 and L3, which were encoded with M1, M2, M4, M5 and M7 according to Table 2. Therefore, this length needs to maintain a value of about 0.45 $\mathsf{\mu }$m and 0.18 $\mathsf{\mu }$m respectively, in order to achieve the objectives and constraints described in the problem definition.

Analyzing the results of the RFC OTA simulations and Figure 12, it is possible to identify the transistors that are more sensitive. They are the current mirror that bias the differential pair. This is because the bias $Vcn$ must bias the current mirrors in cascode configuration. Therefore, to satisfy the objectives it is necessary that the widths and lengths: W4, W5, L4 and L5, remain around the values shown in Figure 12, since outside these ranges the circuit could not meet the target specifications. Some recent research has been done by applying regression techniques [46], and it can be combined to improve the sizing of MOS amplifiers to enhance important characteristics as slew rate [47].

6. Conclusions

Sizing CMOS OTAs is very challenging because there are many target specifications that must be accomplished, and the design variables can have sparse search space ranges. This work highlighted the usefulness of applying metaheuristics like PSO and MOL to size OTAs using CMOS technology, and linking a circuit simulator like SPICE to evaluate electrical characteristics that also have sparse search space ranges. The main goal was oriented to guarantee DCOP conditions of all MOS transistors, and it was accomplished in all the optimization cases applying PSO and MOL. We proposed that the DCOP can be guaranteed if the drain-to-source voltage $V_{DS}$ is at least three times greater than the difference between the gate-to-source and threshold voltages: $V_{GS}-V_{TH}$. This condition was programmed into the PSO and MOL algorithms as our proposed procedure for handling constraints. The feasible sizes of the MOS transistors provided by PSO and MOL were tested under Monte Carlo and PVT variations to guarantee robust design of the Miller OTA and the RFC-OTA. We showed the behavior of both metaheuristics, PSO and MOL during 30 runs, using 10 particles in each run and optimizing GBW over 100 generations. The optimization results confirmed the suitability of applying metaheuristics in the sizing of analog ICs, and the usefulness of our proposed procedure for the handling of constraints to guarantee appropriate DCOP conditions of the feasible sized solutions. As one can infer, both PSO and MOL can be extended to perform the optimal sizing of other integrated circuits, basically one must know the features and target specifications of each particular circuit, so that one can set the design variables, objectives, constraints and corresponding analyzes into the metaheuristics to perform the optimization. Finally, it is worthy mentioning that the optimal sizing by PSO and MOL does not require a particular technology, instead one can use non-CMOS technologies according to the designer’s requirements