Next Article in Journal
Wireless Sensor Networks for Smart Homes: A Fuzzy-Based Solution for an Energy-Effective Duty Cycle
Next Article in Special Issue
A Nonisolated Three-Port DC–DC Converter with Continuous Input and Output Currents Based on Cuk Topology for PV/Fuel Cell Applications
Previous Article in Journal
Backscatter Communications: Inception of the Battery-Free Era—A Comprehensive Survey
Previous Article in Special Issue
A 10 kW ZVS Integrated Boost Dual Three-Phase Bridge DC–DC Resonant Converter for a Linear Generator-Based Wave-Energy System: Design and Simulation
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Small-Signal Stability Analysis of Multi-Terminal DC Grids

by
Amr Ahmed A. Radwan
Engineering and Design Department, Electrical Engineering, Western Washington University, Bellingham, WA 98225, USA
Electronics 2019, 8(2), 130; https://doi.org/10.3390/electronics8020130
Submission received: 14 January 2019 / Revised: 14 January 2019 / Accepted: 21 January 2019 / Published: 26 January 2019
(This article belongs to the Special Issue Advanced Power Conversion Technologies)

Abstract

:
This paper presents a detailed small-signal analysis and an improved dc power sharing scheme for a six terminal dc grid. The multi-terminal DC (MTDC) system is composed of (1) two voltage-source converters (VSCs) entities operating as rectification stations; (2) two VSCs operating as inverting stations; (3) two dc/dc conversion stations; and (4) an interconnected dc networking infrastructure. The small-signal state-space sub-models of the individual entities are developed and integrated to formulate the state-space model of the entire system. Using the modal analysis, it is shown that the most critical modes are associated with the power sharing droop coefficients of the rectification stations, which are constrained by the steady-state operational requirements. Therefore, a second degree-of-freedom compensation scheme is proposed to improve the dynamic response of the MTDC system without influencing the steady-state operation. Time domain simulation results are presented to validate the analysis and show the effectiveness of the proposed techniques.

1. Introduction

Following the progressive improvements in the semiconductors industry, high-voltage-high-power power electronic converters are recently emerging the market. The newly developed ABB HiPak™ insulated-gate-bipolar-transistor (IGBT) is introduced with high power density (4.5 kV, 1.2 kA) and a relatively high switching frequency of 2 kHz [1]. Motivated by these improvements, voltage-source converters (VSC)-based HVDC systems are widely adopted [2]. VSCs have recently reached a dc voltage level of 350 kV whereas the largest installed dc transmission system is rated at 400 MW [3]. Futuristic visions of multi-terminal dc (MTDC) grids are investigated to evaluate their cost-benefit feasibility. As compared to point-to-point HVDC systems, MTDC grids are technically well-suited to interface scattered-long-distant bulk delivery of offshore wind energy [3,4].
In the future power systems, dc grids (among them, the MTDC) are expected to penetrate the ac power system to interconnect multiple ac networks, express infeed systems to city centers or supply remote areas [5,6,7]. As shown in Figure 1, the MTDC system understudy is an adapted version from [6] and is formed to interface six power electronic-based entities [6,7]. The MTDC infrastructure can be considered as a dc pool that supplies/receives dc powers to/from the terminal entities. The rectification stations consist of voltage-source rectifiers (VSRs), denoted as VSC1 and VSC2 in Figure 1, which operate as supplying units to inject the dc powers ( P d c 1 and P d c 2 ) to the dc pool. The ac sides of VSC1 and VSC2 can be wind or photovoltaic farms, or a remotely-connected ac utility-grid. On the same figure, there are four loading entities: Two are interfaced by voltage-source inverters (VSIs), denoted as VSC3 and VSC4, to supply the dc power ( P d c 3 and P d c 4 ) to the remotely-connected ac grids whereas two dc/dc buck converters draw P d c 5 and P d c 5 in order to share a common resistive load ( R l o a d ). The base value of the dc power and the dc voltage for the MTDC system in Figure 1 are 500   MW and 250   kV , respectively.
In literature, the control of the MTDC systems is categorized into two main schemes: The master-slave and the dc-voltage droop control scheme. The reliability of the master-slave configuration is relatively low because the loss of the master converter is followed by an immediate failure of the entire system. Moreover, the master converter broadcasts the control commands to the slave converters via communication means, which might not be a feasible option in the remotely dispersed MTDC networks [8]. On the contrary, the dc-voltage droop control offers a much higher reliability because the operation of the MTDC network is not dependent on one converter and the control strategy is entirely autonomous [9].
A systematic control design procedure and a stability analysis for a MTDC system connecting offshore wind farms to ac systems have been presented in [10]. The authors emphasize on the droop selection criteria and use a behavioral model of VSCs, which does not reflect the complete dynamics of the overall system. A dc droop-based control scheme has been considered in [11] where the droop controllers are designed by solving a convex optimization problem with linear matrix inequalities. Another work in [12] investigates the influence of the transmission-lines resistance within the MTDC network in the steady-state conditions using static power flow tools. However, the associated dynamic stability conditions are not addressed.
A modified droop control loop has been proposed in [13,14] to provide a frequency support to the interconnected ac grids via the MTDC network. The modified droop scheme is effective in reducing the frequency deviations following disturbances on the ac side. An adaptive droop control scheme is provided in [15] to ensure a proper distribution of the power burden among the droop-equipped converters. In [16], a small-signal stability study of the MTDC network is conducted considering the dynamics of the interconnected ac machines. However, the influence of the droop-based power sharing is not addressed. Multiple simulation results are shown in [17] to reflect the effectiveness of the MTDC networks as an attractive transmission system.
Motivated by the potential benefits of the high-voltage dc networks, this paper presents an extensive modal analysis based on a complete state-space model for the MTDC system shown in Figure 1. The influence of the droop-based dc power sharing control on the MTDC system stability is investigated. It is shown that the high dc-voltage droop coefficients have a positive influence on the system stability but is accompanied with a remarkable steady-state degradation in the dc-voltage regulation. On the contrary, the small droop coefficients reflect a better dc-voltage regulation at the expense of the system stability. A coupling between the dynamic performance and the steady-state operation is therefore yielded (a trade-off). In this paper, a second degree-of-freedom is proposed and implemented in the control structure of the VSCs in order to separate the coupling between the dynamic and the steady-state performance.
The contributions of this paper are as following:
-
The development of the detailed and accurate small-signal modeling of the MTDC system in Figure 1.
-
Conducting the stability and sensitivity analysis to investigate the influence of the parameters variations on the system stability.
-
Implementing the proposed dynamic droop loops to enhance the system stability without affecting the steady-state performance.
-
Conducting time-domain simulations using Matlab/Simulink for the entire MTDC system.

2. Large-Signal Model of the MTDC System

The MTDC system under study is shown in Figure 1. The following subsections detail the large-signal modeling of the MTDC entities.

2.1. Rectification Stations 1-2

As shown in Figure 1, the power circuit of the ac side of VSC1 is modelled in the rotating d - q reference frame as shown in (1), whereas the model of the dc-link capacitor is shown in (2).
V 1 V t 1 = R 1 I 1 + L 1 d d t I 1 + j ω 1 L 1 I 1
C d c 1 d d t V d c 1 = 3 2 ( m d 1 I d 1 + m q 1 I q 1 ) I d c 1 V d c 1 R d c 1
As shown in Figure 2a, the VSRs are equipped with an outer dc power sharing controller, an intermediate proportional-and-integral (PI) voltage controller ( G v 1 ( s ) ) and an inner PI current control loop ( G i 1 ( s ) ) [18]. The outer static droop loop processes the measured dc power ( P d c 1 = V d c 1 I d c 1 ) via a low-pass filter (LPF) and through the static droop coefficient ( K s 1 ). In Equations (1) and (2) and Figure 2a, the subscript “1” is replaced by “2” to represent the power circuit model and control loops of VSC2. The converter with the higher droop coefficient injects a less amount of dc power according to the equality K s 1 P d c 1 = K s 2 P d c 2 [18].

2.2. Inversion Stations 3-4

The power circuit model of the inversion station is modeled in Equations (3) and (4).
V t 3 V 3 = R 3 I 3 + L 3 d d t I 3 + j ω 3 L 3 I 3
C d c 3 d d t V d c 3 = I d c 3 3 2 ( m d 3 I d 3 + m q 3 I q 3 )
The control structure of the inversion stations is shown in Figure 2b. PI inner current controllers ( G i 3 ( s ) ) are implemented in the rotating d - q reference frame. The reference value of the q -component of the controlled ac current is set to zero whereas the d -component is defined by I d 3 * = P 3 * / 1.5 V d 3 ° , assuming stiff ac grid conditions. In Equations (3) and (4) and Figure 2b, the subscript “3” is replaced by “4” to represent the power circuit model and control loops of VSC4.

2.3. DC/DC Conversion Stations 5-6

The power circuit model of the buck converter 5 is modeled in Equations (5) and (6).
V 5 V o 5 = R 5 I 5 + L 5 d I 5 d t
1 2 C d c 5 d V d c 5 2 d t = V d c I d c V 5 I 5
1 2 C 5 d V o 5 2 d t = V 5 I 5 V o 5 I o 5
Referring to Figure 2c, the control structure of the dc/dc conversion stations is similar to the rectification units; i.e. an outer power sharing loop, an intermediate PI dc voltage controller ( G v 5 ( s ) ), and an inner PI dc current controller ( G i 5 ( s ) ) [18]. In Equations (5)–(7) and Figure 2c, the subscript “5” is replaced by “6” to represent the power circuit model and control loops of the buck converter 6.

2.4. MTDC Network

As shown in Figure 1, the infrastructure of the dc pool is represented by dc cables and is modeled in (8).
V d c n V d c m = R l n I l n + L l n d I l n d t , m = { n + 1 , n = 1 5 1 , n = 6

3. The Proposed Supplementary Dynamic Droop Loop

The proposed supplementary dynamic droop loop is shown in Figure 2a. The dc-link voltage ( V d c 1 ) is applied to a gain ( K d 1 ) and a high-pass filter (HPF) with a cut-off frequency of ω d 1 to generate a compensation signal. It is shown in the following sections that the proposed supplementary droop loop contributes to the stabilization of the MTDC network. Note that the output compensation signal of the proposed loop is zero in the steady-state conditions and so no influence on the steady-state operation is yielded. In other words, the steady-state operation is solely dictated by the static droop gain ( K s 1 ) whereas the dynamic performance is independently enhanced by the supplementary dynamic droop loop. The proposed dynamic droop loops are implemented in VSC1 and VSC2.

4. Small-Signal Modeling and Stability Analysis of the MTDC System

In order to address the interaction dynamics issues among the MTDC entities and investigate the overall system stability, a linearized state-space model of the entire MTDC system is developed. The modeling procedures are detailed in Appendix A.
Throughout this paper, a non-linear time-domain simulation model for the entire MTDC system in Figure 1 is built under the Matlab/Simulink® environment (MathWorks, Natick, MA, USA) to verify the results. The power electronic converters are considered in the simulation model with the circuit structure and the control topology as shown in Figure 2. The complete model entities are built using SimPowerSystem® toolbox (MathWorks, Natick, MA, USA). The VSCs are simulated using average-model whereas the dc/dc converters are simulated using the switching-model. The simulation type is discrete with a sample time of 20 µs. The control and physical parameters of the MTDC system are given in Appendix B.
As a base case scenario, the two dc/dc converters supply a 0.3 p.u. dc resistive load whereas the power commands for both VSC3 and VSC4 is 1.4 and 0.5 p.u., respectively. The total supplied power from VSC1 and VSC2 is 0.8 and 1.4 p.u., respectively. The complete eigenvalues are shown in Table 1. The system is stable with left-hand sided eigenvalues on the s -plane. It is shown from Table 1, and based on the participation factor analysis, that the states of the ac-dc filters (i.e. inductors or capacitors) in the VSCs and the dc/dc converters are associated with the highest damped modes. The current controllers of all converters reflect relatively high damped modes ( λ 32 λ 34 , λ 40 λ 44 ). Therefore, these modes are not detrimental to the system stability.
The most critical modes, i.e., λ 20 λ 21 , are influenced by the dc voltage control loop of the VSRs. The power sharing controllers of the VSRs and dc/dc converters influence the relatively medium damped modes, i.e., λ 22 , λ 23 , and λ 27 . Moreover, the MTDC cable parameters are correlated to the relatively high damped modes ( λ 2 λ 11 , and λ 19 ). The following subsections emphasize on the influence of these parameters on the system dynamics.

4.1. Influence of the MTDC Cables

Table 2 shows the influence of reduced cables resistance ( Ω / k m ) under a fixed inductance and a fixed cable length. It is clear that the reduced resistive negatively affects the system damping. The analytical results in Table 2 are verified using the time-domain simulations. As shown in Figure 3, the resistive component of the MTDC cables is reduced from 0.04 to 0.005 Ω / k m at t = 8 s. The response has two oscillatory components: A fast response (magnified) corresponding to the modes associated with the MTDC cable and a much slower response associated with the static droop loop as will be shown hereunder. The magnified response in Figure 3 shows that a 0.08 s is needed to complete 8 cycles, and hence the frequency of oscillation is 100 Hz. Further, the envelope of the time-domain oscillating signal should decay to 0.37 p.u. of the initial amplitude in 0.06 s, whereas the damping ratio is 0.04. At the bottom of Table 2, the corresponding analytical results are 100 Hz, 0.06 s, and a damping ratio of 0.03. The analytical and time-domain results show a reasonable agreement, which validates the developed small-signal model of the MTDC system.
The influence of the increased inductive components of the MTDC cables is investigated in Table 3, which has a negative effect on the system damping. The analytical results in Table 3 are verified in the Simulink model by doubling the cable inductance at t = 8 s as shown in Figure 4.

4.2. Influence of the Outer Power Sharing Loop and DC Voltage Controller of the VSRs

As shown in Table 1, the pairs ( λ 20 ,   λ 21 ) are the lowest damped modes with a frequency of oscillations of 7.5 Hz, a slow damping time of 0.59 s, and a damping ratio of 0.04. This pair is associated with the dc voltage control loop of both rectification stations. Referring to Figure 2a, the dc voltage controller of the VSRs processes the error signal V d c 1 r e f V d c , which is inherently in terms of K s 1 and ω f 1 . Therefore, the dc voltage controller parameters and the static droop loop are responsible for defining the slowest dynamics of the MTDC system.
The influence of the dc-voltage controller of the VSRs is shown in Table 4. As shown, the increased proportional or integral gains positively affect the system stability. The damping ratio increases to 0.173 and 0.05 with 10 p.u. proportional and 4 p.u. integral gains, respectively. To verify these analytical results, the Simulink model is run under 10 p.u. proportional and 4 p.u. integral gains, and a step increase is applied in V d c 1 * and V d c 2 * from 1 to 1.05 p.u. at t = 4s. The system response is shown in Figure 5 and the comparison between the time-domain simulations and the analytical results are depicted at the bottom of Table 4. The increased gains of the dc voltage controllers enhance the system damping, but with limited capabilities (Figure 5). Moreover, the controller gains might not be flexible enough to achieve the desired damping as they are designed according to the size of the dc-link capacitance. The controller design is also restricted to the bandwidth requirements to achieve a sufficient time-scale separation with respect to the outer power sharing and the inner current controllers.
Table 5 details the positive effect of the increase of the static droop gains of both rectifiers on the most critical modes. The time-domain simulation results are shown in Figure 6 to validate the analytical results, where a step change in both the static droop coefficients of VSRs is applied from 1 to 5 p.u. at t = 6 s and from 5 to 1 p.u. at t = 8 s. At the bottom of Table 5, the analytical and modal analysis results reflect similar dynamics which confirms the accuracy of the developed models. Figure 6 shows that the more damped performance due to the higher droop gain is associated with a less regulated dc-link voltage, i.e., the value of the steady-state dc-link voltage decreases.

5. Influence of the Proposed Dynamic Droop Control Loop on the MTDC Stability

As the critical modes ( λ 20 ,   λ 21 ) are associated with the static droop gains of the power sharing loop of both rectifiers, the compensation signal is fed into this loop in order to dynamically enhance the stability margin.
The small-signal state-space model is modified to include the dynamics of the proposed supplementary dynamic droop loop. The influence of the proposed supplementary loop is shown in Figure 7. The supplementary droop gains for both VSRs ( K d 1 and K d 2 ) are activated and increases from 0 to 10 with a cut-off frequency of the HPF of 300 rad/s. As shown in Figure 7a, the most critical modes ( λ 20 ,   λ 21 ) are relocated to more damped positions on the s -plane. The damping ratio for these critical modes increases from 0.036 to 0.89 which implies the significant damping capabilities. Figure 7b shows the influence of the cut-off frequency of the HPF on the system damping. The operating frequency between 150 and 225 rad/s yields a better damping.

6. Evaluation Results

A non-linear time-domain simulation model for the entire MTDC system in Figure 1 is built under the Matlab/Simulink® environment. The complete model entities are built using SimPowerSystem® toolbox. The VSCs are simulated using average-model whereas the dc/dc converters are simulated using the switching-model. The simulation type is discrete with a sample time of 20µs. The control and physical parameters of the MTDC system are given in Appendix B.
Table 6 depicts the loading sequence applied in the Simulink model to verify the effectiveness of the proposed supplementary droop compensator. Figure 8 shows the uncompensated system response at the terminals of VSCs 2,3 and dc/dc converter 5. The uncompensated system response suffers considerable oscillations associated with the lightly-damped modes of the static droop loop ( λ 20 ,   λ 21 ). The enhanced droop loop is activated and the system response is shown in Figure 9. It is noted that the steady-state values of the injected powers and dc-link voltages are not changed. The proposed compensator decouples the predefined steady-state performance of MTDC entities and the damping of the system oscillations. It is also clear that the compensated system can operate under small static droop gains in order to maintain the highly regulated dc-link voltages throughout the dc pool and keeping the highly damped performance in the meanwhile.
For further investigation, a five-cycle three-phase fault is applied at the ac-side of both VSC 1 and 3 at t = 4 and 6 s, respectively. Figure 10a shows the dc power and terminal dc voltage of the VSC 1. The uncompensated response is still dominated by the slow-lightly-damped dynamics associated with the static droop loop. On the same figure, the actively compensated system shows a well-damped response. Figure 10b shows a similar response for VSC3. It is shown in Figure 10c that the healthy MTDC entities are affected by the faulty conditions. However, the proposed dynamic droop loop conveys the highly damped response throughout the dc pool.
For further investigations, the average-based models of the VSCs in the preceding Matlab/Simulink time-domain simulations have been replaced by the switching-based Insulated-Gate-Bipolar-Junction-Transistor (IGBT) bridge and the 2-level PWM generator. The switching frequency is 1620 Hz. The compensated response in Figure 10a is reproduced under the switching-based VSCs, and the corresponding results are shown in Figure 11. Clearly, the results are very close which implies that the average-based time-domain simulation model is accurate.

7. Conclusions

This paper has presented the small-signal modeling and analysis of a six-terminal dc grid. The modeling approach depends on the development of the small-signal state-space sub-models of each entity in the MTDC network. A modal analysis is conducted to investigate the system stability under different operating conditions. It is found that the most critical eigenvalues are highly influenced by the static droop loop of both rectification stations. The damping of these modes can be improved by increasing the static droop gains. However, the variation of static droop gains should be subjected to the steady-state operational performance. Therefore, a second degree-of-freedom is added to the control structure of both VSRs by proposing a supplementary droop loop in order to enhance the system dynamics while preserving the steady-state performance (decoupling). The modal analysis shows the effectiveness of the proposed supplementary loop on the system damping. Throughout the analytical study, time domain simulation results are presented and compared to the modal analysis results: Both results show a close agreement which implies an accurate small-signal modeling. The proposed compensator is simple, designed using linear analysis tools and can be easily implemented on practical systems.

Funding

This research received no external funding.

Conflicts of Interest

The authors declare no conflict of interest.

Nomenclature

Superscript “*”The reference value of the variable.
Superscript “o”The steady-state operating point of the variable.
ΔThe small-signal perturbed value of the variable
s The differential operator.
j The imaginary number.
R l ( 1 6 ) ,   L l ( 1 6 ) The resistance and inductance of the MTDC dc cables.
R ( 1 6 ) ,   L ( 1 6 ) ,   C ( 5 6 ) The resistance, inductance and capacitance of the power converters filters.
R d c ( 5 6 ) ,   L d c ( 5 6 ) The resistance and inductance of the dc cables at the load side of dc/dc converters.
C d c ( 1 6 ) ,   V d c ( 1 6 ) The dc-link capacitor and dc voltage.
I l ( 1 6 ) The dc current flowing in the MTDC dc network.
P d c ( 1 6 ) ,   I d c ( 1 6 ) The dc power and current at each conversion station.
v t ( 1 4 ) , v ( 1 4 ) , i ( 1 4 ) The terminal, input ac voltages, and ac current of the VSC.
V ( 5 6 ) ,   V o ( 5 6 ) The terminal and output voltage of the dc/dc converters.
I ( 5 6 ) ,   I o ( 5 6 ) The filter and output current of the dc/dc converters.
V l o a d The common dc voltage at the load-side of the dc/dc converter.
K p i ( 1 6 ) ,   K i i ( 1 6 ) The proportional and integral gains of the proportional and integral (PI) current controller G i ( 1 6 ) ( s ) .
K p v ( 1 2 ,   5 6 ) ,   K i v ( 1 2 ,   5 6 ) The proportional and integral gains of the PI dc voltage controller G v ( 1 2 ,   5 6 ) ( s )
K s ( 1 2 ) ,   K d ( 1 2 ) The static and proposed supplementary droop coefficients of the VSCs.
K ( 5 6 ) The conventional droop gain of the dc/dc converters.
ω ( 1 4 ) The angular frequency of the ac side of the VSC.
ω f ( 1 2 ,   5 6 ) , ω d ( 1 2 ) The operating frequency of the controller filters.
X ( 1 4 ) = X d ( 1 4 ) + j X q ( 1 4 ) The direct- ( d -) and quadrature ( q -) components of the ac quantity x ( 1 4 ) .
m ( 1 4 ) ,   d ( 5 6 ) The duty ratio of the VSCs and dc/dc converters.

Appendix A—Development of the State-Space Model of the MTDC Network

State-Space Model of the VSR

Δ X c 1 · = A c 1 Δ X c 1 + B 1 c 1 Δ I d c 1 + B 2 c 1 [ Δ V d 1 Δ V q 1 ]
where
  • Δ X c 1 = [ Δ I d 1 Δ I q 1 Δ V d c 1 Δ x i d 1 Δ x i q 1 Δ x v 1 Δ x s 1 Δ x d 1 ] T ,
  • A c 1 = [ A p c 1 + [ B p 1 c 1 . D i n 2 c 1 ( B p 1 c 1 . D i n 1 c 1 . D o u t c 1 ) + ( B p 1 c 1 . D i n 4 c 1 ) ] B p 1 c 1 . C i n c 1 B p 1 c 1 . D i n 1 c 1 . D o u t c 1 [ B i n 2 c 1 B i n 1 c 1 . D o u t c 1 ] 0 2 × 2 B i n 1 c 1 . C o u t c 1 [ 0 3 × 2 B o u t 1 c 1 ] 0 3 × 2 A o u t c 1 ] 8 × 8 ,
  • B 1 c 1 = [ B p 3 c 1 0 2 × 1 B o u t 2 c 1 ] 8 × 1 , B 2 c 1 = [ B p 2 c 1 + ( B p 1 c 1 . D i n 3 c 1 ) 0 2 × 2 0 3 × 2 ] 8 × 2 .
such that the matrices with subscript “ out ”, “ in ”, and “ p ” model the power-sharing and the dc voltage control loop, the current control loop, and the power circuit, respectively, and are given as following.
A o u t c 1 = [ 0 K i v 1 K i v 1 K d 1 ω d 1 0 ω f 1 0 0 0 ω d 1 ] ,   B o u t 1 c 1 = [ K i v 1 ( 1 + K d 1 ) K s 1 ω f 1 I d c 1 ° 1 ] ,   B o u t 2 c 1 = [ 0 K s 1 ω f 1 V d c 1 ° 0 ] , C o u t c 1 = [ 1 K p v 1 K p v 1 K d 1 ω d 1 ] , D o u t 1 c 1 = K p v 1 ( 1 + K d 1 ) . B i n 1 c 1 = [ K i i 1 0 ] ,   B i n 2 c 1 = [ K i i 1 0 0 K i i 1 ] ,   C i n c 1 = [ 1 V d c 1 ° 0 0 1 V d c 1 ° ] ,   D i n 1 c 1 = [ K p i 1 V d c 1 ° 0 ] ,   D i n 2 c 1 = [ K p i 1 V d c 1 ° ω 1 ° L 1 V d c 1 ° ω 1 ° L 1 V d c 1 ° K p i 1 V d c 1 ° ] , D i n 3 c 1 = d i a g { 1 V d c 1 ° } 2 × 2 ,   D i n 4 c 1 = [ m d 1 ° V d c 1 ° m q 1 ° V d c 1 ° ] . A p c 1 = [ R 1 L 1 ω 1 ° m d 1 ° L 1 ω 1 ° R 1 L 1 m q 1 ° L 1 1.5 m d 1 ° C d c 1 1.5 m q 1 ° C d c 1 1 R d c 1 C d c 1 ] ,   B p 1 c 1 = [ V d c 1 ° L 1 0 0 V d c 1 ° L 1 1.5 I d 1 ° C d c 1 0 ] ,   B p 2 c 1 = [ 1 L 1 0 0 1 L 1 0 0 ] ,   B p 3 c 1 = [ 0 0 1 C d c 1 ] .

State-Space Model of the VSI

Δ X c 3 · = A c 3 Δ X c 3 + B 1 c 3 Δ I d c 3 + B 2 c 3 [ Δ V d 3 Δ V q 3 ]
where Δ X c 3 = [ Δ I d 3 Δ I q 3 Δ V d c 3 Δ x i d 3 Δ x i q 3 ] T ,
A c 3 = [ A p c 3 + [ B p 1 c 3 . D i n 1 c 3 B p 1 c 3 . D i n 3 c 3 ] B p 1 c 3 . C i n c 3 [ B i n 1 c 3 0 2 × 1 ] 0 2 × 2 ] 5 × 5 , B 1 c 3 = [ B p 3 c 3 0 2 × 1 ] 5 × 1 , B 2 c 3 = [ B p 2 c 3 + ( B p 1 c 3 . D i n 2 c 3 ) B i n 2 c 3 ] 5 × 2 .
such that the matrices with subscript “ in ” and “ p ” model the current control loop and the power circuit, respectively, and are given as following.
B i n 1 c 3 = [ K i i 3 0 0 K i i 3 ] ,   B i n 1 c 3 = [ K i i 3 0 0 K i i 3 ] ,   C i n c 3 = [ 1 V d c 3 ° 0 0 1 V d c 3 ° ] ,   D i n 1 c 3 = [ K p i 3 V d c 3 ° ω 3 ° L 3 V d c 3 ° ω 3 ° L 3 V d c 3 ° K p i 3 V d c 3 ° ] , D i n 2 c 3 = [ P 3 * K p i 3 1.5 V d 3 ° 2 V d c 3 ° + 1 V d c 3 ° 0 0 1 V d c 3 ° ] ,   D i n 3 c 3 = [ m d 3 ° V d c 3 ° m q 3 ° V d c 3 ° ] ,   A p c 3 = [ R 3 L 3 ω 3 ° m d 3 ° L 3 ω 3 ° R 3 L 3 m q 3 ° L 3 1.5 m d 3 ° C d c 3 1.5 m q 3 ° C d c 3 0 ] , B p 1 c 3 = [ V d c 3 ° L 3 0 0 V d c 3 ° L 3 1.5 I d 3 ° C d c 3 0 ] ,   B p 2 c 3 = [ 1 L 3 0 0 1 L 3 0 0 ] ,   B p 3 c 3 = [ 0 0 1 C d c 3 ] ,

State-Space Model of the Buck DC/DC Converter

Δ X c 5 · = A c 5 Δ X c 5 + B 1 c 5 Δ I d c 5 + B 2 c 5 Δ I o 5
where Δ X c 5 = [ Δ V d c 5 Δ V o 5 Δ I 5 Δ x i 5 Δ x s 5 Δ x v 5 ] T .
A c 5 = [ A p c 5 + [ B p 3 c 5 . D i n 3 c 5 B p 3 c 5 . D i n 2 c 5 . D o u t c 5 B p 3 c 5 . D i n 1 c 5 ] B p 3 c 5 . C i n c 5 B p 3 c 5 . C i n 2 c 5 . C o u t c 5 [ 0 B i n 2 c 5 . D o u t c 5 B i n 1 c 5 ] 0 B i n 2 c 5 . D o u t c 5 [ 0 2 × 1 B o u t 1 c 5 0 2 × 1 ] 0 2 × 1 A o u t c 5 ] 6 × 6 , B 1 c 5 = [ B p 1 c 5 0 0 2 × 1 ] 6 × 1 , B 2 c 5 = [ B p 2 c 5 0 B o u t 2 c 5 ] 6 × 1
such that the matrices with subscript “ out ”, “ in ”, and “ p ” model the dc voltage control loop, the current control loop, and the power circuit, respectively, and are given as following.
A o u t c 5 = [ ω f 5 0 K i v 5 0 ] ,   B o u t 1 c 5 = [ K 5 ω f 5 I o 5 ° K i v 5 ] ,   B o u t 2 c 5 = [ K 5 ω f 5 V o 5 ° 0 ] ,   C o u t c 5 = [ K p v 5 1 ] , D o u t c 5 = K p v 5 ,   B i n 1 c 5 = K i i 5 ,   B i n 2 c 5 = K i i 5 ,   C i n c 5 = 1 V d c 5 ° ,   D i n 1 c 5 = K p i 5 V d c 5 ° ,   D i n 2 c 5 = K p i 5 V d c 5 ° , A p c 5 = [ I d c 5 ° I 5 ° d 5 ° C d c 5 V d c 5 ° 0 V 5 ° C d c 5 V d c 5 ° I 5 ° d 5 ° C o 5 V o 5 ° I o 5 ° C o 5 V o 5 ° V 5 ° C o 5 V o 5 ° d 5 ° L 5 1 L 5 R 5 L 5 ] ,   B p 1 c 5 = [ 1 C d c 5 0 0 ] ,   B p 2 c 5 = [ 0 1 C o 5 0 ] ,   B p 3 c 5 = [ I 5 ° C d c 5 I 5 ° V d c 5 ° C o 5 V o 5 ° V d c 5 ° L 5 ]

State-Space Model of the DC Networks

X n e t · = A n e t X n e t + B n e t U n e t Y n e t = C n e t X n e t
where X n e t = [ I l 1 I l 2 I l 3 I l 4 I l 5 I l 6 ] T is the six states vector; U n e t = [ V d c 1 V d c 2 V d c 3 V d c 4 V d c 5 V d c 6 ] T is the input vector; Y n e t = [ I d c 1 I d c 2 I d c 3 I d c 4 I d c 5 I d c 6 ] T is the output vector; A n e t , B n e t and C n e t are defined as following:
A n e t = [ R l 1 L l 1 0 0 0 0 0 0 R l 2 L l 2 0 0 0 0 0 0 R l 3 L l 3 0 0 0 0 0 0 R l 4 L l 4 0 0 0 0 0 0 R l 5 L l 5 0 0 0 0 0 0 R l 6 L l 6 ] , B n e t = [ 1 L l 1 1 L l 1 0 0 0 0 0 1 L l 2 1 L l 2 0 0 0 0 0 1 L l 3 1 L l 3 0 0 0 0 0 1 L l 4 1 L l 4 0 0 0 0 0 1 L l 5 1 L l 5 1 L l 6 0 0 0 0 1 L l 6 ] , B n e t = [ 1 L l 1 1 L l 1 0 0 0 0 0 1 L l 2 1 L l 2 0 0 0 0 0 1 L l 3 1 L l 3 0 0 0 0 0 1 L l 4 1 L l 4 0 0 0 0 0 1 L l 5 1 L l 5 1 L l 6 0 0 0 0 1 L l 6 ]

State-Space Model of DC/DC Converter Loads

The common resistive load of the dc/dc converters is interconnected through the load-side dc network. The state-space model of the load-side dc network is as follows
[ I o 5 · I o 6 · ] = A d c [ I o 5 I o 6 ] + B d c [ V o 5 V o 6 ]
where A d c = [ ( R l o a d + R d c 5 ) L d c 5 R l o a d L d c 5 R l o a d L d c 6 ( R l o a d + R d c 6 ) L d c 6 ] , B d c = [ 1 L d c 5 0 0 1 L d c 6 ] .

Entire State-Space Model of the MTDC System

The final state-space model of the MTDC system is as following.
A = [ [ A c 1 0 8 × 32 B 1 c 1 . C n e t ( 1 , : ) ] [ 0 8 × 8 A c 2 0 8 × 24 B 1 c 2 . C n e t ( 2 , : ) ] [ 0 5 × 16 A c 3 0 5 × 19 B 1 c 3 . C n e t ( 3 , : ) ] [ 0 5 × 21 A c 4 0 5 × 14 B 1 c 4 . C n e t ( 4 , : ) ] [ A c 5 B 2 c 5 0 5 × 19 ] [ 0 14 × 26 [ [ A c 5 B 2 c 5 0 6 × 7 ] [ 0 B d c ( 1 , 1 ) 0 1 × 4 A d c ( 1 , 1 ) 0 B d c ( 1 , 2 ) 0 1 × 4 A d c ( 1 , 2 ) ] [ 0 6 × 7 A c 6 B 2 c 6 ] [ 0 B d c ( 2 , 1 ) 0 1 × 4 A d c ( 2 , 1 ) 0 B d c ( 2 , 2 ) 0 1 × 4 A d c ( 2 , 2 ) ] ] [ B 1 c 5 0 8 × 1 0 7 × 1 B 1 c 6 0 ] . [ C n e t ( 5 , : ) C n e t ( 6 , : ) ] ] [ 0 6 × 2 B n e t ( : , 1 ) 0 6 × 7 B n e t ( : , 2 ) 0 6 × 7 B n e t ( : , 3 ) 0 6 × 4 B n e t ( : , 4 ) 0 6 × 2 B n e t ( : , 5 ) 0 6 × 6 B n e t ( : , 6 ) 0 6 × 6 A n e t ] ] 46 × 46 ,
B = [ B 2 c 1 0 8 × 6 0 8 × 2 B 2 c 2 0 8 × 4 0 5 × 4 B 2 c 3 0 5 × 2 0 5 × 6 B 2 c 4 0 20 × 8 ] 46 × 8 .
where M ( p , q ) , M ( p , : ) , M ( : , q ) represents the element in the row “ p ” and column “ q ”, the row “ p ”, the column “ q ” of a matrix M and 0 x × y is a zero matrix with x rows and y columns.

Appendix B—System Parameters

VSR1 (and VSR2)

R 1 = 0.1 Ω ,   L 1 = 1 m H ,   C d c 1 = 4.7   m F ,   G v 1 ( s ) = 0.01 + 24 s ,   G i 1 ( s ) = 2.5 + 250 s , K s 1 = 2 K s 2 = 4 × 10 6 V / W , ω f 1 = 30   r a d / s ,   K d 1 = 10 ,   ω d 1 = 300   r a d / s .

VSI3 (and VSI4)

R 3 = 0.1 Ω ,   L 3 = 1 m H ,   C d c 3 = 4.7   m F ,   G i 1 ( s ) = 2.5 + 250 s

DC/DC Converter 5 (and 6)

R 5 = 0.1 Ω ,   L 5 = 1 m H ,   C d c 1 = C o 1 = 4.7   m F , G v 5 ( s ) = 2 + 15 s , G i 5 ( s ) = 2.5 + 250 s ,   K s 5 = K s 6 = 0.1 m V / W , ω f 5 = 20   r a d / s .

DC Networks

0.04   Ω / k m ,   0.16 m H / k m .

References

  1. ABB. ABB HiPak™—IGBT Module 5SNA 1200G450300; 5SYA 1401-03 04-2012 datasheet; ABB: Zürich, Switzerland, 2012; pp. 1–9. [Google Scholar]
  2. Aredes, M.; Dias, R.; de Aquino, A.F.d.; Portela, C.; Watanabe, E. Going the distance. IEEE Ind. Electron. Mag. 2011, 5, 36–48. [Google Scholar] [CrossRef]
  3. Flourentzou, N.; Agelidis, V.G.; Demetriades, G.D. VSC-based HVDC power transmission systems—An overview. IEEE Trans. Power Electron. 2009, 24, 592–602. [Google Scholar] [CrossRef]
  4. Pinto, R.T.; Bauer, P.; Rodrigues, S.F.; Wiggelinkhuizen, E.J.; Pierik, J.; Ferreira, B. A novel distributed direct-voltage control strategy for grid integration of offshore wind energy systems through MTDC network. IEEE Trans. Ind. Electron. 2013, 60, 2429–2441. [Google Scholar] [CrossRef]
  5. Reeve, J. Multiterminal HVDC power systems. IEEE Trans. Power Appar. Syst. 1980, PAS-99, 729–737. [Google Scholar] [CrossRef]
  6. Rouzbehi, K.; Miranian, A.; Candela, J.I.; Luna, A.; Rodriguez, P. A Generalized Voltage Droop Strategy for Control of Multiterminal DC Grids. IEEE Trans. Ind. Appl. 2015, 51, 607–618. [Google Scholar] [CrossRef] [Green Version]
  7. Wang, Z.; Li, K.; Ren, J.; Sun, L.; Zhao, J.; Liang, Y.; Lee, W.; Ding, Z.; Sun, Y. A Coordination Control Strategy of Voltage-Source-Converter-Based MTDC for Offshore Wind Farms. IEEE Trans. Ind. Appl. 2015, 51, 2743–2752. [Google Scholar] [CrossRef]
  8. Mazumder, S.K.; Tahir, M.; Achrarya, K. Master-slave current-sharing control of a parallel dc-dc converter system over an RF communication interface. IEEE Trans. Ind. Electron. 2008, 55, 59–66. [Google Scholar] [CrossRef]
  9. Anand, S.; Fernandes, B.G.; Guerrero, J.M. Distributed control to ensure proportional load sharing and improve voltage regulation in low voltage dc microgrids. IEEE Trans. Power Electron. 2013, 28, 1900–1913. [Google Scholar] [CrossRef]
  10. Araujo, E.P.; Bianchi, F.D.; Ferre, A.J.; Bellmunt, O.G. Methodology for droop control dynamic analysis of multiterminal VSC-HVDC grids for offshore wind farms. IEEE Trans. Power Deliv. 2011, 26, 2476–2485. [Google Scholar] [CrossRef]
  11. -Alvarez, A.E.; Bianchi, F.; Ferré, A.J.; Gross, G.; Bellmunt, O.G. Voltage control of multiterminal VSC-HVDC transmission systems for offshore wind power plants—Design and implementation in a scaled platform. IEEE Trans. Ind. Electron. 2013, 60, 2381–2391. [Google Scholar] [CrossRef]
  12. Haileselassie, T.M.; Uhlen, K. Impact of dc line voltage drops on power flow of MTDC using droop control. IEEE Trans. Power Syst. 2012, 27, 1441–1449. [Google Scholar] [CrossRef]
  13. Chaudhuri, N.R.; Majumder, R.; Chaudhuri, B. System frequency support through multi-terminal dc (MTDC) grids. IEEE Trans. Power Syst. 2013, 28, 347–356. [Google Scholar] [CrossRef]
  14. Haileselassie, T.M.; Uhlen, K. Primary frequency control of remote grids connected by multi-terminal HVDC. In Proceedings of the IEEE Power and Energy Society General Meeting, Minneapolis, MN, USA, 25–29 July 2010; pp. 1–6. [Google Scholar]
  15. Ghaudhuri, N.R.; Chaudhuri, B. Adaptive droop control for effective power sharing in multi-terminal dc (MTDC) grids. IEEE Trans. Power Syst. 2013, 28, 21–29. [Google Scholar] [CrossRef]
  16. Chaudhuri, N.R.; Majumder, R.; Chaudhuri, B.; Pan, J. Stability analysis of VSC MTDC grids connected to multimachine ac systems. IEEE Trans. Power Deliv. 2011, 26, 2774–2784. [Google Scholar] [CrossRef]
  17. Liu, W.; Ooi, B.-T. Premium quality power park based on multi-terminal HVDC. IEEE Trans. Power Deliv. 2005, 20, 978–983. [Google Scholar] [CrossRef]
  18. Guerrero, J.M.; Vasquez, J.C.; Matas, J.; de Vicuña, L.G.; Castilla, M. Hierarchical control of droop-controlled ac and dc microgrids—A general approach toward standardization. IEEE Trans. Ind. Electron. 2011, 58, 158–172. [Google Scholar] [CrossRef]
Figure 1. The MTDC system under study.
Figure 1. The MTDC system under study.
Electronics 08 00130 g001
Figure 2. The control structure of the MTDC entities. (a) VSRs (VSC1-2); (b) VSIs (VSC3-4); (c) DC/DC converters (5-6).
Figure 2. The control structure of the MTDC entities. (a) VSRs (VSC1-2); (b) VSIs (VSC3-4); (c) DC/DC converters (5-6).
Electronics 08 00130 g002
Figure 3. Time domain simulation of the dc power flowing through line 4 following a step response from 0.04 to 0.005 Ω / k m at t = 8 s.
Figure 3. Time domain simulation of the dc power flowing through line 4 following a step response from 0.04 to 0.005 Ω / k m at t = 8 s.
Electronics 08 00130 g003
Figure 4. Time domain simulation of the dc power flowing through line 4 following the doubling of the MTDC lines inductance at t = 8 s.
Figure 4. Time domain simulation of the dc power flowing through line 4 following the doubling of the MTDC lines inductance at t = 8 s.
Electronics 08 00130 g004
Figure 5. The dc-link voltage response of the VSC2 following a step variation in V d c 1 * and V d c 2 * from 1 to 1.05 p.u. at t = 4s. (a) K p v 1 , 2 = K i v 1 , 2 = 1 p.u. (b) K p v 1 = K p v 2 = 10 p.u. (c) K i v 1 = K i v 2 = 4 p.u.
Figure 5. The dc-link voltage response of the VSC2 following a step variation in V d c 1 * and V d c 2 * from 1 to 1.05 p.u. at t = 4s. (a) K p v 1 , 2 = K i v 1 , 2 = 1 p.u. (b) K p v 1 = K p v 2 = 10 p.u. (c) K i v 1 = K i v 2 = 4 p.u.
Electronics 08 00130 g005
Figure 6. System response to a step change in the static droop gains for both VSRs from 1 to 5 and 5 to 1 p.u. at t = 6 and 8 s, respectively. (a) Injected dc power from VSC1; (b) Injected dc power from VSC2; (c) DC-link voltages at VSCs 1 and 2.
Figure 6. System response to a step change in the static droop gains for both VSRs from 1 to 5 and 5 to 1 p.u. at t = 6 and 8 s, respectively. (a) Injected dc power from VSC1; (b) Injected dc power from VSC2; (c) DC-link voltages at VSCs 1 and 2.
Electronics 08 00130 g006
Figure 7. The effect of the proposed supplementary droop loop on the MTDC system stability—the proposed droop loop gain in both VSRs increases from zero to 10 (direction of arrow). (a) Cut-off frequency of the HPF = 300 rad/s; (b) Different cut-off frequencies of the HPF.
Figure 7. The effect of the proposed supplementary droop loop on the MTDC system stability—the proposed droop loop gain in both VSRs increases from zero to 10 (direction of arrow). (a) Cut-off frequency of the HPF = 300 rad/s; (b) Different cut-off frequencies of the HPF.
Electronics 08 00130 g007
Figure 8. The uncompensated system response at different load-side disturbances according to Table 6; (a) VSC 2; (b) VSC 3; (c) DC/DC converter 5.
Figure 8. The uncompensated system response at different load-side disturbances according to Table 6; (a) VSC 2; (b) VSC 3; (c) DC/DC converter 5.
Electronics 08 00130 g008
Figure 9. The influence of the proposed dynamic droop loop with the same load-side disturbances according to Table 6 K d 1 = 20 ,   K d 2 = 10 , ω d 1 = ω d 2 = 300   r / s ; (a) VSC 2; (b) VSC 3; (c) DC/DC converter 5.
Figure 9. The influence of the proposed dynamic droop loop with the same load-side disturbances according to Table 6 K d 1 = 20 ,   K d 2 = 10 , ω d 1 = ω d 2 = 300   r / s ; (a) VSC 2; (b) VSC 3; (c) DC/DC converter 5.
Electronics 08 00130 g009
Figure 10. The compensated and uncompensated system response toward a five-cycle three-phase fault at ac-side of VSCs 1 and 3 at t = 4 and 6 s, respectively. (a) VSC 1; (b) VSC 3; (c) DC/DC converter 5.
Figure 10. The compensated and uncompensated system response toward a five-cycle three-phase fault at ac-side of VSCs 1 and 3 at t = 4 and 6 s, respectively. (a) VSC 1; (b) VSC 3; (c) DC/DC converter 5.
Electronics 08 00130 g010
Figure 11. The compensated system response for Vdc1 under the switching-based models of all VSCs in Figure 1.
Figure 11. The compensated system response for Vdc1 under the switching-based models of all VSCs in Figure 1.
Electronics 08 00130 g011
Table 1. Eigenvalues and Participation Factor Analysis of the MTDC System.
Table 1. Eigenvalues and Participation Factor Analysis of the MTDC System.
EigenvalueInfluencing State(s)Contribution (p.u.)
λ 1 −562750 Δ I o 6   , Δ I o 5 0.5, 0.5
λ 2 ,   λ 3 −124.6 ± j2353 Δ I l 5 ,   Δ V d c 6 ,   Δ V d c 5 0.48, 0.25, 0.25
λ 4 ,   λ 5 −126.5 ± j1138 Δ I l 2 ,   Δ V d c 2 ,   Δ V d c 3 0.29, 0.25, 0.18
λ 6 ,   λ 7 −123.7 ± j879 Δ V d c 1 ,   Δ I l 3 ,   Δ V d c 4 0.17, 0.16, 0.15
λ 8 ,   λ 9 −124.1 ± j620 Δ V d c 4 ,   Δ V d c 1 ,   Δ I l 4 0.24, 0.19, 0.14
λ 10 ,   λ 11 −124.1 ± j486 Δ I l 6 , Δ V d c 5 ,   Δ V d c 6 0.18, 0.14, 0.13
λ 12 ,   λ 13 −339.7± j1261.2 Δ V o 5 ,   , Δ V o 6 ,   Δ I o 6 0.24, 0.24, 0.2
λ 14 −2027.6 Δ I 6   , Δ I 5 0.39, 0.39
λ 15 −1797.1 Δ I 5 ,   Δ I 6 0.35, 0.35
λ 16 −2500 Δ I d 2 , Δ I d 1 0.73, 0.22
λ 17 −2500 Δ I d 1 ,   Δ I d 2 0.73, 0.22
λ 18 −732.7 Δ V o 6 ,   Δ V o 5 0.32, 0.32
λ 19 −250 Δ I l 4 ,   Δ I l 6 0.24, 0.24
λ 20 ,   λ 21 −1.7 ± j47.4 Δ x v 1 ,   Δ x v 2
Δ V d c 1 Δ V d c 6
0.25, 0.24
0.08
λ 22 −27.1 Δ x s 1 ,   Δ x s 2 0.64, 0.24
λ 23 −29.5 Δ x s 2 ,   Δ x s 1 0.72, 0.26
λ 24 −4.96 Δ x v 1 ,   Δ x v 2 0.44, 0.44
λ 25 −6.1 Δ x v 6 ,   Δ x v 5 0.46, 0.46
λ 26 −7.7 Δ x v 5 ,   Δ x v 6 0.48, 0.48
λ 27 −20.8 Δ x s 5 ,   Δ x s 6 0.49, 0.49
λ 28 −96.7 Δ x i 5 ,   Δ x i 6 0.41, 0.41
λ 29 −74.3 Δ x s 6 ,   Δ x s 5 0.38, 0.38
λ 30 −78.3 Δ x i 6 ,   Δ x i 5 0.46, 0.45
λ 31 −2500 Δ I q 2 ,   Δ I q 1 0.52, 0.42
λ 32 −100 Δ x i d 2 ,   Δ x i q 4 0.28, 0.25
λ 33 −100 Δ x i q 2 ,   Δ x i d 4 0.22, 0.2
λ 34 −100 Δ x i d 3 ,   Δ x i q 3 0.32, 0.3
λ 35 −2500 Δ I d 4 ,   Δ I q 3 0.85, 0.05
λ 36 −2500 Δ I q 3 ,   Δ I q 1 0.45, 0.29
λ 37 −2500 Δ I q 3 ,   Δ I q 2 0.49, 0.2
λ 38 −2500 Δ I d 3 ,   Δ I d 4 0.75, 0.07
λ 39 −2500 Δ I q 4 ,   Δ I d 3 0.71, 0.16
λ 40 ,   λ 41 −100 Δ x i d 3 ,   Δ x i q 4 0.24, 0.19
λ 42 −100 Δ x i d 4 ,   Δ x i q 2 0.34, 0.27
λ 43 −100 Δ x i d 3 ,   Δ x i q 3 0.34, 0.3
λ 44 −100 Δ x i d 1 ,   Δ x i q 2 0.68, 0.18
Table 2. Influence of the DC Resistance of MTDC Cables.
0.04   Ω / k m 0.02   Ω / k m 0.01   Ω / k m 0.005   Ω / k m
λ 2 ,   λ 3 −124.6 ± j2353−62.1 ± j2355−30.8 ± j2356−15.2 ± j2356
λ 4 ,   λ 5 −126.5 ± j1138−64.1 ± j1143−33 ± j1144−17.4 ± j1144
λ 6 ,   λ 7 −123.7 ± j879−61.4 ± j886−30.3 ± j887.3−14.7 ± j887.7
λ 8 ,   λ 9 −124.1 ± j620−62.1 ± j629.1−31.1 ± j631.4−15.5 ± j632
λ 10 ,   λ 11 −124.1 ± j486−62 ± j498−30.9 ± j501−15.4 ± j502
λ 19 −250−125−62.5−31.25
Modal Analysis vs. Time Domain Simulations
Modal Analysis vs. Time Domain Simulations
Modal AnalysisTime Domain Simulations
λ 8 ,   λ 9 100 Hz—0.06 s—0.03Figure 3100 Hz—0.045 s—0.04
Table 3. Influence of the Inductance of MTDC Cables.
1× length2× length3× length4× length
λ 2 ,   λ 3 −124.6 ± j2353−62.1 ± j1664.7−41.3 ± j1360−31 ± j1177
λ 4 ,   λ 5 −126.5 ± j1138−64 ± j807.8−43.3 ± j661−34 ± j1261
λ 6 ,   λ 7 −123.7 ± j879−61.2 ± j625.7−40.3 ± j513−33 ± j574
λ 8 ,   λ 9 −124.1 ± j620−61.7 ± j444.2−41 ± j365−30 ± j445
λ 10 ,   λ 11 −124.1 ± j486−61.5 ± j350.5−40.6 ± j289−30.6 ± j318
λ 19 −250−125−83.3−62.5
Modal Analysis vs. Time Domain Simulations
Modal Analysis vs. Time Domain Simulations
Modal AnalysisTime Domain Simulations
λ 8 ,   λ 9 70 Hz—0.016 s—0.138Figure 470 Hz—0.017 s—0.133
Table 4. Influence of the Proportional and Integral Gains.
of the DC Voltage Controller of the VSRs on the System Stability ( λ 20 ,   λ 21 )
of the DC Voltage Controller of the VSRs on the System Stability ( λ 20 ,   λ 21 )
K p v 1 ,   K p v 2 1 p.u.5 p.u.10 p.u.
−1.7 ± j47.4−3.56 ± j47.2−5.9 ± j46.9
K i v 1 ,   K i v 2 1 p.u.2 p.u.4 p.u.
−1.7 ± j47.4−2.6 ± j66.8−4.6 ± j93.7
Modal Analysis vs. Time Domain Simulations
Modal Analysis vs. Time Domain Simulations
Modal AnalysisTime Domain Simulations
1 p.u. λ 20 ,   λ 21 7.5 Hz—0.59 s—0.04Figure 5a5.9 Hz—0.55 s—0.05
10 p.u.
( K p v 1 ,   K p v 2 )
λ 20 ,   λ 21 7.4 Hz—0.12 s—0.173Figure 5b6.7 Hz—0.16 s—0.15
4 p.u.
( K i v 1 ,   K i v 2 )
λ 20 ,   λ 21 14.5 Hz—0.22 s—0.05Figure 5c10.5 Hz—0.21 s—0.07
Table 5. Influence of the Static Droop Gains of Both VSRs.
1 p.u.5 p.u.10 p.u.15 p.u.
λ 20 ,   λ 21 −1.7 ± j47.4−2.7 ± j48.9−3.9 ± j51−5.1 ± j53
Modal Analysis vs. Time Domain Simulations
Modal Analysis vs. Time Domain Simulations
Modal AnalysisTime Domain Simulations
1 p.u. λ 20 ,   λ 21 7.5 Hz—0.6 s—0.04Figure 7a
t   =   8   s
5 Hz—0.58 s—0.056
5 p.u. λ 20 ,   λ 21 7.7 Hz—0.4 s—0.06Figure 7a
t   =   6   s
5 Hz—0.42 s—0.075
Table 6. Loading Sequence in the MTDC Network.
Table 6. Loading Sequence in the MTDC Network.
R l o a d VSC 3
time = 4 stime = 6 stime = 8 stime = 10 s
0.1 → 0.2 p.u.0.2 → 0.1 p.u.0.6 → 0.75 p.u.0.75 → 0.6 p.u.

Share and Cite

MDPI and ACS Style

Radwan, A.A.A. Small-Signal Stability Analysis of Multi-Terminal DC Grids. Electronics 2019, 8, 130. https://doi.org/10.3390/electronics8020130

AMA Style

Radwan AAA. Small-Signal Stability Analysis of Multi-Terminal DC Grids. Electronics. 2019; 8(2):130. https://doi.org/10.3390/electronics8020130

Chicago/Turabian Style

Radwan, Amr Ahmed A. 2019. "Small-Signal Stability Analysis of Multi-Terminal DC Grids" Electronics 8, no. 2: 130. https://doi.org/10.3390/electronics8020130

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop