A Compact Bandpass Filter with Widely Tunable Frequency and Simple Bias Control

Abstract

This research paper introduces an innovative design for a compact bandpass filter, notable for achieving a substantial tuning range of operational frequencies using just a single bias voltage. The design is based on a planar microstrip approach, distinguished by its straightforward and efficient structure. Additionally, this filter is characterized by its excellent performance in suppressing out-of-band frequencies. To validate the practicality and effectiveness of this novel design, a compact filter was designed, manufactured, and measured. The testing results were impressive, showing that the filter’s measured center frequency could be tuned across a wide spectrum, from 1.1 to 3.1 GHz, achieving a relative bandwidth of up to 95%. Herein, the relative bandwidth is derived from the calculation of 2(f_high − f_low)/(f_high + f_low). Remarkably, the filter consistently maintains a return loss exceeding 19 dB throughout its tuning range. Additionally, it sustains a 15 dB return loss bandwidth greater than 90 MHz, with the insertion loss varying between a minimum of 0.9 dB and a maximum of 2.1 dB. The compactness of the filter is one of its standout features, with circuit dimensions measuring a mere 0.06λ_g × 0.09λ_g (physical dimensions is 13.8 mm × 21.3 mm), where λ_g represents the wavelength at the filter’s lowest center frequency.

1. Introduction

In the rapidly advancing wireless communication sector, an increasing demand for multifunctional devices capable of supporting diverse applications is evident. Each application requires distinct frequency bands, operational modes, and bandwidths. Smartphones are quintessential examples of this trend, seamlessly integrating a range of technologies like 4G, 5G, Bluetooth, and WiFi. As the demand for multifunctional capabilities escalates, the range of necessary frequency bands and associated standards also increases, reflecting a growing consumer expectation for versatile wireless communication devices. This trend is paralleled by a noticeable shift in the industry towards miniaturization. The drive for smaller, more compact devices is influencing the design and integration of RF (radio frequency) front-end circuits, which are critical to the functionality of these devices. This movement towards miniaturization is not just a response to consumer preferences but also a strategic adaptation within the industry to meet the increasing demands for compact and efficient wireless communication technologies. In response to these evolving dynamics, the design of filters—integral to the efficacy of RF front-end systems—is also transitioning towards miniaturization. This strategic shift, well-documented in recent studies [1,2,3,4], underscores the industry’s adaptation to the multifaceted demands of contemporary wireless communication. This transition not only reflects the technological strides made in the field but also highlights the industry’s commitment to innovating solutions that align with the compact, efficient, and multifunctional requirements of current communication devices.

However, in the realm of wireless communication, traditional devices are predominantly tailored for fixed-function applications. When these devices are adapted to operate across multiple frequency bands and standards, there is an inevitable increase in the quantity and size of passive components within RF front-end systems. To mitigate this challenge, the industry has introduced the concept of tunable systems, which feature adjustable hardware parameters. Tunable designs, such as filters [5,6,7,8,9,10,11,12,13,14,15,16,17,18], couplers [19,20,21], and antennas [22], represent a significant advancement in this field. By incorporating tunability into these components, there is a substantial reduction in the number of passive elements required. This, in turn, results in smaller circuit footprints, which directly contribute to a decrease in the overall complexity of system design. Furthermore, these innovations yield notable reductions in power consumption and cost. The adoption of tunable designs signifies a crucial shift in the approach to wireless communication technology. This shift is not merely a response to the growing demand for multi-functionality but also a proactive measure to enhance the efficiency and effectiveness of RF front-end systems. The reduction in circuit size and complexity, alongside decreased power consumption and cost, underscores the potential of tunable systems to reshape the landscape of wireless communication, paving the way for more practical, cost-effective, and energy-efficient solutions.

In today’s wireless communication landscape, maximizing spectrum efficiency and ensuring flexible frequency adaptation in communication systems are paramount. This scenario underscores the necessity for concentrated research in the field of frequency-tunable filters, a domain of critical significance in modern wireless technologies. The evolution of the design of tunable frequency filters has followed a trajectory that can be summarized in the following manner: Initially, the operational frequencies of these filters were modulated by switching between various bands, employing positive–intrinsic–negative (p-i-n) or microelectromechanical system (MEMS) switches [5,6,7]. In [5], a frequency-tunable filter based on a half-mode substrate-integrated waveguide (HMSIW) operating in the 1.2–1.6 GHz range was demonstrated, requiring six MEMS switches to be opened and closed. This approach expands the filter’s tuning range at the expense of increased filter size and cost. In [7], a method is described where p-i-n diodes are used to switch between quarter-wavelength (λ/4) or half-wavelength (λ/2) resonators in either low- or high-frequency-band modes. This approach is implemented without expanding the tuning capacitance range of the varactors. It enables the realization of dual-band and tri-band filters with a wide center frequency tuning range. However, the operational modes achievable using this method are limited. Furthermore, in the realm of frequency-tunable filters, the utilization of p-i-n or MEMS switches presents certain drawbacks that merit consideration. While these switches enable frequency adjustability, they introduce complexities in terms of system integration and reliability. The inclusion of multiple switches can lead to increased circuit size, which is a significant issue in applications where space is essential. Moreover, the reliance on multiple switches escalates the overall cost of the system, making it less economically viable, especially for large-scale production. There is also the concern of mechanical wear and tear in MEMS switches, potentially impacting the long-term reliability of the filter. The insertion loss and isolation characteristics of these switches can be affected over time, leading to degraded filter performance. Therefore, it is imperative to develop new methodologies as alternatives to overcome these challenges. This approach was further refined by integrating components such as varactor diodes or MEMS capacitors into the filter’s structure [8,9,10,11,12]. Such integration allows for the electronic adjustment of capacitance, thereby altering the resonant frequencies of the filters. However, a limitation of these designs is their relatively narrow frequency tuning range. Moreover, MEMS capacitors, while offering precise tuning, raise concerns about mechanical durability and long-term reliability, as they are prone to degradation from environmental factors and repeated use. Additionally, both components add complexity to circuit design, potentially increasing production costs and complicating mass production scalability. Research efforts have addressed this limitation. In studies [13,14,15,16], the frequency tuning range of filters was expanded by incorporating multimode resonators. Ref. [16] details the design of a fourth-order tunable passband filter, employing varactor-loaded stepped impedance resonators. The design, while innovative, is constrained by a narrow operational frequency tuning range of only 0.8~1.14 GHz and is notable for its considerable insertion loss. Moreover, this advancement, while effective, resulted in an increase in the physical size of the circuit. An alternative approach involves the use of ferrite structures in the design of tunable frequency filters [17,18]. In [18], the presented filter achieves a tuning range spanning from 5 to 19 GHz. Nonetheless, the inherent limitations of its ferrite structure significantly impede its advancement. Additionally, the method grapples with challenges related to cost-effectiveness and the intricate complexities involved in its fabrication and processing.

Given the challenges in the realm of tunable frequency filters, it becomes crucial to advance research in this area, focusing on enhancing filter performance and integration, especially as technology transitions from centimeter-level PCBs to sub-millimeter chip-scale systems. This approach is not only academically stimulating but also holds substantial economic value in practical applications. Advancements in this field are poised to make significant contributions, fostering innovation and tackling the challenges related to miniaturization and enhanced performance. Embarking on this journey, such research promises to have a substantial impact, breaking new ground in technology and creating pathways for real-world applications, thereby increasing its relevance and impact in both academic and industrial realms. Therefore, this research aims to develop filters with an extended frequency tuning range, without succumbing to the compromise of increased circuit size. Furthermore, this study prioritizes the simplification of the control mechanism for tuning adjustments. Achieving these objectives will not only enhance the performance and practicality of frequency-tunable filters but also significantly contribute to the advancement of wireless communication technologies. The goal is to forge a path towards more versatile, compact, and efficient communication systems, aligning with the ever-evolving demands of modern wireless applications.

In conclusion, to address the requirements of miniaturization, a wide tuning range, and a simple yet versatile structure, this paper proposes a novel filter design that successfully fulfills these criteria. This study introduces a novel compact filter boasting an extensive frequency tuning range, achieved through the application of a single bias voltage. A comprehensive and closed-form set of equations underpinning this design is meticulously derived and presented. To empirically substantiate the proposed methodology, the study encompasses the simulation, fabrication, and measurement of a frequency-adjustable compact filter. The primary advantages of this newly developed tunable filter, as compared to existing technologies, are threefold. Firstly, it employs a straightforward control method for frequency adjustment, significantly simplifying the tuning process. Secondly, the filter demonstrates a broad frequency tuning range, marking a substantial improvement over conventional alternatives. Lastly, its design is both planar and compact, offering significant benefits in terms of space efficiency and integration into various applications.

2. Tunable Filter Circuit and Analysis

Figure 1 showcases the schematic of the novel tunable filter proposed in this study, characterized by its port impedance Z₀. This design incorporates two distinct components: tunable resonator units and an adjustable high-pass unit, alongside a set of grounded inductors labeled L₁. The tunable resonator units are ingeniously crafted by arranging inductor L₂ in parallel with a tunable capacitor, C₂. Concurrently, the high-pass unit is constructed utilizing a pair of parallel inductors, L₃, and a tunable capacitor, C₁, connected in series. A critical aspect of this design is the meticulous selection of values for inductors L₁, L₂, and L₃. This precision in selection ensures a harmonization in the capacitance values of C₁ and C₂, a pivotal factor in the filter’s functionality. The outcome of this strategic choice is a significant enhancement in the filter’s operational efficiency. It allows for the central frequency of the filter to be modulated effectively using a single bias voltage. This feature not only simplifies the tuning process but also contributes to the overall compactness and efficiency of the filter design.

2.1. Circuit Analysis

In the proposed filter design, the optimal values for the inductors and capacitors are determined through a systematic approach. This involves ensuring that the design satisfies essential criteria: perfect impedance matching and achieving an insertion loss of 0 dB.

$$S_{11}=S_{22}=0,\left|S_{21}\right|=\left|S_{12}\right|=1$$

(1)

To facilitate the computation of the filter’s scattering parameters, the initial step revolves around deriving its A-matrix, as demonstrated in the subsequent illustration:

$$\begin{array}{l}\left[A\right]=\left[\begin{array}{cc}{A}_1& B_1\\ C_1& D_1\end{array}\right]=\left[\begin{array}{cc}1& j\omega L_1\\ 0& 1\end{array}\right]\left[\begin{array}{cc}1& 0\\ j\omega C_2-j/\omega L_2& 1\end{array}\right]\left[\begin{array}{cc}1& 0\\ -j/\omega L_3& 1\end{array}\right]\\ \left[\begin{array}{cc}1& -j/\omega C_1\\ 0& 1\end{array}\right]\left[\begin{array}{cc}1& 0\\ -j/\omega L_3& 1\end{array}\right]\left[\begin{array}{cc}1& 0\\ j\omega C_2-j/\omega L_2& 1\end{array}\right]\left[\begin{array}{cc}1& j\omega L_1\\ 0& 1\end{array}\right]\end{array}$$

(2)

Herein, the expression for ω = 2πf₀. Following this, utilizing the A-matrix of this filter, the relevant S-matrix is derived and streamlined, as exemplified in Equation (3):

$$\begin{array}{l}\left[S\right]=\left[\begin{array}{cc}{S}_{11}& S_{12}\\ S_{21}& S_{22}\end{array}\right]=\frac{1}{A_1{Z}_0+B_1+C_1{Z}_0{Z}_0+D_1{Z}_0}\\ \left[\begin{array}{cc}{A}_1{Z}_0+B_1-C_1{Z}_0{Z}_0-D_1{Z}_0& 2\left(A_1{D}_1-B_1{C}_1\right)\\ 2& -A_1{Z}_0+B_1-C_1{Z}_0{Z}_0+D_1{Z}_0\end{array}\right]\end{array}$$

(3)

Specifically, within the S-matrix, the precise expression for each element is as follows:

$$\begin{array}{l}{S}_{11}=S_{22}=1+\frac{Z_0\left(L_2+L_3-{\omega }^2{C}_2{L}_2{L}_3\right)}{Z_0\left({\omega }^2{C}_2{L}_2{L}_3-\left(L_2+L_3\right)\right)+j\omega \left({\omega }^2{C}_2{L}_1{L}_2{L}_3-\left(L_2{L}_3+L_1\left(L_2+L_3\right)\right)\right)}\\ +\frac{Z_0\left(L_2+L_3-{\omega }^2{L}_2{L}_3\left(2C_1+C_2\right)\right)}{Z_0\left({\omega }^2{L}_2{L}_3\left(2C_1+C_2\right)-\left(L_2+L_3\right)\right)+j\omega \left({\omega }^2{L}_1{L}_2{L}_3\left(2C_1+C_2\right)-\left(L_2{L}_3+L_1\left(L_2+L_3\right)\right)\right)}\end{array}$$

(4)

$$\begin{array}{l}{S}_{12}=S_{21}=\frac{-j2{\omega }^3{Z}_0{C}_1{\left(L_2{L}_3\right)}^2}{Z_0\left({\omega }^2{C}_2{L}_2{L}_3-\left(L_2+L_3\right)\right)+j\omega \left({\omega }^2{C}_2{L}_1{L}_2{L}_3-\left(L_2{L}_3+L_1\left(L_2+L_3\right)\right)\right)}\\ \times \frac{1}{Z_0\left({\omega }^2{L}_2{L}_3\left(2C_1+C_2\right)-\left(L_2+L_3\right)\right)+j\omega \left({\omega }^2{L}_1{L}_2{L}_3\left(2C_1+C_2\right)-\left(L_2{L}_3+L_1\left(L_2+L_3\right)\right)\right)}\end{array}$$

(5)

Through the integration of Equations (4) and (5) into Equation (1), one can derive streamlined expressions for the capacitors C₁ and C₂, which are exclusively reliant on the inductance values and frequency. This implies that, by ensuring the electrical characteristics of the filter align with the conditions of S₁₁ = S₂₂ = 0 and |S₂₁| = |S₁₂| = 1, it becomes feasible to deduce the mathematical formulations for C₁ and C₂.

$$C_1=\frac{1}{2{\omega }^2{L}_1}$$

(6)

$$C_2=\frac{L_2+L_3}{{\omega }^2{L}_2{L}_3}$$

(7)

To encapsulate, the proposed filter’s central frequency is tunable when the values for capacitors C₁ and C₂ adhere to the guidelines set forth in Equations (6) and (7). Crucially, in the context of microstrip fabrication potential and the functional scope of varactors, the strategic choice of inductor values and the frequency tuning range assume a heightened significance.

2.2. Selection of Design Parameters

The meticulous determination of design parameters for the tunable filter is efficiently facilitated using Equations (6) and (7) from the study. Equation (6) establishes a direct relationship between the capacitor C₁ and the inductor L₁. The initial phase of the design process involves graphically representing the frequency-dependent characteristics of C₁ while varying the value of L₁. As depicted in Figure 2, selecting a larger value for L₁ is recommended to attain a wider frequency tuning range. For instance, if C₁’s capacitance is constrained between 0.7 and 7.0 pF, choosing a 2.0 nH value for L₁ enables the filter to cover an expansive frequency tuning range, specifically from 1.0 to 3.0 GHz. Subsequently, Equation (7) is employed to generate graphical representations depicting the variation of capacitor C₂’s frequency response against different values of inductors L₂, and L₃. Figure 3 shows that an increase in either L₂ or L₃, while maintaining the other constant, results in a reduction in the capacitance of C₂. When the capacitance range for C₂ is set between 0.7 and 7.0 pF, a preferred choice is to select 8.0 nH for both L₂ and L₃. This specific selection is optimal for achieving a broad frequency tuning range, extending from 1.0 to 3.0 GHz.

In conclusion, the findings of this research highlight a unique occurrence when inductors L₁, L₂, and L₃ are assigned values of 2.0 nH, 8.0 nH, and 8.0 nH, respectively, and integrated into Equations (6) and (7). In this scenario, the resulting expressions for the tunable capacitors C₁ and C₂ become identical. This finding substantially refines the filter’s design process. As a result, the tunable filter proposed herein is capable of efficient operation with merely a single variant of tunable capacitor, markedly diminishing the intricacy traditionally involved in frequency tuning adjustments.

3. Tunable Filter Design

To validate the efficacy of the design methodology, a filter with a tunable frequency range from 1.0 to 3.0 GHz (electromagnetic (EM) simulation range) was designed. The details of the design process and the microstrip implementation are comprehensively summarized in the subsequent sections.

3.1. Design Procedure

The design process for the proposed filter unfolds in four sequential steps.

(Step 1) The design specifications, including parameters such as the frequency tuning range (e.g., 1.0~3.0 GHz) and port impedance Z₀, are meticulously considered.

(Step 2) Equations (6) and (7) are applied to generate frequency-dependent curves for C₁ and C₂, accounting for various values of L₁, L₂, and L₃ as depicted in Figure 2 and Figure 3. Within the accessible capacitance range (e.g., 0.7~7.0 pF) presented in the figures, specific values of 2.0 nH, 8.0 nH, and 8.0 nH are assigned to L₁, L₂, and L₃, respectively, to achieve the desired frequency tuning range.

(Step 3) The determined design parameters are combined, and values for C₁ and C₂ are calculated using Equations (6) and (7).

(Step 4) High-impedance transmission lines are utilized to construct lumped inductors L₁, L₂, and L₃. Varactor models (C₁ and C₂) are integrated into an electromagnetic simulation tool, considering the initial design parameters. The simulation comprehensively captures the coupler’s response, addressing all parasitic effects with precision throughout the process.

Additionally, the calculated circuit parameters for this filter can be found in

Table 1. Circuit parameters for the proposed filter.

L1 (nH)	L2 (nH)	L3 (nH)	Z0 (Ω)	C1 (pF)	C2 (pF)	f (GHz)
2.0	8.0	8.0	50	0.7~7.0	0.7~7.0	1.0~3.0

.

3.2. Microstrip Tunable Filter Realization

Figure 4 delineates the intricate layout of the microstrip tunable filter developed in this research. The tuning of this filter is ingeniously facilitated by components C₁ and C₂, which utilize high-Q GaAs diodes, specifically MA46H202 from MACOM. Additionally, the design incorporates a DC blocking capacitor, denoted as C_block, with a capacitance value of 100 pF. The bias resistor, R_bias, is integrated with a resistance of 180 kΩ. A key feature of this filter is its strategic minimization of insertion loss. This is achieved through the innovative use of lumped inductors, L₁, L₂, and L₃, which are implemented using high-impedance transmission lines. The use of these transmission lines in lieu of traditional inductor components plays a critical role in enhancing the filter’s overall performance, particularly in reducing loss and ensuring efficient signal transmission. The process of simulating, optimizing, and implementing high-impedance transmission lines is summarized as follows:

In the design of quasi-lumped (microstrip) inductors, a fundamental consideration is achieving the necessary inductance. Typically, a wider line width in these inductors corresponds to a longer line length. However, to minimize circuit size, employing narrow, high-impedance lines is often the preferred approach. Yet, it is crucial to balance this preference with practical considerations such as ease of soldering and layout planning for varactors and bias circuits. Excessively compact circuit designs may hinder these practical aspects. The optimization process for quasi-lumped (microstrip) inductors involves a careful selection of line width, taking into account both the desired compactness of the circuit and the feasibility of component layout. Once the appropriate width for the transmission line inductor is established, the next step is to finely tune the length of the line to achieve the required inductances. This process is a critical aspect of circuit design, where precision in dimensions directly impacts the overall performance and functionality of the inductors. The goal is to strike an optimal balance between maintaining a small circuit footprint and ensuring ease of assembly and effective circuit operation, thereby enhancing the efficiency and practicality of the microstrip inductors in various applications.

4. Simulation and Measured Results

This filter was fabricated on a Rogers RT/Duroid 5880 substrate with ε_r = 2.2 and h = 0.787 mm. Figure 4 illustrates the optimized dimensions for the proposed microstrip tunable filter: W₁ = 2.42 mm, W₂ = W₃ = W₄ = 0.44 mm, L₁ = 7.0 mm, L₂ = 2.8 mm, L₃ = 12 mm, L₄ = 4.65 mm, L₅ = 6.94 mm, L₆ = 3.96 mm, L₇ = 1.7 mm. Moreover, in EM simulations, the parasitic resistance (R_s) of the varactor was configured to 1.0 Ω to facilitate accurate modeling.

4.1. Performance during Frequency Tuning

Figure 5 presents a photograph of the fabricated filter, illustrating its compact circuit dimensions of 0.06λ_g × 0.09λ_g (physical dimensions are 13.8 mm × 21.3 mm), where λ_g denotes the wavelength corresponding to the filter’s lowest center frequency. In Figure 6, both the EM simulation and the measured S-parameters of the proposed filter are displayed at various center frequencies, specifically at 1.02 GHz, 1.2 GHz, 1.6 GHz, and 2.0 GHz. Further extending this analysis, Figure 7 exhibits EM simulation and measured S-parameters at higher center frequencies of 2.4 GHz, 2.8 GHz, and 3.1 GHz. The comparison between the simulated and measured results reveals a remarkable alignment, underscoring the precision of the filter’s design and performance. In other words, as the bias voltage (V_bias) of the varactor varies within the range of 0~20 V, the center frequency of the tunable filter can be continuously adjusted from 1.1 GHz to 3.1 GHz. The test results demonstrate that throughout the entire frequency range from 1.1 GHz to 3.1 GHz, the measured return loss of the filter consistently exceeds 19 dB. However, the measured tuning range is notably slightly narrower than the simulated range. This discrepancy is primarily attributed to the parasitic inductance introduced by vias, resulting in a diminished capacitance range for capacitor C₂. In every instance evaluated, the bandwidth at which a 15 dB return loss is maintained surpasses 90 MHz. The insertion loss, as measured, ranges from 0.9 to 2.1 dB. A maximum deviation of approximately 1.0 dB is observed between the simulated and measured insertion loss values. This variance is largely due to the higher actual parasitic resistance of the varactors when compared to their simulated values. Moreover, Figure 8 illustrates the fractional bandwidth (FBW) curve with a 15 dB return loss for the proposed filter, captured over its entire frequency tuning spectrum. Notably, the FBW_15-dB, measured at the central frequencies, spans from 8.5% to 45.4% across various operational states. Moreover, Figure 8 includes the detailed measurements of the 0.1 dB amplitude ripple fractional bandwidth (FBW_0.1-dB) for this filter, captured across its entire frequency tuning range. Notably, the FBW_0.1-dB amplitude ripple, as measured at the central frequencies, varies from 12.5% to 43% across all operational states.

4.2. Comparison

Table 2. Performance comparison of reported frequency-tunable filters.

Ref.	Configuration	Tuning Elements (Number)	Bias Control Number	Freq. (GHz)	Tuning Range (%)	RL (dB)	IL (dB)	Size (λg2)
[5]	HSIW	RF MEMS Switch (6)	N.A.	1.2~1.6	28%	>11	1.2~3.4	0.4
[7]	Single-layer PCB	Varactor + p-i-n diode (12)	6	0.54~1.8	107.7%	>15	4~5.4	0.013
[12]	Suspended integrated stripline	Varactor (4)	2	2.3~3.9	52%	>11	2~4	0.126
[13]	Single-layer PCB	Varactor (6)	3	2.45~3.02	21%	>10	0.75~1.1	0.145
[16]	Single-layer PCB	Varactor (4)	2	0.8~1.14	35.1%	>13.9	2.7~3.1	0.024
This work	Single-layer PCB	Varactor (3)	1	1.1~3.1	95%	>19	0.9~2.1	0.007

λg is the guided wavelength at the lowest tuning frequency. HSIW: half-mode substrate-integrated waveguide. PCB: printed circuit board. MEMS: microelectromechanical systems. RF: radio frequency. RL: return loss. IL: insertion loss. N.A.: not applicable.

offers a comparative analysis of the measured performance of the proposed filter compared to other relevant studies in the field. A notable point of comparison is the filter described in [7], which boasts the most extensive frequency tuning range: 107.7%. However, this is achieved through the use of a complex system comprising 12 tuning elements and six bias controls, and it is characterized by a relatively high insertion loss. In contrast, the frequency-tunable filters mentioned in [5,7,12,13,16] require a minimum configuration of four tuning elements and two bias controls to facilitate frequency adjustment. This comparison highlights the more complex tuning mechanisms employed by these filters. The proposed filter, as detailed in Table 2, distinguishes itself by achieving a broad frequency tuning range, while simultaneously maintaining a simplified tuning mechanism. It effectively operates with only three tuning elements and a single bias control. Additionally, one of the key attributes of this filter is its compact circuit dimensions, which is a significant advancement over the more complex designs of the aforementioned filters. This juxtaposition clearly demonstrates the advantages of the proposed filter, emphasizing its combination of a wide tuning range, simplified control, and compact size.

5. Conclusions

This research is centered on the development of highly integrated bandpass filters, employing the voltage control method to achieve adjustable frequency bands. The emphasis on simplicity in design introduces a novel solution that significantly reduces system complexity. This straightforward adjustment system contributes to heightened system reliability and increased yield ratio during mass production. A successful implementation of a microstrip tunable filter prototype was achieved, followed by comprehensive laboratory testing. The results demonstrate the filter’s capability to be adjusted within the 1.1–3.1 GHz range, with a passband insertion loss of less than 19 dB. Concurrently, during the adjustment process, the filter consistently upholds a return loss bandwidth of over 90 MHz at 15 dB. This underscores the effectiveness and practicality of the proposed design in meeting performance requirements. Looking forward, the potential for the future development of this proposed solution lies in exploring further miniaturization, increasing the tuning range, and integrating advanced materials or technologies to enhance performance and energy efficiency. This direction aligns with the evolving needs of modern wireless communication systems and paves the way for wider applicability in various demanding applications.