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Peer-Review Record

Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective

Electronics 2022, 11(4), 632; https://doi.org/10.3390/electronics11040632
by Mateo Rendón 1, Christian Cao 1, Kevin Landázuri 1, Esteban Garzón 2, Luis Miguel Prócel 1 and Ramiro Taco 1,*
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Reviewer 3: Anonymous
Electronics 2022, 11(4), 632; https://doi.org/10.3390/electronics11040632
Submission received: 30 December 2021 / Revised: 28 January 2022 / Accepted: 30 January 2022 / Published: 18 February 2022

Round 1

Reviewer 1 Report

Paper is written in a very clear way. Topic is very interesting, theory has treated in right way and results and images explain results. Just a note, I have not found in theory reference to Wavelet Analysis. I think that this typology of Analysis is so relevant that it is impossible to not mention it. I suggest this paper as reference: "Wavelet Analysis in Volcanology: The Case of Phlegrean Fields", Journal of Environmental Science and Engineering A, vol.6 pp. 300-307, author: G. Pucciarelli

Author Response

Referee reply of the manuscript “Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective” by Mateo Rendón, et al.

 

We wish to thank the Editor and the Reviewers for their careful revision of our manuscript.  We improved our paper according to the received comments and suggestions. A detailed point-by-point response is given below in the attachment. For clarity, the Reviewers’ comments are reported in black bold text, and the authors’ reply and changes in the main text of the revised manuscript are reported in blue.

Please see the attachment. 

Author Response File: Author Response.pdf

Reviewer 2 Report

1.In the abstract 300mV should be corrected with 300mW

2. How  justified in the specification given in Table 3, to ignore the 
 temperatures greater than or less than 25C?Explain this in a more details

Author Response

Referee reply of the manuscript “Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective” by Mateo Rendón, et al.

 

We wish to thank the Editor and the Reviewers for their careful revision of our manuscript.  We improved our paper according to the received comments and suggestions. A detailed point-by-point response is given below in the attachment. For clarity, the Reviewers’ comments are reported in black bold text, and the authors’ reply and changes in the main text of the revised manuscript are reported in blue.

Please see the attachment. 

Author Response File: Author Response.pdf

Reviewer 3 Report

This paper is devoted to compare between two scaled mosfet transistors; namely the TFET and the FinFET at 10 nm technology node by using them in building logic gates and a bench mark VLSI circuit.

There are major comments:
- The authors must give the physical structure of the two tansistors.

- They have also to present the drain I-V curves of the two tansistors and bound the operating regions for ELP digital circuits.

-The noise margin depends on the power supply voltage , how would it be if one uses the two transistors at two power supply voltages. For low voltage power supply would be the noise margin sufficient?  The thermal voltage is 25 mV at room temperature. Would not such thermal noise affect the logic decision?

- Are the performance curves of the logic gates not sufficient to work out the merits of the every transistor? Why using VLSI circuit?

-  The results in Fig. 6 are redundant and must be reduced.

- It is required to give the area of the two alternative designs with the different transistors.

- It is require to indicate the sensitivity of the circuit to fabrication tolerances and temperature

- It is required to outline the spice models for the transistors as the author said that it is the novel contribution together with standard cells

- Post layout simulation is required as the authors compare circuits also.

 

Author Response

Referee reply of the manuscript “Performance Benchmarking of TFET and FinFET Digital Circuits from a Synthesis-Based Perspective” by Mateo Rendón, et al.

 

We wish to thank the Editor and the Reviewers for their careful revision of our manuscript.  We improved our paper according to the received comments and suggestions. A detailed point-by-point response is given below in the attachment. For clarity, the Reviewers’ comments are reported in black bold text, and the authors’ reply and changes in the main text of the revised manuscript are reported in blue.

Please see the attachment. 

Author Response File: Author Response.pdf

Round 2

Reviewer 3 Report

I would like to thank the authors for their elaborate revision of the manuscript according to my comments. They systematically answered all my questions.

I am convinced with their replies.

Wish them more success!

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