Next Article in Journal
Application of P(VDF-TrFE) Glass Coating for Robust Harmonic Nanoparticles Characterization
Next Article in Special Issue
A Novel High-Speed and High-Accuracy Mathematical Modeling Method of Complex MEMS Resonator Structures Based on the Multilayer Perceptron Neural Network
Previous Article in Journal
Comprehensive Understanding of Silicon-Nanowire Field-Effect Transistor Impedimetric Readout for Biomolecular Sensing
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Review

Built-In Self-Test (BIST) Methods for MEMS: A Review

Smart Systems Group, Earl Mountbatten Building, Research Institute of Sensors, Signals and Systems, School of Engineering & Physical Sciences, Heriot-Watt University, Edinburgh EH14 4AS, UK
*
Author to whom correspondence should be addressed.
Micromachines 2021, 12(1), 40; https://doi.org/10.3390/mi12010040
Submission received: 6 December 2020 / Revised: 24 December 2020 / Accepted: 29 December 2020 / Published: 31 December 2020
(This article belongs to the Special Issue Microdevices, Systems and Algorithms for Assets Management)

Abstract

:
A novel taxonomy of built-in self-test (BIST) methods is presented for the testing of micro-electro-mechanical systems (MEMS). With MEMS testing representing 50% of the total costs of the end product, BIST solutions that are cost-effective, non-intrusive and able to operate non-intrusively during system operation are being actively sought after. After an extensive review of the various testing methods, a classification table is provided that benchmarks such methods according to four performance metrics: ease of implementation, usefulness, test duration and power consumption. The performance table provides also the domain of application of the method that includes field test, power-on test or assembly phase test. Although BIST methods are application dependent, the use of the inherent multi-modal sensing capability of most sensors offers interesting prospects for effective BIST, as well as built-in self-repair (BISR).

1. Introduction

The earliest micro-electro-mechanical-systems (MEMS) emerged in the 1970s [1] and interest in creating them has grown ever since. Unlike in integrated circuits (ICs), MEMS utilise information and material from multiple domains of energy (electrical, mechanical, thermal, optical, biological, etc.), making testing in general, and built-in self-test (BIST) for MEMS, much more complicated than for ICs. Moreover, the causes and modes of failures are much more numerous and varied, rendering online and offline testing complicated [2,3]. In comparison to IC testing, MEMS testing is therefore more expensive generally, representing, in some cases, up to 50% of the price of the end product [4,5,6]; built-in self-test (BIST) methods can help offset these cost-provided solutions are offered to test across multiple domains of energy and interfaces. However, due to the increased complexity as compared to ICs, BIST for MEMS only emerged in 1989 [7].
BIST enables an electronic system to be aware of its own condition [8]. This technique found ubiquitously in embedded systems allows the extraction of parameters ranging from a single system pass/fail information to a comprehensive set of parametric information regarding the health of each of the system components. Using the terminology employed by Benso et al. [9], BIST is a “detection only” fault handling strategy, whereby the system signals only the detection of a fault, but does not act on it and lets the external environment handle it.
First developed for integrated circuits (ICs) in 1977 [10], and considered a well-established design-for-testability (DfT) method in the 1980s [11], BIST has evolved into various implementation specific techniques, which include histogram-based analog BIST (HABIST) [12], logic BIST (LBIST) [13], memory BIST (MBIST) [14], and its programmable alternative, programmable BIST (PBIST) [15]. BIST is also used alongside various tools for testing, such as JTAG [16], automatic test pattern generation (ATPG) [17], for example, or sometimes incorporating tools such as cyclic redundancy check (CRC) [18] or pseudo-random pattern generator (PRPG) [19]. MBIST is also usually used in conjunction with redundancy-based built-in self-repair (BISR) or memory built-in self-repair (MBISR), techniques which implement the complete removal of the fault [20,21] and generally rely on the redundancy of electronic components [22].
This article presents a systematic review and classification of BIST strategies for MEMS. A moderate amount of literature is available on BIST techniques for MEMS, with all articles presenting solutions specific to the MEMS studied, and most of them focusing on inertial MEMS [23,24]. As the last review on BIST for MEMS was written in 2006 [25], this review article provides a timely up-to-date overview based on around 100 publications of academic and industrial research worldwide.
A taxonomy of the various BIST strategies for MEMS discussed in this review is presented in Figure 1. Section 2 introduces electrically induced stimuli test methods. These methods are the most popular and have their origin in the testing of inertial MEMS. In Section 3, the authors present a set of test methods which they define as delay-based test methods; these form the second most popular test methods. Section 4 discusses the impulse response test methods and Section 5 describes the bias superposition/modulation methods, which are becoming very popular. Section 6 highlights the unique use of sensors with different sensing modalities at a potential BIST method. At the end of each section, a discussion paragraph summarises the advantages and drawbacks of each methods alongside their key characteristics. Section 7 benchmarks all these methods in terms of ease of implementation, “usefulness” defined as the number of functionalities a given method possesses, and test time duration with indication as whether the test is occurring during manufacturing/assembly, at activation or during operation of the device. A summary table highlighting the key performance metrics for each BIST method is also provided. Finally, Section 8 provides general conclusions regarding this review article.

2. Electrically Induced Stimuli Test

In this test method, an electrical signal generates a physical signal, like an electrostatic force for example, inside the MEMS. This physical signal is expected to generate a response from key functional sub-structures of the MEMS. If the response can be converted back into an electrical signal, a viable BIST method would use this physical signal either to mimic the physical forces acting on the device under test (DUT) under normal operating conditions, or to extract information about the health of the DUT [23,24]. Four test strategies that highlight this method are presented in this subsection: single-ended test, symmetrical test, direct and indirect parameter extraction.

2.1. Single-Ended Test

Many MEMS have moving or free-standing structures that either (1) have been designed purposely to be actuated, (2) are susceptible to be deformed, albeit unintentionally, or (3) can be used by some other means to stimulate other parts. Examples include the use of electrostatic forces for accelerometer testing [26], the heating of a resistor to cause thermal expansion of a suspended structure [27,28], or the emission of infrared signals impinging on a thermopile structure [29]. An electrical test signal generator would electrically stimulate the device in a way that results in a physical movement, a deformation, or the creation of a signal belonging to the right domain of energy for the device to be tested. The output response is then measured and compared to the normal operational behaviour of the system [30]. This subsection presents in detail these three possibilities.

2.1.1. Electrostatic Actuation

Developed as early as 1989 for crash sensors in car airbags, the method relies on the generation of an electrostatic force to actuate the freestanding seismic mass of a capacitive accelerometer. An example of this self-test system can be found in the former ADXL50 acceleration measurement system commercialised by Analog Devices [26]. It not only supports self-test but also self-calibration using the Earth’s gravity.
Zimmerman et al. present also an accelerometer structure with self-test capability of duration of less than 2 ms, utilizing electrostatic force to deflect the moving mass as shown in Figure 2 [31]. The generated pulse signal makes the accelerometer behave identically to an external acceleration signal. The amplitude of the deflection is controllable. The self-test is claimed to be useful also for the periodic calibration and accelerated ageing test. Analysis of the test response allows access to the functional parameters of the device, such as the resonance frequency, which is affected by most common accelerometer faults [32,33].

2.1.2. Thermal Actuation

Thermal actuation is utilized for BIST in various ways [34,35]. In one instance, a current is used to thermally expand a bimetallic membrane to simulate membrane deflection in a pressure sensor [27,28]. Charlot et al. use thermal actuation in three applications: (1) a cantilever structure used as a tactile sensor, (2) a cantilever with a suspended mass simulating an accelerometer and a (3) membrane for pressure sensors [24]. In all three cases, a heater electrode is used to provoke the thermally induced deformation of a suspended structure. The magnitude of the deformation is detected by piezoresistors, as shown in Figure 3.

2.1.3. Other Thermally Induced Effects

Heat can also be used indirectly to actuate free-standing structures. One example, shown in Figure 4, includes the heating of air present in a cavity, which generates a pressure gradient that causes the deflection of a membrane in a MEMS pressure sensor [36]. Heater electrodes are also used to provide a built-in heat source for a MEMS infrared imager [23]. In all cases, the thermal element is a simple heating electrode with a meander structure implemented on a chip.
In summary, a singe-ended test has been demonstrated for a variety of MEMS, including accelerometers, tactile and pressure sensors, and infrared imagers. Each application has different time constraints ranging from less than 2 ms in airbag application using capacitive accelerometers [31] to around 3 ms for the thermal excitation of the cantilever-type accelerometer structure. The main benefit of this test method is the lack of need for a physical force to run the measurement. The method is also relatively fast, but application-dependent. Additional integrated circuitry or external readout equipment is however required to analyse the sensor output.

2.2. Symmetrical Test Method

Similar to the single-ended test method in terms of the generation of the physical stimuli, symmetrical testing focuses on enhancing the observability of deviations of device response from normal behaviour. This BIST method relies on detecting any differences in the results obtained at symmetrically placed measurement points and resulting from the presence of local defects. This test, which results in pass/fail information about the health of the device, is not effective for defects such as stiction, that affects the device in a symmetric manner, but detects finger height mismatch and etch variation very well in the case of a comb-like accelerometer.
Most of the research related to this method has been carried out at Carnegie Mellon University by Deb et al. [37,38,39,40], and by Xiong at al. at the University of Cincinnati, as shown in Figure 5 [41,42]. While Deb et al. focused on the symmetrical test method only on surface-micromachined capacitive MEMS accelerometers, Xiong et al. showed applied both single-ended and symmetrical test for three different devices and claimed that their technique can be easily extended to other capacitive MEMS devices. With a 1 MHz modulation voltage, the sensing time is under 1 ms. This test method also requires additional circuitry for control and measurement at symmetrically placed areas.

2.3. Direct Parameter Extraction Test

Electrical parameters obtained from measurements of the output response of MEMS very often show a strong correlation with their mechanical parameters (mass, damping coefficient, spring constant). It would be therefore possible to directly infer from these measurements, whether the mechanical structure of MEMS is affected by defects. In that regard, Natarajan et al. came up with a method to test certain mechanical parameters of a capacitive accelerometer by purely electrical means [43]. A large frequency AC signal was used to create an oscillating motion on the plates of the capacitors. The capacitance deviation caused by the oscillating motion was monitored using a high frequency AC signal and an op-amp based capacitance sensing circuitry. The signal is optimized in a way that the capacitance vs. time waveforms are sensitive to changes in the mechanical properties of the accelerometer. From the capacitance measurements, the mechanical parameters of interest are predicted with less than 5% error using multivariate adaptive regression splines [44]. The method presented in their work and shown in Figure 6 is referred to as alternate testing [45].
While it is not a fully integrated BIST solution and requires external components, signal processing and evaluation off-chip, it is amenable to be one, as BIST solutions with the same test method were previously presented for RF ICs [46]. The test method, when fully on-chip, would alleviate the need for expensive measurement setup thus saving money on testing. Assuming that the mapping algorithm needs at least 1 full period to match the output to the physical properties of the device, the prediction of the device parameters should take around 22–25 ms. Although the technique was designed originally for accelerometers, it should be applicable to any capacitive MEMS.

2.4. Indirect Parameter Extraction Test

2.4.1. Oscillation-Based Test

It is computationally easier and faster to use an oscillating signal to measure these electrical parameters that are highly correlated to the MEMS dynamics [30]. These include resonant frequency, pull-in voltage or amplitude response. This method, called the oscillation-based test method (OTM), was studied by Beroulle et al. at LIRMM [47,48] and Al-Gayem et al. at Lancaster University [49,50,51,52,53,54].
In the former case, OTM for analogue circuits was adapted to simulate, with polysilicon strain gauges, the deflection of a U-shaped cantilever vibrating due to Lorentz forces in the presence of a magnetic field, as shown in Figure 7. The magnetometer was reconfigured into an oscillating device using a first-order derivation feedback circuit to induce motion of the DUT and calculate the resulting frequency and the amplitude of the oscillations. Frequency and amplitude are referred to as indirect parameters, while the thicknesses of various layers of the cantilever structure are referred to as low-level parameters. Both the direct parameters such as sensitivity and settling time and the indirect parameters are dependent on the low-level physical parameters. OTM did not prove to be useful in reliable detection of small deviation of the low-level parameters, or small parametric faults, however it performed well for detecting catastrophic fault or large parametric faults. With a natural frequency of 11 kHz, the authors concluded that the duration of the test would be around 12 ms.
In the latter case [49], OTM was also used to simulate the degradation of the electrode surface in a microfluidic system by modelling the electrical double layer as a capacitance inserted into the feedback of a standard oscillating structure. The increase of frequency of the oscillator indicated the corrosion-induced reduction of the surface area, and therefore of the capacitance of the electrode. The experiments showed that 50% capacitance change resulted in a three-time increase of the oscillation frequency. The oscillation frequency for a fault-free electrode was above 20 kHz, thus assuming that at least one full cycle is needed for a measurement; the test time is under 50 µs.
Whereas both works were simulations, Al-Gayem et al. carried out physical experiments, albeit without an integrated solution. Neither OTM has been implemented for BIST yet, but has the potential to be a fully integrated BIST method [49].

2.4.2. Impedance Analysis

Liu et al. [55] and later Al-Gayem et al. [49] presented another electrode degradation detection method based, this time, on the impedance analysis of a capacitive biosensor device. As the electrode degrades, the impedance increases and signal-to-noise ratio (SNR) drops. Their DUT had multiple sensing electrodes assumed to be fault-free. The impedances are measured and compared using a half-bridge structure [49]. The pass/fail decision is based on the ratio of the measured impedances and the reference. The ratiometric measurement demonstrates that the comparison method reveals damaged electrodes even if the reference electrodes are faulty, as illustrated in Figure 8 and Figure 9.
The impedance measurement was chosen to run at 1 kHz, but the theoretical assumptions for the impedances will hold true till the MHz range. Although the speed of the measurement system is currently in the ms range, tests durations of a few µs could be achievable.

2.5. Discussion

Test methods based on electrically induced stimuli alleviate the need for external physical stimuli. In order to implement the technique in a truly BIST manner, the test signal generation and response analysis must be implemented on chip [25]. With such methods, BIST could implement functional tests, focusing on measuring device specifications, and structural tests that focus on identifying defects. An example of the former is the periodic self-calibration of the Analog Devices accelerometer using electrostatic actuation and Earth’s gravity [26], as recommended by Zimmerman et al. [31]. A symmetrical test is a structural test method whose duration is device dependent, and which requires a modular MEMS structure that is specific to certain transducer types such as accelerometers or RF MEMS switches [56]. The redundancy offered by device symmetry may be utilized for BISR [57] applications if a suitable BIST method is present. The technique offers a better fault coverage when used in combination with electrically-induced stimuli test [42]. Direct parameter extraction method is a functional test allowing the direct extraction of the mechanical properties of the DUT using mapping techniques. Not yet implemented as a BIST method, the test duration depends on the selected frequencies, themselves dependent on the geometry and material properties of the device. In contrast, the indirect parameter extraction method is a structural test method which requires integrated evaluation circuitry to make is a truly BIST technique. In all of these methods, the dedicated BIST circuitry could be part of an ASIC heterogeneously integrated with the MEMS sensor in a package if necessary.
No “best BIST” solution exists for this category of tests, and the most suitable method needs to be selected on the user needs and limitations of the device. For example, a symmetrical test method is not suitable for non-modular devices. Direct parameter extraction might be able to extract vital information about the mechanical properties of the system at the expense of significantly more additional circuitry for signal processing and decision compared to other methods.

3. Delay-Based Test Methods

Delay-based test methods have been used extensively in microelectronics [58,59,60]. To the best of the authors’ knowledge, their application in capacitive MEMS BIST was originally carried out by Rashidzadeh et al., who utilised delay lines to measure time intervals which are a function of the capacitance of the DUT [61,62,63,64,65,66]. The test methods, described in this subsection, include the charge control method, phase-locked loop (PLL) method, phase locking method and the use of a Pierce oscillator.

3.1. Charge Control Technique

As shown in Figure 10, this BIST scheme utilizes a charge pump with two current sources that gradually charge (current source I1) and discharge (current source I2) the capacitance of a MEMS while measuring the charge and discharge times with delay lines [65]. A comb drive structure was used for testing, thus charging the device altered the electrostatic force between the plates. The movement of the plates results in a capacitance variation that is detected and converted to time intervals using delay lines. The time intervals are digitized by a time-to-digital converter (TDC) [67]. Some structural defects may alter the measured capacitance of the comb drive by changing its geometry and spring constant. These defects can include missing fingers, finger dimension dissimilarity and etch variation.
This method provides a safe BIST solution, without the risk of collapsing the suspended structure with electrostatic forces while being insensitive to noise and power supply variations. The demonstration chip, fabricated with the TSMC CMOS 65 nm process, occupied 0.7 mm2 silicon area and consumed less than 2.8 µW power for a maximum self-test speed of 18 kHz. The device was prototyped without a capacitive sensor but contained a CMOS varactor mimicking the behaviour or a MEMS capacitor. The chip is capable of measurements with ns resolution and can detect capacitance changes in the fF regime.

3.2. PLL Based Built-in Self-Test (BIST)

In this method, a phase-locked loop (PLL) transfers the capacitance variations of a capacitive MEMS in the time domain [64]. Inserting the MEMS between a phase-frequency detector (PFD) and a voltage-controlled oscillator (VCO) creates a phase difference between the input and output of the VCO, as shown in Figure 11. A change in the MEMS capacitance from its nominal value introduces a phase difference in the PFD inputs. This results in the PLL losing the lock, which it reacquires by VCO adjustment. In this state, the inputs of the PFD are in phase again, however the phase difference between the input voltage and the output of the VCO is different from its original value. This difference is linearly proportional to the deviation of the MEMS capacitance. The proposed method is insensitive to process, supply voltage and temperature (PVT) variations. Only simulations were carried out to validate the concept as a BIST method. This technique has measurement resolution in the ns regime and is capable of detecting changes in capacitance down to tens of aF.

3.3. Phase Locking Test Method

In this method, a phase-locking circuit is utilized to detect physical defects in a capacitive MEMS [63]. Small defects that change the capacitance by fFs are hard to detect, especially in the presence of PVT variations. To measure such small defects, a modified delay locked loop (DLL), chosen for its better jitter performance compared to a PLL, is used to amplify the capacitance variations in the time domain.
The parasitic capacitances of a typical MEMS actuator are in the fF range. This value is comparable to that of the delay cell capacitances that essentially define the resolution of a delay locked loop. As the DLL resolution is in the parasitic capacitance range, smaller deviations to the MEMS capacitance caused by minor defects may go undetected. To increase its resolution, the DLL was reconfigured into a delay detection module (DDM) so that the resolution of the circuit now depends on the delay difference between two delay cells and not on the delay of each cell. This allows one to amplify the delay introduced by the MEMS capacitor, as shown in Figure 12.
A prototype circuit of an estimated area of 7600 μm2 was realised in 0.18 µm CMOS technology for performance verification. This technique operates in the ns time regime and is capable of detecting up to 2 fF capacitance variations.

3.4. Pierce Oscillator

Unlike other delay-based test methods, this BIST method, used for capacitive MEMS, operates in the frequency domain instead of the time domain [61]. In [58], structural defects causing very small capacitance deviations are claimed to be easier to detect in the frequency domain than in the time domain, especially for resonant structures monitored closed to their resonant frequency. In that regard, a Pierce oscillator structure is utilized to assess capacitance deviations in the frequency domain.
In the study of Rashidzadeh et al., the resonance frequency of the DUT depends on the MEMS capacitance. As shown in Figure 13, a 10 fF change in a capacitance of a comb drive structure with a nominal value of 1 pF creates a 10 MHz deviation of a resonant frequency of 1 GHz, which is much easier to detect than the corresponding deviation in the time domain. This BIST duration is in the order of ns and the method is able to detect structural failures with high accuracy, such as missing fingers in a comb-drive.

3.5. Discussion

All delay-based tests methods highlighted above were applied for comb drive structures but could equally be used for other capacitive MEMS. The methods utilise delay lines to measure time delays associated with MEMS capacitances and operate within the ns duration. They convert capacitance variations into time differences. The Pierce oscillator translates these capacitance variations into the frequency domain, while the phase locking test method amplifies the time difference using a “time amplifier”, which is a combination of a delay detection module and delay lines. It could be argued that the PLL-based BIST is not strictly a delay-based method but this test shows great similarity to the phase locking test solution. The phase locking method has however better jitter performance. Apart from the Pierce oscillator method, all are insensitive to PVT variations. As the experimental validation of methods were carried out using different CMOS processes, power consumption and die overhead are not directly comparable. The PLL-based BIST method is superior in detecting small capacitance deviations as it proposes aF level resolution, while the rest of the methods only offer fF resolution. Apart from the PLL-based BIST solution, all delay-based test methods were fabricated and experimentally validated. Although few BIST solutions exist for RF MEMS [68,69,70], it was suggested by Syed et al. [71] that non-contact capacitance deviation detection methods can be utilized to detect certain failures such as stiction, thus delay-based test methods may be suitable candidates for RF MEMS BIST.

4. Impulse Response Test Method

One of the simplest ways to assess the health of a linear time invariant (LTI) system is to calculate its impulse response (IR). The IR of a system can be acquired by applying a Dirac (delta) δ-function as the system input and measuring the output response. By knowing the IR of the system, the output for any arbitrary input can be calculated, thus failure-related deviations can be identified. Various strategies were implemented based on this concept; these include the pulse excitation test and the pseudorandom test methods.

4.1. Pulse Excitation Test Method

An approximation of the δ-function is a pulse signal. This method enables fast system characterization, but has a very low signal-to-noise ratio due to its short time duration [72]. Rarely used since more accurate, albeit slower, methods exist to calculate the IR of a system, pulse excitation is however a feasible solution for time-critical applications.
A patent from InvenSense Inc. describes an on-chip pulse excitation (PE) solution for testing a capacitive microphone as shown in Figure 14 [73]. The electrical pulse is generated by an electrostatic force generator. The circuit includes a voltage buffer to drive the test signal onto the output of a high voltage charge pump (HVCP). The output of the voltage buffer is coupled through a capacitor so that it does not disturb the DC voltage at the output of the HVCP. A resistor is used to control the time constant of the applied waveform.

4.2. Pseudorandom Test Method

A more accurate, higher SNR but slower test method uses a pseudo-randomly coded test sequence to calculate the impulse response of a system. The impulse response is obtained from the measurements of the input-output cross-correlation function [25,72,74,75,76,77,78,79,80].
One of the earliest pseudo-random testing techniques for BIST presented by Pan et al. [81] in Figure 15 uses a linear-feedback shift register to generate a maximum length sequence (MLS), which is the test sequence. MLSs are binary sequences with a length N = 2 m-1, where m is the order of the sequence. This sequence is highly suitable for IR measurements, since it is periodic and deterministic. Only one period of the MLS signal is enough to calculate the impulse response in case of a linear time-invariant system. Averaging can be applied to increase SNR. Due to the deterministic property of the MLS, it is precisely repeatable. The SNR can thus be further increased with the synchronous averaging of the test output.

4.3. Discussion

It is hard to compare the methods due to the low number of available papers on pulse excitation. In general, PE is faster than pseudorandom testing and the injection of the test signal requires less additional circuitry. PE has, however, a lower SNR and there is a chance of damaging the MEMS device. Pseudorandom testing is more accurate at the expense of more additional circuitry and processing time. Mir et al. were able to calculate the impulse response of a bulk micromachined CMOS cantilever beam with this method under 1 ms [25].

5. Bias Superposition/Modulation Method

The electrically induced stimuli test methods presented in Section 2.2 are off-line methods since they perturb MEMS outputs during normal operating conditions [82]. A solution is required to test MEMS during their operation, whilst making sure that test results can be solely related to the input stimulus response. As shown in Figure 16, in the bias superposition method, also called bias modulation method, a test stimulus is either added (superposition) or multiplied (modulation) to the normal electrical biasing of the structure of the MEMS to be tested. The characteristic of the stimulus allows the test response to be extracted from the normal functional response of the MEMS, ideally without compromising either signal. The injected test signal has typically a frequency outside the operating bandwidth of the functional signal, but still within the physical bandwidth of the MEMS to allow online operation. Following [82], this subsection describes in detail the four different types of stimuli used for these tests: differential bias, alternative bias, actuating bias and redundancy bias.

5.1. Differential Bias

The differential bias method relies on device symmetry to identify structural defects. In the case of a pressure sensor, a Wheatstone bridge structure, Figure 17, is used with piezo resistive strain gauges experiencing increase and decrease of resistance depending on the applied strain [82]. The voltage supply of the structure is split into two differential inputs containing the bias voltage and an ac signal of different polarity but same magnitude. The AC output is independent of the strain applied to the structure as the values of the resistors stay relative to each other along with the rate of change. If the change only affects a single resistor, the AC output will change, and the fault is detected.

5.2. Alternative Bias

The alternative bias method utilizes a signal superimposed or modulated to the bias signal that excites the sensor element in a way distinct from its normal mode of operation. This method exposes defects without any measurement. In the case of a MEMS magnetometer based on a U-shaped free-standing mechanical frame connected to a Wheatstone bridge as in Figure 18 [85,86], a low-frequency signal is injected for thermal excitation purposes. Lorentz forces actuate the structure at its mechanical resonance frequency of around 22.5 kHz. A low frequency signal of 4.5 Hz injected to the bias current (or voltage) induces thermal variations to the mechanical resonance. Both components can be read at the output of the sensor. In case of a catastrophic failure, the thermal dissipation of the bridge structure is likely to change; so does the low frequency output. This method could also be included in Section 2.1.2.
Both bias superposition and modulation strategies have been investigated. For bias superposition, the amplitude increase of the output is caused by asymmetrical bias. For bias modulation, the output of the sensor is proportional to the peak-to-peak amplitude of the bias signal. Assuming that at least 1 full cycle is needed for measurement evaluation, the duration of this test method is around 250 ms.

5.3. Actuating Bias

The actuating bias method utilizes a signal generated by the bias to physically excite the sensor in the same manner as the bias itself. Either the bias signal generates a similar response to the measurand (same type of output/effect) or mimics the response of the measurand (same type and magnitude). Simulation work was carried out in the case a capacitive MEMS accelerometer with the test stimulus lying in the mechanical bandwidth of the DUT, as shown in Figure 19 [82]. The superimposed signal must not, however, influence the measurement output, and must be separable by filters. Experiments were later carried out by Dumas et al. with the frequency of the injected stimulus sitting in the mechanical bandwidth of the device, but outside the bandwidth of interest [88]. Since the measurand-induced signal and the test signal have different frequencies, they are simply separated by filters at the output of the DUT. This case study also highlights the narrow bandwidth of the test stimulus and the requirements for high roll off test filters.
Instead of employing a sinusoidal signal for the injected stimulus, improvement on the readability of the output was demonstrated by using a pseudo-randomly coded sinusoidal wave generated by a linear feedback shift register (LFSR) [81]. Two scalar values, covariance (Cov) and correlation (Cor), were produced at the test output and are generated by covariance and correlation algorithms, respectively. Cov is proportional to the sensor sensitivity, while Cor is used to validate the value of Cov and serves as an indicator for output signal corruption. The health of the system is determined by the value of Cov, which indicates whether system sensitivity falls below a threshold value. The pseudorandom coding ensures that Cov is readable on the output. This requires a trade-off between readability and test speed as increasing the number of bits used for the pseudorandom code improves the readability of the signal. Dumas et al. found the number of minimum acceptable bits for their case study to be 255, resulting in a test duration of 2.55 s.

5.4. Redundancy Bias

In the redundancy bias method, the bias signal is manipulated to support two distinct measurements of the physical input. The two measurements are correlated to obtain data that constitute a function of the structural MEMS parameters.
Application of this method was carried out on a thick film conductivity sensor used in electrolyte conductivity measurements [89]. The sensor uses two gold electrodes around a micro-channel, with the channel sidewalls exposed to the electrodes as shown in Figure 20. To measure the resistance of the solution in the channel, high measurement frequency (10 kHz) is desirable to avoid electrolysis and the unwelcome impedances of the contacts at the electrode-solution interface and at the grain boundaries due to the unideal flatness of the electrode surface. In order to measure the time constant of the system, a 10 Hz step signal is required that activates the transient response. Jeffrey et al. demonstrated a relationship between the measured time constant and the concentration of the solution. By measuring the time constant, information about the concentration can be acquired, that is used to calculate a second value for the solution resistance. The high frequency (10 kHz) and low frequency (10 Hz) signals are mixed together and used as sensor bias, as illustrated in Figure 21. Measurement of the solution resistance (R’x) is achieved using the high frequency signal and the time constant is measured using the low frequency signal, from which a second value for the solution resistance is calculated (R’’x). A mismatch between R’x and R’’x or a time constant outside the specifications stored during sensor calibration indicates DUT failure. This provides pass/fail information about the health of the sensor.

5.5. Discussion

In summary, bias methods have the advantage of not requiring modification of the MEMS sensor to test. These online test methods also allow failure detection during online MEMS operation. In this respect, test durations ranging from 2.5 s (actuating tested using pseudorandom code sinusoidal signal) down to sub-ms (differential bias) become less critical, as the tests do not disturb the normal use of the MEMS. Extraction of the output signal resulting from the input test signal is feasible with electrical filters as the former injected signal has a frequency outside the operational frequency of the MEMS. This output signal provides information on the health of the MEMS and potential online signal compensation in case of calibration error.
As only pass/fail information can be extracted, these test methods are not suitable for MEMS characterisation or parametric measurements, although they provide a cost-efficient low-overhead solution for catastrophic fault detection. Regarding the use cases, differential bias can only be implemented when a symmetric/modular structure is present, and for failures that do not affect MEMS in a symmetrical manner such as stiction. As in the symmetrical test method (Section 2.2), it is best used with another test method. Alternative bias and redundancy bias are both easy to implement, however the readout circuitry of redundancy bias might be a bit more complex. Actuating bias is the slowest option and a working solution requires not only a test signal evaluator, but an additional test signal generator circuitry on board as well.

6. BIST Method Building on Multi-Functional Sensors

Redundancy of components in an electronic device leads to fault tolerance. If, after the implementation of a BIST method, a defective component is detected, one strategy is to isolate this faulty component from the rest of the device and carry on device operation using the remaining functional components [90].
In the case of MEMS, the manufacture of multiple identical sensors on the same die might be space or cost prohibitive. However, if the DUT has already multiple sensors for the purpose of sensing more than one physical parameters, one strategy is to use the inherent redundancy of sensing modalities possessed by these sensors that are sensitive to physical quantities purposely measured by other sensors. The effect when sensing elements are sensitive to more than one physical quantity is called cross-sensitivity, while the sensors themselves are called multi-modal sensing elements [91]. Cross-sensitivity is usually considered a problem in multi-sensor structures and approaches are made to overcome its effects [92]. For BIST, cross-sensitivity can be exploited as a substitute for redundancy. Extensive research has been carried out in the field of multi-functional sensors (MFS) at Lancaster University by Richardson et al., an example of which is provided in Figure 22 [93,94,95].
In this figure, each sensor has not only a primary sensing function but can also measure secondary parameters through either additional modes or cross-sensitivities. For example, the sensor on the left would sense primarily pressure, but also temperature. The sensor in the middle would sense temperature but also humidity, and the sensor on the right-hand side would sense humidity but also pressure. The use of multiple MFS is to increase fault tolerance, such that, if one sensor fails, the system tries to recreate the correct measurement of humidity, pressure and temperature by using the outputs of the remaining sensors. In order to achieve this, the measurement data from each sensor are first pre-processed and then passed through a data fusion algorithm to compare the measurements from each sensing element and produce an output. Pre-defined coefficients are used for sensor calibration at default. The data fusion algorithm detects whether a sensor is defective or not based on comparison.
This BIST technique can also be enlarged for built-in self-repair (BISR) in the following manner. When a faulty sensor is detected, sensitivity coefficients are calibrated for that sensor. If the modified coefficients lead to a sensor output that is in the acceptable range, the sensor output is used for further measurements (recovered from failure state); otherwise, the sensor needs to be replaced in the next maintenance. The data from the sensor coefficient recalibration algorithm can not only be utilized for monitoring the health state of each sensor, but also for prognosis, thereby enabling the calculation of the residual useful life (RUL) and end of life (EOL) of the MEMS [96,97,98].
In summary, this BIST method relies on the plurality of sensing modalities inherent in some sensors. The test method has the advantage of being extendable to MEMS BISR and prognosis. This method can, however, only be applied to MEMS capable of accommodating sensors with cross-sensitivity with different sensing elements.

7. Classification and Benchmarking of the BIST Methods

Several performance metrics can be used to benchmark the various BIST methods presented in the previous sections. Some metrics such as test duration or power consumption of the test methods, are measurable quantities, although their values can be dependent on the technology used and SNR requested. Other metrics, like “ease of implementation” or “usefulness”, are more subjective. Such metrics can nevertheless be provided with an ordinal value set up by consulting engineering teams. In the case of “ease of implementation”, the range was from 3 (easy) to 1 (difficult). A 5-point cumulative score was used for the “usefulness” metric, depending on the type of faults covered by the BIST method and the additional functionalities that the method can provide potentially. A high score for each of these metrics indicate therefore that the method is highly desirable. These last two metrics are first described and presented in Table 1 and Table 2, followed by the measurable performance metrics.
Following this benchmarking exercise, the various applications of the BIST methods are presented and classified according as to whether they are run during system operation, at the device assembly phase or during power-on. Finally, a classification table summarising the findings of this review article is provided in Table 3 at the end of this section.

7.1. Benchmarking Methodology of the BIST Methods

This subsection introduces three benchmarking criteria for BIST methods. The criteria were designed to provide a quantitative evaluation between the different methods that are otherwise hard to compare.

7.1.1. Ease of Implementation

The ease of implementation of a test method for MEMS is an important consideration for selection of the BIST techniques. Some methods require either slight modification or radical redesign of the MEMS when additional sensors are required, resulting in additional real estate on the die. Other methods require new test signals or modification of existing signals necessitating perhaps additional electronic circuitry. A quantification of this “ease of implementation” is presented here and consists of a scoring scheme with each level assigned to a level of difficulty, ranging from 1 (difficult) to 3 (easy). The scoring method is presented in Table 1 and enables the objective scoring of this performance metric.

7.1.2. Usefulness

The degree of “usefulness” of a BIST method for MEMS was broken into two main categories: whether it supports parametric fault detection or catastrophic fault detection only. The latter property provides only a pass/fail information about the MEMS, whereas the former can be used to detect deviations from system specifications. Parametric fault detection methods are the pillars for embedded intelligence in MEMS. These techniques make it possible to include additional support and evaluation tools, such as on-line health monitoring, BISR, RUL, self-tuning and EOL prediction. Multi-modal sensing was included in the evaluation list due to its benefits in not only in BIST but BISR support. The two main categories each are worth 1 point and one point is awarded for each additional support tool included. This creates a ranking system from 1–5 with 1 being the lowest score and 5 being the highest. The scoring system is shown in Table 2.

7.1.3. Test Duration

Test duration defines the domain of application of the BIST method with tests with long duration are preferably applied when the device is powered on. This quantity is less important however in cases where the test method does not perturb the normal operation of the MEMS and is running concomitantly. The durations of the test indicated in the classification table have been either taken from literature or estimated.

7.1.4. Power Consumption

Power consumption is a critical aspect of the test. The MEMS should not have heat dissipation problems due to increased power demand from the test. Depending on the application and assuming that the BIST method is applied to mobile devices, the test should not put an undue increased load on the battery. Unfortunately, no data were available regarding power consumption for the various BIST methods reviewed. The classification table therefore does not figure this important performance metric.

7.2. Classification of the BIST Methods

The applications of the BIST methods have been categorised as to whether they are implemented on the run (field test), during power-on of the system or during the manufacturing/assembly phase of the MEMS.

7.2.1. Field Test

Tests happening on the run are referred to as field tests. The device is in use or assumed that it can be used anytime. The test duration must therefore be very short as the test must not interfere with the user experience of the device. A typical test duration of less than 100 ms would be deemed to be acceptable. Test methods used in field tests have been labelled A in the classification table.

7.2.2. Power-On Test

A power-on test occurs during the switch-on phase of the system. As such, an extended amount of test time is available and could range from 100 ms up to 30 s. Test methods in that category have been labelled B in the classification table.

7.2.3. Assembly Phase Test

Testing happening during the manufacturing or assembly phase of the device has virtually unlimited test time and power consumption. The device is not in use and is usually connected to an external power source. A label C has been indicated for these types of test methods in the classification table.

8. General Conclusions

From this review, it is quite clear that there is no absolute “best BIST” method. The most suitable test technique for implementation is likely to be based on the MEMS sensing and actuating properties and the domain of application, as well as the MEMS failure modes to be monitored or detected. Some of the BIST methods come with an increased number of manufacturing steps and with an overhead in term of die area, resulting perhaps in cost increase. This review article did not attempt to quantify such costs. The expenditure introduced by the additional functionalities should be offset however by the reduced yield loss and increase device lifetime provided by the BIST methods. A quick summary of the advantages of the various methods is provided in this final section and should be read alongside the classification table.
Parameter extraction comes with probably the most complex circuitry regarding evaluation of the output signal. However, the test method can extract important information regarding physical parameters of the device and enable RUL estimation. Symmetrical test method is only advised in combination with single-ended testing and is able not only to detect hard to detect faults, but to characterise/configure the system provided that it has some form of symmetry. For certain systems, where the number of failure modes is limited (e.g., electrode degradation), indirect parameter measurement can be a good an inexpensive option. Delay based methods present one of the fastest ways of self-testing. Only suitable for capacitive MEMS and therefore inadequate for complete system characterisation, they require additional circuitry to convert capacitance variations into time differences. It is hard to draw conclusions about pulse excitation due to the lack of literature on MEMS applications, but the pseudo-random test method shows great promise on system impulse response extraction, thus it is suitable not only for catastrophic fault detection, but also for system characterisation. The test time duration depends on the number of bits used for the MLS, which is device-dependent.
All the previously mentioned methods are intrusive and require a normal operation of the device to stop while the test is running. A great alternative is the superposition test methods that offer an on-line test solution mostly with minimum overhead. They are capable of catastrophic fault detection. Finally, multimodality sensing, albeit not a requirement for BIST, can play an important role in BIST and BISR. Through cross-sensitivity, the overhead of redundancy can be reduced while maintaining its benefits.
This review article approached BIST strategies from a single device point of view, however one might not be limited to a particular MEMS unit. The BIST method could easily take place in a different system component, along with the electronic processing enabling decision making. With proper communication between the components of the system, the evaluation and decision making could easily run on a processor that is dedicated for another work, during its idle period. Such communication approaches and the required interfaces already exist. One of these approaches is coming from the MIPI alliance, an organisation working on hardware and software interfaces that make the integration of components into a mobile device simpler [99]. Perhaps such an approach will pave the way for the future of BIST methods in MEMS.

Author Contributions

Conceptualization, G.H. and M.P.Y.D..; methodology, G.H. and M.P.Y.D..; investigation, G.H..; article curation, D.F., article iterations, G.H., M.P.Y.D. and D.F. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded in part by the Engineering and Physical Sciences Research Council under the Centre for Doctoral Training in Embedded intelligence (CDT-EI) under the grant number 1799140.

Conflicts of Interest

The authors declare no conflict of interest.

Abbreviations

ACAlternating Current
ATPGAutomatic Test Pattern Generation
BISRBuilt-In Self-Repair
BISTBuilt-In Self-Test
CMOSComplementary Metal-Oxide-Semiconductor
CRCCyclic Redundancy Check
DCDirect Current
DDMDelay Detection Module
DLLDelay Locked Loop
DUTDevice Under Test
EOLEnd of Life
HABISTHistogram-Based Analog BIST
HVCPHigh Voltage Charge Pump
ICIntegrated Circuit
IRImpulse Response
JTAGJoint Test Action Group
LBISTLogic BIST
LIRMMLaboratoire d’Informatique, de Robotique et de Microélectronique de Montpellier
LFSRLinear Feedback Shift Register
LTILinear Time Invariant
MBISTMemory BIST
MBISRMemory Built-In Self-Repair
MEMSMicro-Electro-Mechanical Systems
MFSMulti-Functional Sensor
MLSMaximum Length Sequence
OTMOscillation-Based Test Method
PBISTProgrammable BIST
PEPulse Extraction
PFDPhase-Frequency-Detector
PVTProcess, Supply Voltage and Temperature
PLLPhase-Locked Loop
PRPGPseudo-Random Pattern Generator
RFRadio Frequency
RULRemaining Useful Life
SNRSignal-to-Noise Ratio
TDCTime-to-Digital Converter
TSMCTaiwan Semiconductor Manufacturing Company
VCOVoltage-Controlled Oscillator

References

  1. Balavalad, K.B.; Sheeparamatti, B.G. A Critical Review of MEMS Capacitive Pressure Sensors. Sens. Transducers J. 2015, 187, 120–128. [Google Scholar]
  2. Salomon, P.; Bazu, M.; van Heeren, H.; Lavu, S.; Bunyan, J.; Desmulliez, M. The reliability of micro nano systems. Int. Mag. Smart Syst. Technol. MST/NEWS 2008, 4, 20–22. [Google Scholar]
  3. Lavu, S.; Desmulliez, M.; Begbie, M.; Ball, G.; de Wolf, I. Avoiding MEMS failures. IEE Electron. Syst. Softw. 2005, 3, 22–25. [Google Scholar] [CrossRef]
  4. Moyer, B. The MEMS Testing Quagmire. 2011. Available online: https://www.eejournal.com/article/20111219-mems/ (accessed on 12 July 2020).
  5. Lawes, R.A. MEMS Cost Analysis: From Laboratory to Industry; CRC Press: New York, NY, USA, 2014. [Google Scholar]
  6. Analysis of MEMS Test Equipment Market. 2008. Available online: https://www.fierceelectronics.com/components/analysis-mems-test-equipment-market (accessed on 12 July 2020).
  7. Allen, H.V.; Terry, S.C.; de Bruin, D.W. Self-Testable Accelerometer Systems. In IEEE Micro Electro Mechanical Systems, Proceedings, An Investigation of Micro Structures, Sensors, Actuators, Machines and Robots, Salt Lake City, UT, USA, 20–22 February 1989; IEEE: Piscataway, NJ, USA, 2002; Volume 20, pp. 153–161. [Google Scholar] [CrossRef]
  8. Stroud, C.E. A Designer’s Guide to Built-In Self-Test; Kluwer Academic Publishers: Norwell, MA, USA, 2002; Volume 19. [Google Scholar]
  9. Benso, A.; Chinsano, S.; di Natale, G.; Prinetto, P.; Bodoni, M.L. Online and offline BIST in IP-core design. IEEE Des. Test Comput. 2001, 18, 92–99. [Google Scholar] [CrossRef]
  10. Frohwerk, R.A. Signature Analysis: A New Digital Field. Hewlett Packard J. 1998, 2–8. Available online: https://doc.xdevs.com/docs/HP_Agilent_Keysight/journals/HP%20Journal%20-%20Signature%20Analysis%20May77.pdf (accessed on 12 July 2020).
  11. McCluskey, E. Built-In Self-Test Techniques. IEEE Des. Test Comput. 1985, 2, 21–28. [Google Scholar] [CrossRef]
  12. Frisch, A.; Almy, T. HABIST: Histogram-Based Analog Built in Self Test. In Proceedings International Test Conference 1997, Washington, DC, USA, 6 November 1997; IEEE: Piscataway, NJ, USA, 1997; pp. 760–767. [Google Scholar]
  13. Wang, L. Logic Built-In Self-Test. In VLSI Test Principles and Architectures; Morgan Kaufmann: Burlington, MA, USA, 2006; pp. 263–340. [Google Scholar]
  14. Masnita, M.I.; Zuha, W.H.W.; Sidek, R.M.; Halin, I.A. The Data and Read/Write Controller for March-Based SRAM Diagnostic Algorithm MBIST. In Proceedings 2009 IEEE Student Conference on Research and Development (SCOReD), Serdang, Malaysia, 16–18 November 2009; IEEE: Piscataway, NJ, USA, 2009; pp. 296–299. [Google Scholar] [CrossRef]
  15. Subir, K.R. Integration Verification in System on Chips Using Formal Techniques Micro Electron. Mech. Syst. 2009, 405–430. [Google Scholar] [CrossRef]
  16. Wehage, E. Built-in Self Test Parallel JTAG Serial Chain Architecture for Reduced Test Vector Size. U.S. Patent Application No. 2003/0172333/A1, 11 September 2003. [Google Scholar]
  17. Das, D.; Touba, N.A. Reducing Test Data Volume Using External/LBIST hybrid Test Patterns. In Proceedings of the International Test Conference 2000 (IEEE Cat. No.00CH37159), Atlantic City, NJ, USA, 3–5 October 2000; IEEE: Piscataway, NJ, USA, 2000. [Google Scholar] [CrossRef]
  18. Block, S.G.; Rueveni, D.R. Logic Built-In Self Test (Bist). U.S. Patent Application No. 6,904,554 B2, 4 December 2005. [Google Scholar]
  19. Li, N.; Carlsson, G.; Dubrova, E.; Petersen, K. Logic BIST: State-of-the-Art and Open Problems. arXiv 2015, arXiv:1503.04628. [Google Scholar]
  20. Acharya, G.P.; Rani, M.A. Survey of Test Strategies for System-on Chip and It’s Embedded Memories. In Proceedings of the 2013 IEEE Recent Advances in Intelligent Computational Systems (RAICS), Trivandrum, India, 19–21 December 2013; IEEE: Piscataway, NJ, USA, 2013; pp. 199–204. [Google Scholar] [CrossRef]
  21. Zorian, Y.; Shoukourian, S. Embedded-memory test and repair: Infrastructure IP for SoC yield. IEEE Des. Test Comput. 2003, 20, 1198687. [Google Scholar] [CrossRef]
  22. Benso, A.; Chiusano, S.; di Natale, G.; Prinetto, P. An on-line BIST RAM architecture with self-repair capabilities. IEEE Trans. Reliab. 2002, 51, 123–128. [Google Scholar] [CrossRef]
  23. Charlot, B.; Mir, S.; Parrain, F.; Courtois, B. Electrically Induced Stimuli for MEMS Self-Test. In Proceedings of the 19th IEEE VLSI Test Symposium. VTS 2001, Marina Del Rey, CA, USA, 29 April–3 May 2001; IEEE: Piscataway, NJ, USA, 2002; pp. 210–215. [Google Scholar] [CrossRef]
  24. Charlot, B.; Mir, S.; Parrain, F.; Courtois, B. Generation of electrically induced stimuli for MEMS self-test. J. Electron. Test 2001, 17, 459–470. [Google Scholar] [CrossRef]
  25. Mir, S.; Rufer, L.; Dhayni, A. Built-in-self-test techniques for MEMS. Microelectron. J. 2006, 37, 591–1597. [Google Scholar] [CrossRef]
  26. Analog Devices, Monolithic Accelerometer with Signal Conditioning. In ADXL50 Tech Note; Analog Devices Inc.: Norwood, MA, USA, 1996.
  27. Puers, R.; Reyntjens, S.; Bruyker, D.D. Remote Sensors with Self-Test: New Opportunities to Improve the Performance of Physical Transducers. Adv. Eng. Mater. 2001, 3, 788–795. [Google Scholar] [CrossRef]
  28. Lapadatu, A.C.; de Bruyker, D.; Jakobsen, H.; Puers, R. A new concept for a self-testable pressure sensor based on the bimetal effect. Sens. Actuators Phys. 2000, 82, 69–73. [Google Scholar] [CrossRef]
  29. Charlot, B.; Parrain, F.; Mir, S.; Courtois, B. Self-Testable CMOS Thermopile-Based Infrared Imager. In Design, Test, Integration, and Packaging of MEMS/MOEMS 2001, Cannes-Mandelieu, France, 25–27 April 2001; Society of Photo-Optical Instrumentation Engineers: Bellingham, WA, USA, 2001; pp. 96–103. [Google Scholar] [CrossRef]
  30. Ozel, M.K.; Cheperak, M.; Dar, T.; Kiaei, S.; Bakkaloglu, B.; Ozev, S. An Electrical-Stimulus-Only BIST IC for Capacitive MEMS Accelerometer Sensitivity Characterization. IEEE Sens. J. 2017, 17, 695–708. [Google Scholar] [CrossRef] [Green Version]
  31. Zimmermann, L.; Ebersohl, J.P.; le Hung, F.; Berry, J.P.; Baillieu, F.; Rey, P.; Diem, B.; Renard, S.; Caillat, P. Airbag application: A microsystem including a silicon capacitive accelerometer, CMOS switched capacitor electronics and true self-test capability. Sens. Actuators Phys. 1995, 46, 190–195. [Google Scholar] [CrossRef]
  32. Deb, N.; Blanton, R.D.S. High-Level Fault Modeling in Surface-Micromachined MEMS. In Proceedings of the SPIE 4019, Design, Test, Integration, and Packaging of MEMS/MOEMS, Paris, France, 9–11 May 2000; Society of Photo-Optical Instrumentation Engineers: Bellingham, WA, USA, 2000; pp. 228–235. [Google Scholar] [CrossRef]
  33. Deb, N.; Blanton, R.S. High-level fault modeling in surface-micromachined MEMS. Analog Integr. Circuits Signal Process. 2001, 29, 151–158. [Google Scholar] [CrossRef]
  34. Muratet, S.; Fourniols, J.-Y.; Soto-Romero, G.; Endemaño, A.; Marty, A.; Desmulliez, M. MEMS reliability modelling methodology: Application to wobble micromotor failure analysis. Microelectron. Reliab. 2003, 43, 1945–1949. [Google Scholar] [CrossRef]
  35. Muratet, S.; Lavu, S.; Fourniols, J.Y.; Bell, G.; Desmulliez, M.P.Y. Reliability modelling and analysis of thermal MEMS. J. Phys. Conf. Ser. 2006, 34, 235–240. [Google Scholar] [CrossRef]
  36. de Bruyker, D.; Cozma, A.; Puers, R. A combined piezoresistive/capacitive pressure sensor with self-test function based on thermal actuation. Sens. Actuators Phys. 1998, 66, 70–75. [Google Scholar] [CrossRef]
  37. Deb, N.; Blanton, R.D. Built-In Self Test Of MEMS. U.S. Patent Application No. 2004/0113647/A1, 17 June 2014. [Google Scholar]
  38. Deb, N.; Blanton, R.D. Built-in Self Test of CMOS-MEMS Accelerometers. In Proceedings of the IEEE International Test Conference, Baltimore, MD, USA, 7–10 October 2002; IEEE: Piscataway, NJ, USA, 2002; pp. 1075–1084. [Google Scholar] [CrossRef]
  39. Deb, N.; Blanton, R.D. Built-In Self-Test of MEMS Accelerometers. J. Microelectromechanical Syst. 2006, 15, 52–68. [Google Scholar] [CrossRef]
  40. Deb, N.; Blanton, R.D. Multi-Modal Built-in Self-Test for Symmetric Microsystems. In Proceedings of the 22nd IEEE VLSI Test Symposium, 2004. Proceedings, Napa Valley, CA, USA, 25–29 April 2004; IEEE: Piscataway, NJ, USA, 2004; pp. 139–147. [Google Scholar] [CrossRef]
  41. Xiong, X.; Wu, Y.-L.; Jone, W.-B. A Dual-Mode Built-in Self-Test Technique for Capacitive MEMS Devices. In Proceedings of the 22nd IEEE VLSI Test Symposium, 2004. Proceedings, Napa Valley, CA, USA, 25–29 April 2004; IEEE: Piscataway, NJ, USA, 2004; pp. 148–153. [Google Scholar] [CrossRef]
  42. Xiong, X.; Wu, Y.-L.; Jone, W.-B. A dual-mode built-in self-test technique for capacitive MEMS device. IEEE Trans. Instrum. Meas. 2005, 54, 1739–1750. [Google Scholar] [CrossRef]
  43. Natarajan, V.; Bhattacharya, S.; Chatterjee, A. Alternate Electrical Tests for Extracting Mechanical Parameters of MEMS Accelerometer Sensors. In Proceedings of the 24th IEEE VLSI Test Symposium, Berkeley, CA, USA, 30 April–4 May 2006; IEEE: Piscataway, NJ, USA, 2006; pp. 192–199. [Google Scholar] [CrossRef]
  44. Friedman, J.H. Multivariate adaptive regression splines. Ann. Stat. 1991, 19, 1–67. [Google Scholar] [CrossRef]
  45. Variyam, P.N.; Cherubal, S.; Chatterjee, A. Prediction of analog performance parameters using fast transient testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2002, 21, 349–361. [Google Scholar] [CrossRef] [Green Version]
  46. Han, D.; Chatterjee, A. Robust Built-In Test of RF ICs Using Envelope Detectors. In Proceedings of the 14th Asian Test Symposium (ATS’05), Calcutta, India, 18–21 December 2005; IEEE: Piscataway, NJ, USA, 2005; pp. 2–7. [Google Scholar] [CrossRef]
  47. Beroulle, V.; Bertrand, Y.; Latorre, L.; Nouet, P. Evaluation of the Oscillation-Based Test Methodology for Micro-Electro-Mechanical Systems. In Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Monterey, CA, USA, 28 April–2 May 2002; IEEE: Piscataway, NJ, USA, 2002; pp. 439–444. [Google Scholar] [CrossRef]
  48. Beroulle, V.; Bertrand, Y.; Latorre, L.; Nouet, P. On the Use of an Oscillation-Based Test Methodology for CMOS Micro-Electro-Mechanical Systems. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, Paris, France, 4–8 March 2002; IEEE: Piscataway, NJ, USA, 2002; p. 1120. [Google Scholar] [CrossRef]
  49. Gayem, Q.A.; Liu, H.; Richardson, A.; Burd, N. Test Strategies for Electrode Degradation in Bio-Fluidic Microsystems. J. Electron. Test. 2011, 27, 57–68. [Google Scholar] [CrossRef]
  50. Gayem, Q.A.; Liu, H.; Khan, H.; Richardson, A. Scanning the Strength of a Test Signal to Monitor Electrode Degradation within Bio-Fluidic Microsystems. In Proceedings of the IEEE 19th International On-Line Testing Symposium (IOLTS), Crete, Greece, 8–10 July 2013; IEEE: Piscataway, NJ, USA, 2013; pp. 133–138. [Google Scholar] [CrossRef]
  51. Gayem, Q.A.; Richardson, A.; Liu, H. Neural-Network Fault Diagnosis for Electrode Structures in Bio-fluidic Microsystems. In Proceedings of the IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop, Santa Barbara, CA, USA, 16–18 May 2011; IEEE: Piscataway, NJ, USA, 2011; pp. 143–148. [Google Scholar] [CrossRef]
  52. Gayem, Q.A.; Liu, H.; Richardson, A.; Burd, N. Built-in Test Solutions for the Electrode Structures in Bio-Fluidic Microsystems. In Proceedings of the 14th IEEE European Test Symposium, Sevilla, Spain, 25–29 May 2009; IEEE: Piscataway, NJ, USA, 2009; pp. 73–78. [Google Scholar] [CrossRef]
  53. Gayem, Q.A.; Richardson, A.; Liu, H.; Burd, N. An Oscillation-Based Technique for Degradation Monitoring of Sensing and Actuation Electrodes Within Microfluidic Systems. J. Electron. Test. 2011, 27, 375–387. [Google Scholar] [CrossRef]
  54. Gayem, Q.A.; Liu, H.; Richardson, A.; Burd, N.; Kumar, M. An On-Line Monitoring Technique for Electrode Degradation in Bio-Fluidic Microsystems. In Proceedings of the IEEE International Test Conference, Austin, TX, USA, 2–4 November 2010; IEEE: Piscataway, NJ, USA, 2010; pp. 1–10. [Google Scholar] [CrossRef] [Green Version]
  55. Liu, H.; Richardson, A.; Harvey, T.; Ryan, T.; Pickering, C. Embedded Test & Health Monitoring Strategies for Bio-Fluidic Microsystems. In Proceedings of the 2nd Electronics System-Integration Technology Conference, Greenwich, UK, 1–4 September 2008; IEEE: Piscataway, NJ, USA, 2008; pp. 427–434. [Google Scholar]
  56. Yang, H.-H.; Yahiaoui, A.; Zareie, H.; Blondy, P.; Rebeiz, G.M. Symmetric and Compact Single-Pole Multiple-Throw (SP7T, SP11T) RF MEMS Switches. J. Microelectromechanical Syst. 2015, 24, 685–695. [Google Scholar] [CrossRef] [Green Version]
  57. Wong, W.S.H.; Lee, K.C.; Su, H.T.; Ali, M.A.M. A Built-in Self Repairable RF MEMS Filter Using Redundant Structures. In Proceedings of the IEEE International Conference on Semiconductor Electronics, Johor Bahru, Malaysia, 25–27 November 2008; IEEE: Piscataway, NJ, USA, 2008; pp. 158–160. [Google Scholar] [CrossRef]
  58. Jia, C.; Milor, L. A DLL Design for Testing I/O Setup and Hold Times. IEEE Trans. Very Large Scale Integr. VLSI Syst. 2009, 17, 1579–1592. [Google Scholar] [CrossRef]
  59. Nelson, B.; Soma, M. On-Chip Calibration Technique for Delay Line Based BIST Jitter Measurement. In Proceedings of the IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512), Vancouver, BC, Canada, 23–26 May 2004; IEEE: Piscataway, NJ, USA, 2004; pp. I-944–I-947. [Google Scholar] [CrossRef]
  60. Jia, C.; Milor, L. A Bist Solution for the Test of I/O Speed. In Proceedings of the International Test Conference, 2003. Proceedings. ITC 2003, Charlotte, NC, USA, 28 September–3 October 2003; IEEE: Piscataway, NJ, USA, 2003; Volume 1, pp. 1023–1030. [Google Scholar] [CrossRef]
  61. Dianat, A.; Attaran, A.; Rashidzadeh, R. Test Method for Capacitive MEMS Devices Utilizing Pierce Oscillator. In Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, Portugal, 24–27 May 2015; IEEE: Piscataway, NJ, USA, 2015; pp. 633–636. [Google Scholar] [CrossRef]
  62. Basith, I.I.; Kandalaft, N.; Rashidzadeh, R. Built-In Self-Test for Capacitive MEMS Using a Charge Control Technique. In Proceedings of the 19th IEEE Asian Test Symposium, Shanghai, China, 1–4 December 2010; IEEE: Piscataway, NJ, USA, 2010; pp. 135–140. [Google Scholar] [CrossRef]
  63. Supon, T.M.; Rashidzadeh, R. A Phase Locking Test Solution for MEMS Devices. In Proceedings of the 22nd IEEE European Test Symposium (ETS), Limassol, Cyprus, 22–26 May 2017; IEEE: Piscataway, NJ, USA, 2017; pp. 1–6. [Google Scholar] [CrossRef]
  64. Supon, T.M.; Thangarajah, K.; Rashidzadeh, R.; Ahmadi, M. A PLL Based Readout and Built-in Self-Test for MEMS Sensors. In Proceedings of the IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS), Seoul, Korea, 7–10 August 2011; IEEE: Piscataway, NJ, USA, 2011; pp. 1–4. [Google Scholar] [CrossRef]
  65. Basith, I.I.; Kandalaft, N.; Rashidzadeh, R.; Ahmadi, M. Charge-Controlled Readout and BIST Circuit for MEMS Sensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2013, 32, 433–441. [Google Scholar] [CrossRef]
  66. Rashidzadeh, R.; Jedari, E.; Supon, T.M.; Mashkovtsev, V. A DLL-Based Test Solution for through Silicon via (TSV) in 3D-Stacked ICs. In Proceedings of the IEEE International Test Conference (ITC), Anaheim, CA, USA, 6–8 October 2015; IEEE: Piscataway, NJ, USA, 2015; pp. 1–9. [Google Scholar] [CrossRef]
  67. Roberts, G.W.; Ali-Bakhshian, M. A Brief Introduction to Time-to-Digital and Digital-to-Time Converters. IEEE Trans. Circuits Syst. II Express Briefs 2010, 57, 153–157. [Google Scholar] [CrossRef]
  68. Khaira, N.K.; Singh, T.; Mansour, R.R. Monolithically Integrated RF MEMS-Based Variable Attenuator for Millimeter-Wave Applications. IEEE Trans. Microw. Theory Tech. 2019, 67, 3251–3259. [Google Scholar] [CrossRef]
  69. Singh, T.; Mansour, R.R. Modeling of Frequency Shift in RF-MEMS Switches Under Residual Stress Gradient. In Proceedings of the 18th International Symposium on Antenna Technology and Applied Electromagnetics (ANTEM), Waterloo, ON, Canada, 19–22 August 2018; IEEE: Piscataway, NJ, USA, 2018; pp. 1–2. [Google Scholar] [CrossRef]
  70. Singh, T.; Khaira, N.K.; Mansour, R.R. Thermally Actuated SOI RF MEMS-Based Fully Integrated Passive Reflective-Type Analog Phase Shifter for mmWave Applications. IEEE Trans. Microw. Theory Tech. 2020, 1. [Google Scholar] [CrossRef]
  71. SIslam, Z.; Wong, W.; Tiong, S.H.; Ali, M.A.M. Faults Detection Approach for Self-Testable RF MEMS. In Proceedings of the IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, 29 November–1 December 2006; IEEE: Piscataway, NJ, USA, 2006; pp. 329–333. [Google Scholar] [CrossRef]
  72. Dhayni, A.; Mir, S.; Rufer, L. Evaluation of Impulse Response-Based BIST Techniques for MEMS in the Presence of Weak Nonlinearities. In Proceedings of the European Test Symposium (ETS’05), Tallinn, Estonia, 22–25 May 2005; IEEE: Piscataway, NJ, USA, 2005; pp. 82–87. [Google Scholar] [CrossRef]
  73. Salvia, J.; Cagdaser, B.; Khenkin, A.S. Electrical Testing and Feedthrough Cancellation for an Acoustic Sensor. U.S. Patent Application No. 20170251316, 23 May 2017. [Google Scholar]
  74. Dhayni, A.; Mir, S.; Rufer, L. Mems Built-in-Self-Test Using MLS. In Proceedings of the Ninth IEEE European Test Symposium, 2004. ETS 2004, Corsica, France, 23–36 May 2004; IEEE: Piscataway, NJ, USA, 2004; pp. 66–71. [Google Scholar] [CrossRef]
  75. Rufer, L.; Mir, S.; Simeu, E.; Domingues, C. On-Chip Pseudorandom MEMS Testing. TIMA Lab. Research Reports 2004. Available online: http://tima.univ-grenoble-alpes.fr/publications/files/rr/ocp_174.pdf (accessed on 28 April 2017).
  76. Rufer, L.; Mir, S.; Simeu, E.; Domingues, C. On-Chip Pseudorandom MEMS Testing. J. Electron. Test. 2005, 21, 233–241. [Google Scholar] [CrossRef]
  77. Dhayni, A.; Mir, S.; Rufer, L.; Bounceur, A. On-chip Pseudorandom Testing for Linear and Nonlinear MEMS. In Vlsi-Soc: From Systems to Silicon; Reis, R., Osseiran, A., Pfleiderer, H.-J., Eds.; Springer: Boston, MA, USA, 2007; Volume 240, pp. 245–266. [Google Scholar]
  78. Rufer, L.; Mir, S.; Simeu, E.; Domingues, C. On-Chip Testing of MEMS Using Pseudo-Random Test Sequences. In Proceedings of the Symposium on Design Test, Integration and Packaging of MEMS/MOEMS 2003, Cannes, France, 5–7 May 2003; IEEE: Piscataway, NJ, USA, 2003; pp. 50–55. [Google Scholar] [CrossRef] [Green Version]
  79. Dhayni, A.; Mir, S.; Rufer, L.; Bounceur, A.; Simeu, E. Pseudorandom BIST for test and characterization of linear and nonlinear MEMS. Microelectron. J. 2009, 40, 1054–1061. [Google Scholar] [CrossRef]
  80. Dhayni, A.; Mir, S.; Rufer, L.; Bounceur, A. Pseudorandom Functional BIST for Linear and Nonlinear MEMS. In Proceedings of the Design Automation & Test in Europe Conference, Munich, Germany, 6–10 March 2006; IEEE: Piscataway, NJ, USA, 2006; pp. 1–6. [Google Scholar] [CrossRef]
  81. Pan, C.-Y.; Cheng, K.-T. Pseudo-Random Testing and Signature Analysis for Mixed-Signal Circuits. In Proceedings of the IEEE International Conference on Computer Aided Design (ICCAD), San Jose, CA, USA, 5–9 November 1995; IEEE: Piscataway, NJ, USA, 2002; pp. 102–107. [Google Scholar] [CrossRef] [Green Version]
  82. Jeffrey, C.; Dumas, N.; Xu, Z.; Mailly, F.; Azaïs, F.; Nouet, P.; Bunyan, R.J.T.; King, D.O.; Mathias, H.; Gilles, J.P.; et al. Sensor testing through bias superposition. Sens. Actuators Phys. 2007, 136, 441–455. [Google Scholar] [CrossRef]
  83. Dumas, N.; Xu, Z.; Georgopoulos, K.; Bunyan, R.J.T.; Richardson, A. A Novel Approach for Online Sensor Testing Based on an Encoded Test Stimulus. In Proceedings of the 12th IEEE European Test Symposium (ETS’07), Freiburg, Germany, 20–24 May 2007; IEEE: Piscataway, NJ, USA, 2007; pp. 105–110. [Google Scholar] [CrossRef]
  84. Jeffrey, C.; Xu, Z.; Richardson, A. Bias Superposition—An On-Line Test Strategy for a MEMS Based Conductivity Sensor. In Proceedings of the European Test Symposium (ETS’05), Tallinn, Estonia, 22–25 May 2005; IEEE: Piscataway, NJ, USA, 2005; pp. 88–93. [Google Scholar] [CrossRef]
  85. Dumas, N.; Azais, F.; Latorre, L.; Nouet, P. On-Chip Electro-Thermal Stimulus Generation for a MEMS-Based Magnetic Field Sensor. In Proceedings of the 23rd IEEE VLSI Test Symposium (VTS’05), Palm Springs, CA, USA, 1–5 May 2005; IEEE: Piscataway, NJ, USA, 2005; pp. 213–218. [Google Scholar] [CrossRef]
  86. Beroulle, V.; Bertrand, Y.; Latorre, L.; Nouet, P. Test and Testability of a Monolithic MEMS for Magnetic Field Sensing. J. Electron. Test. 2001, 17, 439–450. [Google Scholar] [CrossRef]
  87. Beroulle, V.; Bertrand, Y.; Latorre, L.; Nouet, P. Micromachined CMOS Magnetic Field Sensors with Low-Noise Signal Conditioning. In Proceedings of the Technical Digest. MEMS 2002 IEEE International Conference. Fifteenth IEEE International Conference on Micro Electro Mechanical Systems (Cat. No.02CH37266), Las Vegas, NV, USA, 24 January 2002; IEEE: Piscataway, NJ, USA, 2002; pp. 256–259. [Google Scholar] [CrossRef]
  88. Dumas, N.; Xu, Z.; Georgopoulos, K.; Bunyan, R.J.T.; Richardson, A. Online Testing of MEMS Based on Encoded Stimulus Superposition. J. Electron. Test. 2008, 24, 555–566. [Google Scholar] [CrossRef]
  89. Jeffrey, C.; Xu, Z.; Richardson, A. Using bias superposition to test a thick film conductance sensor. J. Phys. Conf. Ser. 2005, 15, 161–166. [Google Scholar] [CrossRef]
  90. Zorian, Y. Built-in self-test. Microelectron. Eng. 1999, 49, 35–138. [Google Scholar] [CrossRef]
  91. Sun, J.; Shida, K. Multi-Layer Sensing Approach for Environmental Perception via a Multi-Functional Sensor. In SICE 2000, Proceedings of the 39th SICE Annual Conference. International Session Papers (IEEE Cat. No.00TH8545), Iizuka, Japan, 28–28 July 2000; IEEE: Piscataway, NJ, USA, 2000; pp. 241–246. [Google Scholar] [CrossRef]
  92. Hautefeuille, M. Development of a MEMS-based multisensor platform for environmental monitoring. Micromachines 2011, 2, 410–430. [Google Scholar] [CrossRef]
  93. Xu, Z.; Koltsov, D.; Richardson, A.; Le, L.; Begbie, M. Design and Simulation of a Multi-Function MEMS Sensor for Health and Usage Monitoring. In Proceedings the Prognostics and System Health Management Conference, Macao, China, 12–14 January 2010; IEEE: Piscataway, NJ, USA, 2010; pp. 1–7. [Google Scholar] [CrossRef] [Green Version]
  94. Xu, Z.; Richardson, A.; Begbie, M.; Wang, C. Move from Online Test to Fault-Tolerant: Design and Simulation of a Multi-functional MEMS Sensor. In Proceedings of the IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop, Santa Barbara, CA, USA, 16–18 May 2011; IEEE: Piscataway, NJ, USA, 2011; pp. 88–95. [Google Scholar] [CrossRef]
  95. Khan, H.A.; Tahir, I.; Richardson, A. Use of Self-Calibration Data for Multifunctional MEMS Sensor Prognostics. J. Microelectromechanical Syst. 2016, 25, 761–769. [Google Scholar] [CrossRef] [Green Version]
  96. Kabir, A.; Bailey, C.; Lu, H.; Stoyanov, S. A Review of Data-Driven Prognostics in Power Electronics. In Proceedings of the 35th International Spring Seminar on Electronics Technology, Bad Aussee, Austria, 9–13 May 2012; IEEE: Piscataway, NJ, USA, 2012; pp. 189–192. [Google Scholar] [CrossRef]
  97. Ahsan, M.; Stoyanov, S.; Bailey, C. Data Driven Prognostics for Predicting Remaining Useful Life of IGBT. In Proceedings of the 39th International Spring Seminar on Electronics Technology (ISSE), Pilsen, Czech Republic, 18–22 May 2016; IEEE: Piscataway, NJ, USA, 2016; pp. 273–278. [Google Scholar] [CrossRef] [Green Version]
  98. Sutharssan, T.; Stoyanov, S.; Bailey, C.; Yin, C. Prognostic and health management for engineering systems: A review of the data-driven approach and algorithms. J. Eng. 2015, 2015, 215–222. [Google Scholar] [CrossRef]
  99. MIPI Overview. 2018. Available online: https://www.mipi.org/about-us (accessed on 28 March 2018).
Figure 1. Taxonomy of the built-in self-test (BIST) methods for micro-electro-mechanical systems (MEMS).
Figure 1. Taxonomy of the built-in self-test (BIST) methods for micro-electro-mechanical systems (MEMS).
Micromachines 12 00040 g001
Figure 2. Schematic of a capacitive accelerometer, adapted from [23].
Figure 2. Schematic of a capacitive accelerometer, adapted from [23].
Micromachines 12 00040 g002
Figure 3. Schematic of a meander heater electrode in a cantilever beam, adapted from [23].
Figure 3. Schematic of a meander heater electrode in a cantilever beam, adapted from [23].
Micromachines 12 00040 g003
Figure 4. Schematic of a thermopile-based sensor with a heating resistor, adapted from [24].
Figure 4. Schematic of a thermopile-based sensor with a heating resistor, adapted from [24].
Micromachines 12 00040 g004
Figure 5. MEMS comb drive structure before (left) and after (right) partitioning [41].
Figure 5. MEMS comb drive structure before (left) and after (right) partitioning [41].
Micromachines 12 00040 g005
Figure 6. Alternate test methodology using output response mapping [46].
Figure 6. Alternate test methodology using output response mapping [46].
Micromachines 12 00040 g006
Figure 7. Cantilever-based magnetometer structure [48].
Figure 7. Cantilever-based magnetometer structure [48].
Micromachines 12 00040 g007
Figure 8. Interferometry images of fault-free (left) and degraded (right) electrodes [50].
Figure 8. Interferometry images of fault-free (left) and degraded (right) electrodes [50].
Micromachines 12 00040 g008
Figure 9. Deviations of impedance ratios. The damaged electrodes are no. 31 and no. 57. Adapted from [52].
Figure 9. Deviations of impedance ratios. The damaged electrodes are no. 31 and no. 57. Adapted from [52].
Micromachines 12 00040 g009
Figure 10. Simplified block diagram of the BIST architecture [65].
Figure 10. Simplified block diagram of the BIST architecture [65].
Micromachines 12 00040 g010
Figure 11. Block diagram of the PLL-based readout circuit [64].
Figure 11. Block diagram of the PLL-based readout circuit [64].
Micromachines 12 00040 g011
Figure 12. Output response difference between fault-free (left) and faulty (right) device [63].
Figure 12. Output response difference between fault-free (left) and faulty (right) device [63].
Micromachines 12 00040 g012
Figure 13. Block diagram of the proposed BIST solution [61].
Figure 13. Block diagram of the proposed BIST solution [61].
Micromachines 12 00040 g013
Figure 14. Schematic of pulse excitation-based test solution for a capacitive microphone, adapted from [73].
Figure 14. Schematic of pulse excitation-based test solution for a capacitive microphone, adapted from [73].
Micromachines 12 00040 g014
Figure 15. Block diagram of pseudo-random test approach [80].
Figure 15. Block diagram of pseudo-random test approach [80].
Micromachines 12 00040 g015
Figure 16. Test scheme for bias superposition/modulation [83].
Figure 16. Test scheme for bias superposition/modulation [83].
Micromachines 12 00040 g016
Figure 17. Wheatstone bridge with normal (left) and differential (right) input [84].
Figure 17. Wheatstone bridge with normal (left) and differential (right) input [84].
Micromachines 12 00040 g017
Figure 18. Schematic view of the sensor structure [87].
Figure 18. Schematic view of the sensor structure [87].
Micromachines 12 00040 g018
Figure 19. Normalised frequency responses of the sensor (1), the operational filter/low pass filter (2), the test filter/high pass filter (3) [83].
Figure 19. Normalised frequency responses of the sensor (1), the operational filter/low pass filter (2), the test filter/high pass filter (3) [83].
Micromachines 12 00040 g019
Figure 20. Conductance sensor on alumina substrate [84].
Figure 20. Conductance sensor on alumina substrate [84].
Micromachines 12 00040 g020
Figure 21. Redundancy bias waveform, adapted from [84].
Figure 21. Redundancy bias waveform, adapted from [84].
Micromachines 12 00040 g021
Figure 22. Schematic of a Multi-Functional Sensor (MFS) system. Traditional BIST methods (blue box) can be implemented at the level of each MFS using some of the techniques described in previous sections [93].
Figure 22. Schematic of a Multi-Functional Sensor (MFS) system. Traditional BIST methods (blue box) can be implemented at the level of each MFS using some of the techniques described in previous sections [93].
Micromachines 12 00040 g022
Table 1. Quantitative scoring method for implementation difficulty of built-in self-test (BIST) methods.
Table 1. Quantitative scoring method for implementation difficulty of built-in self-test (BIST) methods.
DifficultyDescriptionScoring
EasyNo MEMS alteration is necessary; no sensing elements are needed to be manufactured and only additional electronic circuitry is needed if necessary.3
MediumAlteration of the MEMS structure is minimal. Additional circuitry may be required.2
DifficultAdditional sensing elements are needed and/or major modifications of the MEMS structure are required.1
Table 2. Quantitative scoring method of BIST usefulness.
Table 2. Quantitative scoring method of BIST usefulness.
DUT Support TypeDUT Support FunctionScoring
Base fault detectionCatastrophic fault detection +1
Parametric fault detection+1
Additional support toolsHealth and usage monitoring+1
Built-in self-repair capability+1
Multi-modality sensing+1
Table 3. Classification table BIST methods.
Table 3. Classification table BIST methods.
Test MethodDescriptionEase of ImplementationUsefulnessMeasurement Time [ms]Application of TestReferences
Electric actuationSingle-ended testThermal actuationHeater electrode is used to provoke thermally induced deformation.2220,000B[23,24,27,28]
OtherHeater electrode is utilized to generate pressure gradient via heating air that causes membrane deflection or to provide signal to infrared imager.2270, 7000A, B[23,24,29,36]
Electrostatic actuationElectric stimulus is used to mimic physical force, in most cases acceleration.2210A[23,24,26,30,31]
Symmetrical testCombination of single-ended and symmetrical testing for greater fault coverage.22<1A[41,42]
Device is structured into symmetrical portions. Response is captured and compared for identical stimuli.222 A[37,38,39,40]
Indirect parameter measurementOscillation based testDevice is reconfigured into an oscillating device, changes in resonating frequency and amplitude are captured.2215A[47,48,86]
Electrode surface area change due to degradation results in capacitance drop that modifies the oscillation frequency of the system.321.5A[49,50,51,52,53,54,55]
Impedance analysisElectrode surface area change due to degradation results in impedance deviation.330.1A
Direct parameter extractionElectrode impedances compared to the reference electrodes to monitor degradation.320.1–10A[43]
Delay basedCharge control testCharging and discharging the MEMS capacitor, test is based on charge times.321–10A[65]
PLL based testChange in MEMS capacitance detected by a PLL and converted to time domain.321A[64]
Phase locking testAmplification of capacitance differences in time domain using a modified DLL.3s20.007A[63]
Pierce oscillatorAnalysing capacitance deviation in the frequency domain utilizing a modified Pierce oscillator structure.320.01A[61]
Impulse ResponseImpulse ExcitationMEMS is excited with a single impulse. Impulse response (IR) gives information for functional evaluation.322.5A[72,73]
PseudorandomMEMS is excited with a test sequence to acquire IR of the system with better SNR than with IE.322000B[72]
Superposition methodDifferential biasRelies on device symmetry. Separating bias signal to two different inputs. The output should be the same unless there is a change in resistance.3320–50A[82]
Alternative biasA signal superposed to the bias signal that excites the sensor element in a distinct way than the normal mode of operation. 3320-50A[82]
Actuating biasA signal generated by the bias that excites the sensor element in the normal mode of operation.3320–50A[82]
The bias is modulated with a pseudorandom code-modulated sin-wave in the working range of the device. 332550B[88]
Redundancy biasThe bias signal is manipulated to support two distinct measurements of the physical input. The information acquired from the output is redundant and is correlated to gain data about the structural sensor parameters.3330A[82,89]
Multimodal integrationMFSMultiple sensors on one chip with cross sensitivity result in fault tolerance. Data fusion algorithm detects and attempts to correct misbehaving sensors. Integrated remaining useful lifetime prediction. Proposal for integration of sensitivity test method and pseudorandom coding.1N/AN/AN/A[93,94,95]
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Share and Cite

MDPI and ACS Style

Hantos, G.; Flynn, D.; Desmulliez, M.P.Y. Built-In Self-Test (BIST) Methods for MEMS: A Review. Micromachines 2021, 12, 40. https://doi.org/10.3390/mi12010040

AMA Style

Hantos G, Flynn D, Desmulliez MPY. Built-In Self-Test (BIST) Methods for MEMS: A Review. Micromachines. 2021; 12(1):40. https://doi.org/10.3390/mi12010040

Chicago/Turabian Style

Hantos, Gergely, David Flynn, and Marc P. Y. Desmulliez. 2021. "Built-In Self-Test (BIST) Methods for MEMS: A Review" Micromachines 12, no. 1: 40. https://doi.org/10.3390/mi12010040

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop