A Topological Advancement Review of Magnetically Coupled Impedance Source Network Configurations

Abstract

Magnetically coupled impedance source networks provide a wide range of applications, such as dc to dc, dc to ac, ac to ac, ac to dc unidirectional or bi-directional power conversion. Various impedance source networks are reported in the literature to overcome the barriers of conventional voltage source inverters. They offer high boost with buck-boost capabilities and reduce power conversion stages. Thus, they provide an economical solution to expanding power systems, and are most suitable for renewable sources having low output. The goal of this study is to provide an in-depth comprehensive review of the major topologies of magnetically coupled impedance source networks. The review is more focused towards the fast-growing niche area, which has seen many advancements in the last few years. Best efforts are made to include relevant major topological advancements, with the aim of providing relevant and accessible information for researchers. This research provides a detailed comparison of essential factors and presents a full assessment of major topological improvements in MCIS networks.

1. Introduction

In the last decade, renewable energy generation has achieved worldwide acclamation as it serves as a solution to the increasing energy demand. Photovoltaic (PV), wind, fuel cell, biomass geothermal, micro-hydro, ocean waves and tides are just a few of the promising renewable energy sources. The output produced by PV and fuel cell-based energy conversion systems is very low, and thus requires an intermediate converter for the boosting and conditioning of the source output, before feeding it to the load. There are many buck, boost, buck-boost, bidirectional and unidirectional converter topologies available in the literature [1,2,3,4,5,6]. Multilevel inverter topologies also offer high boost, and are explored for standalone and grid-connected applications [7,8,9,10,11,12]. An impedance source network with suitable switching configuration has very high boost capability. These networks can buck, boost and buck-boost the input with unidirectional and bidirectional power flow [13,14,15]. Theoretically, impedance source networks’ gain can vary within 0-∞. Impedance source networks overcome the restrictions of conventional voltage source inverters (VSIs) and current source inverters (CSIs) [16,17,18,19], resulting in a higher output voltage than the dc link voltage. There is no need for additional boost converters and no need for dead time for switches linked to the same leg of the VSI. They offer lower costs with increased efficiency, owing to the single-stage power conversion.

The unique feature of an impedance source network is due to the impedance network connected between the source and VSI, as shown in the Figure 1; as a result, sufficient impedance is seen by the VSI. An impedance network consists of passive elements (inductor and capacitor) L and C, with non-linear elements such as diodes, switches or both. Different improved characteristics can be obtained by changing the impedance network configuration. The first impedance network configuration proposed is known as a Z-source impedance network [20], consisting of inductors (L1,L2), capacitors (C1,C2) and a diode (D) (forming a Z shape), as shown in the Figure 1. Various applications of impedance source networks are presented for adjustable speed drives [21], distributed power generation [22,23], uninterruptible power supply (UPS) [24], electric vehicles [25,26] and PV-based generation [27,28,29]. Broadly, the impedance source network topology can be divided into non-transformer-based and transformer-based topologies, where the basic difference is caused by the selection of the inductor (simple or coupled). An impedance network using a transformer or coupled inductor is referred to as a magnetically coupled impedance source (MCIS) network.

Various non-transformer-based impedance network topologies are available and have been thoroughly researched over the past decade [30], which shows a high voltage boost; theoretically, the gain is unlimited but will be constrained by high voltage stress. Ref. [31] presents a topological review on non-transformer-based and on some transformer-based (two winding) topologies; Refs. [32,33] presents a comparative assessment of the modulation schemes of the three-phase impedance source inverters. Ref. [34] describes various control and modulation techniques for non-transformer-based impedance network applications. Non-transformer-based impedance networks observe high boost with a high shoot-through duty ratio ($d_{st}$), which leads to a low modulation index (M) and thus low utilization of the input voltage. They have high voltage/current stress on components, and the output voltage is controlled using two control parameters ($d_{st}$,M) [35,36]. Thus, high boost at low $d_{st}$ will best utilize the dc link voltage, and an additional degree of freedom will give more choices for $d_{st}$ and M combination. The first MCIS network reported is [37], and considerable advancement has been seen in the last few years in terms of new topologies and improved features of existing topologies [38]. Classification of MCIS network topology is presented in Figure 2. Most of the MCIS topologies use two winding (N1 and N2) transformers or a coupled inductor, and a few use three winding (N1, N2 and N3) transformers or a coupled inductor. MCIS network topologies have three degrees of freedom ($d_{st}$, M, turn ratio). The common advantage of MCIS networks is that they offer high voltage gain at low $d_{st}$, and thus an increased modulation index, low component count, high power density, low core size of the transformer with lower losses and increased efficiency at the same voltage gain. Some of the driving factors for major topological advancement are a continuous input current from the source, a low startup inrush current, dc blocking (to avoid core saturation), a low core size with high power density and high boost at low $d_{st}$. This paper presents a comprehensive review of topological advancements in MCIS networks for power conversion. The operating principle, different modes of operation and voltage boost for two/three winding MCIS topologies are presented. A comparative analysis of MCIS networks in terms of various relevant factors is elaborated, and two/three winding MCIS network topologies are assessed. The effect of parasitic resistance and loose coupling on inverter performance is also highlighted. The rest of the paper is organized as follows: Section 2 presents the operation of the impedance source network for power conversion; Section 3 presents the different topologies for MCIS networks, along with their qualitative comparison; and Section 4 concludes the paper.

2. Operating Principle of Impedance Source Network

The operating principle depicting the high boosting feature of an impedance network is illustrated here by considering the basic Z-source configuration. The basic Z-source network is used to explain the functioning principle of the impedance network, which depicts the high voltage boost feature. An impedance source inverter (ZSI) is constitutes by an impedance network along with a voltage source inverter, which differs from a conventional VSI because of its high boosting capability. An impedance network consists of resistance, capacitors and inductors, whereas a VSI is made up of non-linear semiconductor switches. Shoot-through mode (Mode I) and non-shoot-through mode (Mode II) are the two basic operations describing the unconventional boost feature.

2.1. Mode I

The MCIS networks differ from VSI due to the shoot-through state. VSI legs are never short-circuited in normal operation, whereas the presence of an impedance network at the input of a VSI allows the short-circuiting of the upper and lower switches of a leg. This principle is utilized in all MCIS networks. A normal VSI operates in six active states and two zero states; however, an MCIS network will utilize all VSI states along with the shoot-through ($S_{TH}$) zero state. The various shoot-through zero states are given in Table 1, where the upper and lower switches are short-circuited in different combinations. Conventional SPWM can generate the normal VSI states; however, different modulation controls can be utilized to generate $S_{TH}$ states [39,40,41,42,43,44]. Different circuit configurations of ZSI are shown in Figure 1. Unconventional boost is a distinguishing feature of ZSI, as it utilizes an extra zero state ($S_{TH}$) and thus can operate with nine states. In this mode, the load is short-circuited, as indicated by switch $S_W$; diode ‘D’ is in an inactive state, and the passive elements of the impedance source network store energy, whereas the load receives no power, as shown in Figure 1.

Table 1. Shoot-through zero states for ZSI.

Switching State	Conducting Switches
$S_{TH1}$	$S_{AU}$, $S_{AL}$
$S_{TH2}$	$S_{BU}$, $S_{BL}$
$S_{TH3}$	$S_{CU}$, $S_{CL}$
$S_{TH4}$	$S_{AU}$, $S_{AL}$,$S_{BU}$, $S_{BL}$
$S_{TH5}$	$S_{AU}$, $S_{AL}$,$S_{CU}$, $S_{CL}$
$S_{TH6}$	$S_{BU}$, $S_{BL}$,$S_{CU}$, $S_{CL}$
$S_{TH7}$	$S_{AU}$, $S_{AL}$,$S_{BU}$, $S_{BL}$,$S_{CU}$, $S_{CL}$

Table 1. Shoot-through zero states for ZSI.

Switching State	Conducting Switches
$S_{TH1}$	$S_{AU}$, $S_{AL}$
$S_{TH2}$	$S_{BU}$, $S_{BL}$
$S_{TH3}$	$S_{CU}$, $S_{CL}$
$S_{TH4}$	$S_{AU}$, $S_{AL}$,$S_{BU}$, $S_{BL}$
$S_{TH5}$	$S_{AU}$, $S_{AL}$,$S_{CU}$, $S_{CL}$
$S_{TH6}$	$S_{BU}$, $S_{BL}$,$S_{CU}$, $S_{CL}$
$S_{TH7}$	$S_{AU}$, $S_{AL}$,$S_{BU}$, $S_{BL}$,$S_{CU}$, $S_{CL}$

2.2. Mode II

As indicated in Figure 1, during Mode II, the diode ’D’ is active, whereas the load receives power from the source and inductor. With the discovery of this new shoot-through ($S_{TH}$) state, ZSI demonstrates unexpected boosting in the presence of an impedance network. Various modulation techniques are available to integrate the $S_{TH}$ zero state with other conventional SPWM states [39,40,41,42,43,44].

During steady-state operation, the average voltage across the inductor will be ‘0’ for a switching period $T_s$ due to inductor volt-second balancing. The output voltage of the inverter is expressed by Equation (3), where $V_{c1}$ is the capacitor voltage, ${\widehat{V}}_i$ is the inverter input peak voltage, $V_o$ is the phase peak, and M is the modulation index. Steady-state values are obtained as follows:

$$V_{c1}={\displaystyle \frac{1-D_o}{1-2D_o}}{v}_{dc}=V_{c2}+v_{dc}$$

(1)

$${\widehat{V}}_i={\displaystyle \frac{1}{1-2D_o}}{v}_{dc}=V_{c1}+V_{c2}$$

(2)

$$V_o={\displaystyle \frac{M}{2}}{\widehat{V}}_i={\displaystyle \frac{1}{1-2D_o}}{\displaystyle \frac{M}{2}}{v}_{dc}=B{\displaystyle \frac{M}{2v_{dc}}}$$

(3)

The boost factor (B) for ZSI is given in Equation (3), where the output voltage of an inverter has two degrees of freedom, M and $D_o$, as shown in Equation (3). Thus, $V_o$ can be controlled by modifying the control parameters M and $d_o$, as $d_o$ = $D_o$ during the steady state.

3. Magnetically Coupled Impedance Source Network Topological Advancement

Magnetically coupled impedance source networks are different from conventional impedance source networks, as they use coupled winding or inductors. The major topologies reported use either two or three coupled winding components or inductors; they are different from each other in terms of the active and passive components used in the impedance network. MCIS networks are capable of high boost at low $d_{st}$, use a smaller number of components for the same features as non-transformer-based topologies and have high power density. This section presents a detailed comparison among various MCIS topologies; comparison is carried out on various factors, which will help researchers in identifying the suitable network topology for a specific application. Thus far, three-winding MCIS networks are more versatile than two-winding MCIS networks, as they give more design choices, and more combinations of control parameters ($d_{st}$, M, turn ratio) are possible. They offer high power density with a low core size and thus improved efficiency. Later, it is shown that most of the two-winding topologies can be derived using three-winding MCIS networks.

3.1. T-Source or Trans-Z-Source Impedance Network

Z-source/quasi Z-source networks have gained considerable attention in the last decade among many researchers, and have shown their utility in renewable energy generation. Both network types’ theoretical gain can be said to be infinite (∞), but practically, a high voltage boost will lead to a low modulation index, which in turn places more stress (voltage) on the components, thus offering limited boost capabilities. T-source and Trans-Z-source impedance networks are proposed in [37,45]; they are derived from the conventional ZSI/qZSI topologies, where the inductor pair is replaced by a magnetic core transformer with turn ratio $N:1$. They have higher boost capabilities. Various configurations of Trans-Z-source networks investigated so far are derived from current/voltage-fed Z source impedance or quasi-Z-source impedance networks. As per their origin, they are referred as voltage-fed trans-ZSI, voltage-fed trans-qZSI, current-fed trans-ZSI and current-fed trans-qZSI. A basic configuration of T-source or Trans-Z-source, trans-quasi-Z source and Trans-Z-source networks with an input filter is shown in Figure 3. In a voltage-fed trans-Z-source network, the current drawn from the source is discontinuous, as well as drawing a high inrush current, which can be improved using a front-end LC input filter. An improved trans-Z-source inverter is shown in Figure 4, which draws a continuous current from the source, suppresses the high starting inrush current and provides resonant current suppression. It consists of an additional inductance L3 and capacitance C2, as shown in the Figure 4; with the addition of two components, the voltage boost capabilities are better than trans-qZSI and trans-ZSI (or T-source). Hence, a high boost factor with lower voltage stress on components can be obtained with the same turn ratio; the detailed comparison is presented in Table 2.

MCIS topologies are characterized by a high voltage gain; as a result, voltage and current stress are also increased in the converter components; for a loose coupling, the problem is further exacerbated. Thus, to distribute the voltage and current stress, a cascaded trans-Z-source inverter topology is proposed [46]. In this topology, multiple coupled inductor cells with a lower number of turns are used to produce the same voltage gain. With lower turns, coupling is improved, and stress is reduced as compared to a basic topology. The major drawback compared to non-cascaded topologies is the increase in the number of components; therefore, it may be preferred in those applications that restrict the use of the high rating component, or where the use of a lower rating component is desirable. The effect of leakage inductance can reduce the voltage gain along with low output voltage quality; another topology is proposed [47] to counter leakage inductance, which uses two coupled transformers, two capacitors and two diodes. It produces higher voltage than the traditional trans-Z-source family. The efficiency is same as that of a TZ-source network, and higher than that of a cascaded multicell trans-Z-source network. Smaller capacitor voltage stress, lower voltage stresses of the diodes and a smaller SDP factor are the main advantages. Transformer leakage inductance is reduced by using bifilar winding design technology.

Table 2. Comparison of ZSI, qZSI, Trans-ZSI, Improved Trans-qZSI and Improved Trans-ZSI with two-transformer impedance network topology.

	ZSI [20,48,49,50,51,52,53]	qZSI [22,54,55,56,57,58,59,60,61,62]	Trans-ZSI or T-ZSI [37,45,46]	Trans-qZSI [63]	Improved Trans-qZSI [64]	Improved Trans-ZSI with two transformers [47]
Boost factor	${(1-2d_{st})}^{-1}$	${(1-2d_{st})}^{-1}$	${(1-(1+N)d_{st})}^{-1}$	${(1-(1+N)d_{st})}^{-1}$	${(1-(2+N)d_{st})}^{-1}$	${((N_{t2}+1)d_{st}^2-(N_{t1}+N_{t2}+2)d_{st}+1)}^{-1}$
Component used
Capacitor	2	2	1	1	2	2
Inductor	2	2	-	-	1	-
Coupled Inductor	-	-	2	2	2	2
Diode	1	1	1	1	1	2
Current drawn from source	discontinuous	continuous, highly rippled	discontinuous	continuous, highly rippled	continuous	discontinuous
Draws inrush current	yes	no	yes	no	no	no
Comment	first impedance source network, high voltage stress on components	first modified ZSI, lower voltage stress for same voltage gain, reduced component rating	higher gain, reduced component, LC i/p filter to suppress high inrush current	reduced component, LC i/p filter to suppress high ripples in input current	highest gain, reduced component count (trans-ZSI/qZSI with LC i/p filter)	higher voltage gain than trans-ZSI, cascaded multicell trans-ZSI and A-source network, lower voltage stress on diode and capacitors

Table 2. Comparison of ZSI, qZSI, Trans-ZSI, Improved Trans-qZSI and Improved Trans-ZSI with two-transformer impedance network topology.

	ZSI [20,48,49,50,51,52,53]	qZSI [22,54,55,56,57,58,59,60,61,62]	Trans-ZSI or T-ZSI [37,45,46]	Trans-qZSI [63]	Improved Trans-qZSI [64]	Improved Trans-ZSI with two transformers [47]
Boost factor	${(1-2d_{st})}^{-1}$	${(1-2d_{st})}^{-1}$	${(1-(1+N)d_{st})}^{-1}$	${(1-(1+N)d_{st})}^{-1}$	${(1-(2+N)d_{st})}^{-1}$	${((N_{t2}+1)d_{st}^2-(N_{t1}+N_{t2}+2)d_{st}+1)}^{-1}$
Component used
Capacitor	2	2	1	1	2	2
Inductor	2	2	-	-	1	-
Coupled Inductor	-	-	2	2	2	2
Diode	1	1	1	1	1	2
Current drawn from source	discontinuous	continuous, highly rippled	discontinuous	continuous, highly rippled	continuous	discontinuous
Draws inrush current	yes	no	yes	no	no	no
Comment	first impedance source network, high voltage stress on components	first modified ZSI, lower voltage stress for same voltage gain, reduced component rating	higher gain, reduced component, LC i/p filter to suppress high inrush current	reduced component, LC i/p filter to suppress high ripples in input current	highest gain, reduced component count (trans-ZSI/qZSI with LC i/p filter)	higher voltage gain than trans-ZSI, cascaded multicell trans-ZSI and A-source network, lower voltage stress on diode and capacitors

3.2. TZ-Source Impedance Network

When two inductors of a conventional Z-source network are replaced with two-transformer/coupled inductors, as shown in Figure 5, the resulting impedance network is referred to as a TZ-source impedance network [65]. It draws a discontinuous current and hence requires a front-end LC input filter such as Trans-Z source, so as to protect the energy source. It draws a starting inrush current, but the embedded quasi-TZ-source network topology is equipped with inherent inrush current suppression; this topology can be further extended to quasi or embedded ZSI topologies [65]. The distinguishing features of this topology are the higher boost gain than that of Trans-ZSI and LCCT networks. For the same voltage gain, it requires a lower turn ratio; as a result, the size of the transformer (power rating) and transformer core are reduced and thus the overall weight of the transformer is lower. However, the component count is higher when the front-end LC input filter is used to suppress the current and voltage spikes.

Boost factor variation for different modulation indexes is plotted for ZSI/qZSI, Trans-ZSI and Trans-qZSI for N = 2, as shown in Figure 6. Due to the presence of an additional control parameter (N) in the boost factor of the magnetically coupled impedance topology, a high voltage gain is visible in Figure 6.

3.3. LCCT Impedance Network

In this impedance network, out of two pairs of conventional LC networks (L1,C1 and L2,C2), one inductor (L2) and one capacitor (C1) are combined into a high-frequency transformer, as shown in Figure 7. Unlike Trans-Z source and TZ networks, it draws a continuous input current from the source, which is the prime requirement of most of the renewable energy applications. It has inherent dc blocking capabilities, due to the presence of two blocking capacitors; thus, transformer core saturation is also prevented. It has a reduced component count compared to previous topologies and offers a continuous current with high starting inrush current suppression. Variation in the boost factor with the shoot-through duty ratio is shown in Figure 8, where plots were obtained for different turn ratios k, where k = N.

3.4. Gamma Impedance Source Inverter ($\Gamma -$ZSI)

In all traditional MCIS (e.g., Trans-Z source, TZ source and LCCT network), a higher turn ratio is the prime requirement to obtain a higher voltage gain, which sometimes may not be practically realizable. However, unlike traditional MCIS, a higher voltage gain is obtained by lowering the turn ratio in the case of $\Gamma -$ZSI, which is a unique feature of this new topology [66]. With a different placement of the coupled inductor, a very high voltage gain along with a lower component count is realizable in the $\Gamma -$Z source network topology shown in Figure 9. However, it draws a discontinuous current from the source. Variation in the boost factor with the shoot-through duty ratio is shown in Figure 8, where plots were obtained for different turn ratios k, where k = ${\displaystyle \frac{1}{N_{\Gamma Z}}}$. The voltage boost for Trans-Z source and $\Gamma -$Z source matches for $N_{TZ}={\displaystyle \frac{1}{N_{\Gamma Z}-1}}$.

With a slight modification in the $\Gamma -$Z source network, the current drawn from the source can be made continuous. An improved or modified $\Gamma -$Z source network is also referred to as an asymmetrical $\Gamma -$Z source network. It uses an additional inductor Lin and capacitor C2 when compared with its counterpart; an additional input inductor will reduce the current spike during starting and also helps in smoothing the input current. Lowering the turn ratio will lead to a higher voltage gain in this modified $\Gamma -$Z network, as with its counterpart, but it draws a continuous current. Variation in the boost factor with the shoot-through duty ratio for an asymmetrical $\Gamma -$Z-source network is shown in Figure 8; plots are obtained for different turn ratios k, where k = ${\displaystyle \frac{1}{N_{\Gamma Z}}}$. The voltage boost for Trans-Z source and asymmetrical $\Gamma -$Z source matches for $N_{TZ}=1+{\displaystyle \frac{1}{N_{\Gamma Z}-1}}$.

The sigma (∑) source network is proposed in [67] by reconfiguring the TZ-source network, which uses two transformers whose secondary windings are connected to capacitors. It can be viewed as a dual $\Gamma -$Z source network, forming a sigma (∑) source network, and is known as the ∑-ZSI topology. When compared to the TZ-source network, it uses the same number of components, but high voltage gain is possible at a lower turn ratio. Thus, the size of the two transformers will be smaller, and the modulation index will be higher due to the lower duty cycle ($d_{st}$); hence, there is low voltage stress on the components for the same voltage gain.

3.5. Y-Source Impedance Network

All the above topologies use a two-winding coupled transformer and are better than conventional ZSI in terms of higher voltage gain and some have even lower component counts. With certain improvements, a further higher voltage gain is possible with reduced $d_{st}$ and a high modulation index (M). As a result, there will be less voltage stress on components due to high (M), but at the cost of a higher component count. A Y-source impedance network consisting of three coupled winding ($N_1,N_2,N_3$) is proposed in [68]. As shown in Figure 10, its gain capability is the highest for the same shoot-through duty cycle ($d_{st}$) among all the above topologies. For a narrower $d_{st}$, a higher modulation index (M) is possible; as a result, voltage stress on components is the lowest with the same gain compared with its counterparts. The desired gain can be obtained by various combinations of $d_{st}$ and k, where k is an additional degree of freedom ($k={\displaystyle \frac{N_3-N_1}{N_3-N_2}}$); thus, more design choices are possible in the case of Y-source.

Y-source has merged all the merits of the above two-winding MCIS topologies. It can be characterized by a very high voltage gain with tight coupling, a lower component count, low voltage stress for the same gain, reduced component rating and more design choices. However, it draws a discontinuous current from the source, and high inrush current during starting. With a small modification, Y-source networks can draw a continuous input current, as done in previous topologies. The improved Y-source impedance network is shown in Figure 10; they can be classified as improved Y-source type I and type II. In type I, a smoothing inductor and capacitor is added in the original Y-source network. Compared to the original network, it draws a continuous current, and high gain is obtained at the same $d_{st}$, with high voltage stress on components. In a type II network, the input current is continuous for certain capacitance ratios between C1 and C2, but it can affect the performance greatly if the capacitance ratio is not accurately set. The risks of high inrush current at startup and input oscillations due to parasitic inductances and capacitances persist. Variation in the boost factor with the shoot-through duty ratio for Y-source and improved Y-source is shown in Figure 11; plots are obtained for different turn ratios.

A quasi-Y-source impedance network is proposed in [69]; it retains the original Y-source network configuration, i.e., three coupled winding ($N_1,N_2,N_3$) and capacitor C1 in their original position. An additional input inductor and dc blocking capacitor are used (Lin and C2), and the position of the diode (D) is changed, as shown in Figure 10. The winding factor ($\delta ={\displaystyle \frac{N_1+N_2}{N_2-N_3}}$) of the quasi-Y-source network is different from that of the original Y-source network; however, it will have the same voltage gain as long as both winding factors are equal ($\delta =k$). Both the Y-source and quasi-Y source networks must satisfy the inequalities $[1<N_3,N_3>N_2]$ and $[1<N_2,N_2>N_3]$, respectively, for satisfactory performance. The quasi-Y-source network draws a continuous current, prevents core saturation due to the presence of dc blocking capacitor C2 and there is no startup inrush current. It has a low component count and a reduced core size of the transformer for the same voltage gain, hence offering the best characteristics at a certain capacitance ratio (${\displaystyle \frac{C1}{C2}}=\delta -1$), maintained when compared with previous MCIS topologies. Most of the two-winding topologies can be derived from Y-source impedance networks, as shown in Figure 12; thus, the Y-source topology has merged all the merits of the two-winding topology.

3.6. Coupled Inductor L-Source Inverter (CL-LSI)

It is composed of a switch with an antiparallel diode in series with a capacitor, and a coupled inductor forming an L-shaped impedance network, as shown in Figure 13. The main feature of this impedance network is that it can work in continious conduction mode (CCM) as well as in discontinuous conduction mode (DCM); hence, it can solve the problem of dc link voltage drop. Compared to CCM, in DCM, it produces a higher voltage gain with lower voltage stress on components. It also has a reduced size of the coupled inductor along with low power loss, and suppresses the startup inrush current [70].

3.7. A-Source Impedance Network

This impedance network is a two-winding MCIS network, consisting of a smoothing inductor $L_{in}$, a diode D1, capacitors C1 and C2 and an autotransformer. This autotransformer has $L1,N1$ and $L2,N2$ as the primary and secondary winding inductances and turns, respectively, as shown in Figure 14. Higher voltage gain is obtained by using an autotransformer-type wound coupled inductor instead of a normal wound coupled inductor. To have small leakage inductance, tight coupling is ensured. It provides higher voltage gain with a lower turn ratio; as a result, the weight and size of the coupled inductor are reduced, with higher power density, when compared with Z-source, Trans-Z-source, LCCT-Z-source, $\Gamma -$Z source and Y-source. It draws a continuous current from the source, and the variation in the boost factor with the shoot-through duty ratio is shown in Figure 8. Plots are obtained for different turn ratios k, where k = ${\displaystyle \frac{N_2}{N_1}}$.

3.8. $\Delta$-Source Impedance Network

The proposed impedance network uses the same components as that of Y-source, and is also a three-winding MCIS network topology. It only differs in the layout of the three windings, forming a $\Delta$ shape, as shown in Figure 15. All magnetically coupled impedance networks’ performance is sensitive to leakage inductance; as a result, precise closed loop control will lead to additional costs and complexity. The $\Delta$-source impedance network offers smaller leakage inductance compared to its counterpart Y-source network. It also draws a smaller magnetizing current and has lower power losses. The desired voltage gain can be obtained by various combinations of $d_{st}$ and $k_{\Delta }$, where $k_{\Delta }$ is an additional degree of freedom ($k_{\Delta }={\displaystyle \frac{N_1}{N_3}}$). The main advantage of this topology over Y-source is the reduced leakage current; thus, the size and volume of the three-winding transformer are also reduced for the same voltage gain, which leads to lower winding losses and hence a high output voltage with the same boosting. However, it has a drawback of higher magnetizing current ripple; as a result, there are higher core losses compared with Y-source, and it draws a discontinuous current from the source and high inrush current during starting.

The performance of MCIS networks is remarkable in terms of boost capability; the results obtained are described and measured considering ideal conditions. However, the acclaimed performance deteriorates, largely due to the effect of the parasitic resistance of the impedance network. The overall gain is highly affected by the parasitic resistances of the impedance network and switching devices. The mathematically derived results from circuit modeling and circuit analysis directly relate the overall voltage gain to the parasitic resistance, which can be further investigated for other scenarios. In summary, the parasitic resistance will decrease the overall voltage gain; however, the severity of the gain drop can be further investigated with different shoot-through duty ratios, different resistance ratios and different winding ratios. The work on MCIS topologies can now be directed towards new horizons, such as analysis for the effect of leakage inductance and parasitic resistance on overall gain. Shoot-through duty ratio constraints can also be explored for the implementation of closed loop control applications. All two-winding, three-winding and autotransformer-based MCIS topologies should be further explored to minimize the effect of zero right half plane (RHP) on control-related performance.

4. Conclusions

Magnetically coupled impedance source networks have seen rapid advancements in the last few years; they have proven their superiority in efficient power conversion compared to any other two-stage or single-stage converter topologies, as they overcome most of the problems associated with traditional converter topologies. Since the first reported MCIS network (T-Source), there has been a rapid evolution in new MCIS topologies as well as improved or modified MCIS topologies; this niche area has attracted many researchers and designers for further exploration. The existing reported MCIS networks are better in terms of high output voltage, lower voltage and current stress on components. They have a lower component count for the same features, draw a continuous current from the source and experience low startup inrush current. This paper does not aim to advocate for any specific topology, but presents a comparative analysis and a comprehensive review of various advancements in MCIS networks since their inception, and best efforts are made to include all relevant contributions of all researchers and designers. A close study revealed that some of the driving factors for major modifications are: (1) to have a high boosting factor (B); (2) to have more degrees of freedom; (3) to achieve high boost at low $d_{st}$ so as to best utilize the source voltage; (4) to reduce the component count; (5) to reduce the voltage stress on components; (6) to draw continuous input current from the source; (7) to draw low startup inrush current with less ripples; (8) dc blocking so as to avoid core saturation; (9) to have a reduced core size, increased power density and efficiency, etc. The common problem faced by all MCIS topologies is leakage inductance; tight coupling of the coupled winding is necessary to achieve the acclaimed performance, and it can be achieved by using bifilar winding design technology.

MCIS network topologies have found application in various types of ac-dc, dc-dc, dc-ac, ac-ac unidirectional or bi-directional power conversion. Table 2 shows a detailed comparison between ZSI, Trans-ZSI or T-ZSI, Trans-qZSI, Improved Trans-qZSI and Improved Trans-ZSI with two transformers; Table 3 shows a detailed comparison between LCCT-Z Source, $\Gamma$-Source, Asym-$\Gamma$-Source, $\Sigma$-Source and A-Source, whereas Table 4 shows a detailed comparison between Y-Source, Improved Y-source, Quasi-Y Source and $\Delta$-Source. The various topologies are different from each other in terms of their impedance network configuration, which makes their characteristics unique. However, it is impossible to suggest one topology for various application(s), as some topologies can find a niche over other topologies in some application(s); therefore, this paper can help researchers to compare the different MCIS network topologies, to categorize them according to various comparative factors presented in Table 2, Table 3 and Table 4 and to choose the appropriate MCIS network for their application.

Table 3. Comparison of LCCT-Z Source, $\Gamma$-Source, Asym-$\Gamma$-Source, $\Sigma$-Source and A-Source impedance networks.

	LCCT-Z Source [71,72,73]	$\mathbf{\Gamma }$-Source [66,74]	Asym-$\mathbf{\Gamma }$-Source [75]	$\mathsf{\Sigma }$-Source [67]	A-Source [76]
Boost factor	${(1-(N+1)d_{st})}^{-1}$	${(1-(1+({\displaystyle \frac{1}{N_{\Gamma Z}-1}}))d_{st})}^{-1}$	${(1-(2+({\displaystyle \frac{1}{N_{\Gamma Z}-1}}))d_{st})}^{-1}$	${(1-(2+{\displaystyle \frac{1}{N_{\Gamma 1}-1}}+{\displaystyle \frac{1}{N_{\Gamma 2}-1}})d_{st})}^{-1}$	${(1-(2+{\displaystyle \frac{N_2}{N_1}})d_{st})}^{-1}$
Component used
Capacitor	2	1	2	2	2
Inductor	1	-	1	-	1
Coupled Inductor	1	1	1	2	1
Diode	1	1	1	1	1
Current drawn from source	continuous	discontinuous	continuous	discontinuous	continuous
Draws inrush current	no	yes	no	yes	no
Comment	inherent dc blocking, continuous current even at light load	high gain by lowering turn ratio, reduced core size, less component	high gain by lowering turn ratio, suppresses high inrush current, reduced core size	high gain, low voltage stress, reduced core size	uses autotransformer, reduced turn ratio for same gain, high power density

Table 3. Comparison of LCCT-Z Source, $\Gamma$-Source, Asym-$\Gamma$-Source, $\Sigma$-Source and A-Source impedance networks.

	LCCT-Z Source [71,72,73]	$\mathbf{\Gamma }$-Source [66,74]	Asym-$\mathbf{\Gamma }$-Source [75]	$\mathsf{\Sigma }$-Source [67]	A-Source [76]
Boost factor	${(1-(N+1)d_{st})}^{-1}$	${(1-(1+({\displaystyle \frac{1}{N_{\Gamma Z}-1}}))d_{st})}^{-1}$	${(1-(2+({\displaystyle \frac{1}{N_{\Gamma Z}-1}}))d_{st})}^{-1}$	${(1-(2+{\displaystyle \frac{1}{N_{\Gamma 1}-1}}+{\displaystyle \frac{1}{N_{\Gamma 2}-1}})d_{st})}^{-1}$	${(1-(2+{\displaystyle \frac{N_2}{N_1}})d_{st})}^{-1}$
Component used
Capacitor	2	1	2	2	2
Inductor	1	-	1	-	1
Coupled Inductor	1	1	1	2	1
Diode	1	1	1	1	1
Current drawn from source	continuous	discontinuous	continuous	discontinuous	continuous
Draws inrush current	no	yes	no	yes	no
Comment	inherent dc blocking, continuous current even at light load	high gain by lowering turn ratio, reduced core size, less component	high gain by lowering turn ratio, suppresses high inrush current, reduced core size	high gain, low voltage stress, reduced core size	uses autotransformer, reduced turn ratio for same gain, high power density

Table 4. Comparison of three-winding magnetically coupled impedance source (MCIS) networks.

	Y-Source [68,69,77]	Improved Y-Source [69,78,79]		Quasi-Y Source [69,78,79]	$\mathbf{\Delta }$-Source [80]
		Type I	Type II
Boost factor	${(1-k{d}_{st})}^{-1}$	${(1-(1+k)d_{st})}^{-1}$	${(1-k{d}_{st})}^{-1}$	${(1-\delta d_{st})}^{-1}$	${(1-k_{\Delta }{d}_{st})}^{-1}$
Component used
Capacitor	1	2	2	2	1
Inductor	-	1	-	1	-
Three-winding coupled inductor	1	1	1	1	1
Diode	1	1	1	1	1
Current drawn from source	discontinuous	continuous	continuous	continuous	discontinuous
Draws inrush current	yes		yes	no	yes
Comment	has 3 degree of freedom, more design choices, very high boost at low $d_{st}$ compared to two winding MCIS topology, versatile	smoothing inductor and capacitor is added, high voltage gain at same $d_{st}$, high voltage stress, improved performance at the cost of high component count	certain ${\displaystyle \frac{C1}{C2}}$ ratio is maintained for continuous current, risk of high inrush current and high startup inrush current, sensitive to capacitor ESR and parameter variation	same gain for $\delta =k$, inherent dc blocking, reduced core size for same voltage gain	lower magnetizing current, high output voltage at same B compared to original Y-source but high core losses due to highly rippled magnetizing current

Table 4. Comparison of three-winding magnetically coupled impedance source (MCIS) networks.

	Y-Source [68,69,77]	Improved Y-Source [69,78,79]		Quasi-Y Source [69,78,79]	$\mathbf{\Delta }$-Source [80]
		Type I	Type II
Boost factor	${(1-k{d}_{st})}^{-1}$	${(1-(1+k)d_{st})}^{-1}$	${(1-k{d}_{st})}^{-1}$	${(1-\delta d_{st})}^{-1}$	${(1-k_{\Delta }{d}_{st})}^{-1}$
Component used
Capacitor	1	2	2	2	1
Inductor	-	1	-	1	-
Three-winding coupled inductor	1	1	1	1	1
Diode	1	1	1	1	1
Current drawn from source	discontinuous	continuous	continuous	continuous	discontinuous
Draws inrush current	yes		yes	no	yes
Comment	has 3 degree of freedom, more design choices, very high boost at low $d_{st}$ compared to two winding MCIS topology, versatile	smoothing inductor and capacitor is added, high voltage gain at same $d_{st}$, high voltage stress, improved performance at the cost of high component count	certain ${\displaystyle \frac{C1}{C2}}$ ratio is maintained for continuous current, risk of high inrush current and high startup inrush current, sensitive to capacitor ESR and parameter variation	same gain for $\delta =k$, inherent dc blocking, reduced core size for same voltage gain	lower magnetizing current, high output voltage at same B compared to original Y-source but high core losses due to highly rippled magnetizing current