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Article

A Wide-Output-Range DC-DC Converter and Minimum Loss Collaborative Control Strategy

1
School of Electrical Engineering, Yanshan University, Qinhuangdao 066000, China
2
School of Electrical Engineering, Computing and Mathematical Sciences, Curtin University, Bentley, WA 6102, Australia
*
Author to whom correspondence should be addressed.
Energies 2024, 17(2), 499; https://doi.org/10.3390/en17020499
Submission received: 3 December 2023 / Revised: 10 January 2024 / Accepted: 18 January 2024 / Published: 19 January 2024
(This article belongs to the Section F3: Power Electronics)

Abstract

:
In response to the challenges faced by traditional LLC resonant converters in simultaneously achieving a wide output voltage and high efficiency, this paper proposes a cascaded DC-DC converter. The front stage of the converter adopts a new LLC topology, and it is cascaded with a boost converter through a reutilization of the output-side inductor. The proposed DC-DC converter leverages the electrical isolation and wide output voltage range advantages of LLC and boost converters, enabling the overall system to achieve broad output voltage regulation and high-efficiency operation. The reutilization of the inductor design further enhances the integration density of the DC-DC converter. A minimum loss collaborative control strategy is introduced for the proposed DC-DC converter. When determining the output voltage and operating the circuit in step-up mode, the duty cycles of the switch in the proposed LLC converter and the switch in the boost converter are adjusted to minimize overall circuit losses while ensuring the rated output voltage. Ultimately, the correctness and practicality of the proposed DC-DC converter and its control strategy are validated through a simulation and an experiment. The overall efficiency of the DC-DC converter can reach up to 94% under optimal conditions.

1. Introduction

The primary-side switches of the LLC resonant converter possess the ability to perform zero voltage switching (ZVS), while the secondary-side diodes are capable of zero current switching (ZCS). The LLC resonant converter offers significant advantages such as low switching loss, high efficiency, and high power density. Therefore, it has gained widespread usage in the realm of electric vehicle charging [1,2,3,4]. Nevertheless, achieving both a wide output voltage range and high efficiency poses a challenge for the LLC resonant converter. Typically, the LLC resonant converter employs the pulse frequency modulation (PFM) technique to regulate output voltage. The operating region is divided into two regions by the resonant frequency fr. When the operating frequency is lower than the resonant frequency fr, ZVS and ZCS can be achieved; however, when it is higher than the resonant frequency fr, ZCS will not be achieved. When the operating frequency surpasses the resonant frequency fr of the LLC resonant converter, the voltage gain begins to plateau gradually. Consequently, a broader frequency variation becomes necessary to attain output voltage regulation, resulting in an inevitable decline in efficiency [5,6,7,8]. Therefore, in recent years, striking a balance between the conflicting demands of a wide output range and efficiency has emerged as a prominent research focus in the realm of electric vehicle charging.
Numerous approaches have been proposed to attain a wide output range in LLC resonant converters. In [9,10], the resonant cavity of the LLC converter is optimized through time-domain analyses. This approach enhances the utilization efficiency of components within the resonant cavity, thereby effectively expanding the output range of the LLC converter. However, it concurrently introduces an increase in the frequency variation range of the LLC converter. In [11,12], a wide output range is achieved for an LLC converter by improving the control strategy. However, the proposed control strategy is difficult to implement and introduces low-frequency ripples in the output voltage.
Changing the converter’s topology is also an effective means of achieving a wide output range for an LLC resonant converter. In [13], an LLC converter with two interleaved pulse-width modulation rectifiers is proposed. In comparison to a conventional LLC converter, it achieves ZVS across a wide output range. However, the complexity of this topology makes it challenging for industrial applications. Another proposal in [14] introduces an interleaved LLC resonant converter in which the primary sides of two LLC converters are connected in parallel. When a lower output voltage is required, the secondary windings are connected in parallel, while for a higher output voltage, they are connected in series. This configuration enhances the output voltage range while reducing the circulating current and conduction losses. Unfortunately, the increased number of required components in this converter adds complexity to the circuit and reduces power density. Additionally, in [15], an LLC resonant converter with a notch filter function is proposed. Compared to a conventional LLC converter, it utilizes third harmonics to transmit active power, thereby enhancing converter efficiency. However, control of this circuit is intricate and challenging to implement. In [16], a loss balance method is proposed that can be applied to various topologies. This method effectively resolves the non-uniform distribution of losses in LLC resonant converters, exhibiting no significant shortcomings. In [17], an asymmetrical half-bridge (HB) resonant converter is proposed, amalgamating features from both an active-clamp forward main circuit and an HB LLC resonant converter with identical characteristics. The incorporation of a buck–boost circuit in front of an HB LLC resonant converter enables a higher input voltage at the LLC resonant converter stage. In [18], a C-LLC converter is proposed, incorporating an additional auxiliary half-bridge structure into the conventional circuit to achieve higher efficiency in the presence of input voltage mismatches. All switches can achieve ZVS across the entire operating range, reducing losses. In [19], a constant current digital control method is presented for a primary side regulated half-bridge LLC resonant converter. This method introduces an auxiliary winding circuit to magnetize the DC bias current, and its inherent symmetry enables compensation for DC current bias. Additionally, constant current control is achieved. In [20], a new isolated LLC resonant converter fed by a Cuk converter is introduced. The Cuk converter achieves power factor correction through the continuous conduction mode of the primary inductor, while the LLC resonant converter transforms the DC voltage to the desired voltage level. This converter exhibits excellent input–output characteristics and steady-state response properties. Reference [21] introduces a bridgeless buck–boost and half-bridge LLC resonant converter. The proposed design achieves reduced conduction losses, natural power factor correction, and resilience to high-frequency noise.
A cascaded DC-DC converter with LLC and boost is proposed in this paper. This configuration combines the advantages of LLC and boost converters, meeting the requirements for a wide output range while achieving high efficiency. In the cascaded converter, the proposed LLC converter operates in a fixed-frequency mode on the primary side, where the switching frequency of the switch remains at the resonant frequency. The output voltage of the proposed LLC converter is adjusted by modulating the duty cycle of the secondary-side switch. Furthermore, the boost converter enables the entire DC-DC converter to achieve a wide output range. To enhance the overall efficiency of the DC-DC converter, a corresponding minimal-loss coordinated control strategy is proposed. The structure of this paper is organized as follows: Section 2 introduces the operational principles of the proposed DC-DC converter, Section 3 presents the proposed control strategy, Section 4 validates the DC-DC converter through a simulation, Section 5 conducts an experimental verification on a constructed platform, and Section 6 concludes the entire paper.

2. Wide-Output-Range DC-DC Converter: Principle of Operation

Figure 1 depicts the topology of the wide-output-range DC-DC converter proposed in this paper, which is cascaded with a front-stage proposed LLC converter and a back-stage boost converter. The primary side and resonant cavity of the proposed LLC converter are the same as those of a conventional LLC converter. The secondary side consists of two independent charging branches, (D5, C5) and (D6, C6), which are connected through diodes D7 and D8 and switch S5, and the output of the proposed LLC converter serves as the input for the boost converter.
Due to the prevalence of boost converters, this paper primarily introduces the operational principles of the proposed LLC converter, as depicted in Figure 2. The operating principles of the primary side and resonant cavity are similar to those of a conventional LLC converter. Typically, the primary-side switches operate at the resonant frequency, resulting in a sinusoidal current ir within the resonant cavity. The output voltage of the proposed LLC converter can be adjusted by modulating the on–off states of the secondary-side switch S5 and altering the connection of capacitors C5 and C6. A detailed explanation of the operational principles of the secondary-side circuit is provided in the subsequent content.
According to the distinct energy flow directions in capacitors C5 and C6, the operation modes of the secondary-side circuit are divided into charging mode and discharging mode, which will be elaborated upon individually below.
Charging Mode: The operating frequency of the primary-side switches S1S4 is the same as the resonant frequency of the resonant cavity. At this point, a sinusoidal current flows through the resonant cavity. During the positive half-cycle, the secondary-side diode D5 conducts, allowing energy to flow through diode D5 to charge capacitor C5. Conversely, during the negative half-cycle of the resonant cavity current, the secondary-side diode D6 conducts, enabling energy to flow through diode D6 to charge capacitor C6. Ideally, the circuit is in a symmetric state, resulting in equal voltages of the capacitors C5 and C6. The current loop during the charging mode is illustrated in Figure 3.
Discharging Mode: When the secondary side of the proposed LLC converter operates in the discharging mode, the output voltage of the circuit is primarily determined by the duty cycle of the switch S5. When S5 is on, diodes D8 and D7 clamp capacitors C5 and C6, respectively, preventing them from conducting. The current loop at this point is illustrated in Figure 4a. It can be observed from the figure that capacitors C5 and C6 are connected in series through switch S5, supplying power to the load simultaneously, and the output voltage of the converter is 2Vc in this configuration. On the other hand, when switch S5 is turned off, diodes D7 and D8 conduct, and the current loop is shown in Figure 4b. In this case, capacitors C5 and C6 are connected in parallel, supplying power to the load simultaneously, and the output voltage of the converter is Vc in this configuration. Through the above analysis, it is evident that by adjusting the on and off states of switch S5, the output voltage of the converter can be switched between Vc and 2Vc. In other words, by adjusting the duty cycle of switch S5, the output voltage can be regulated, as expressed below:
V LLC = ( 1 + d L ) V c
where VLLC represents the output voltage of the proposed LLC converter, dL is the duty cycle of switch S5, and Vc is the capacitor C5 (C6) voltage.

3. DC-DC Converter Parameter Design

The turns ratio of the transformer is given as n:1:1. After determining the turns ratio of the transformer in the LLC resonant converter, the secondary-side load is equivalently transformed to the primary side of the converter. The equivalent resistance value of this load is
R e q = 8 n 2 R o π 2
In order to conduct a more in-depth study of the frequency response characteristics of the LLC resonant converter and to further obtain the parameters of the components within the resonant cavity of the LLC resonant converter, it is essential to first determine the values of the k and the quality factor (Q) in the system, where
k = L m / L r
Q = L r C r R e q = 2 π f r L r R e q
Figure 5 illustrates the voltage gain characteristic curve with a fixed Q while varying the value of k, and Figure 6 displays the voltage gain characteristic curve with a fixed k while varying the value of Q. An analysis of both plots reveals that selecting a reasonable value for either k or Q is crucial. On one hand, this choice ensures that the converter exhibits good voltage regulation performance over a wide frequency range. On the other hand, it may contribute to maintaining the operational efficiency of the resonant converter.
The resonant capacitance Cr in the resonant cavity can be determined using the fundamental frequency analysis method, as follows:
C r = 1 2 π f s R e q Q
Furthermore, the values of the resonant inductance Lr and the excitation inductance Lm within the resonant cavity can be obtained as follows:
L r = Q R e q 2 π f s
L m = k L r
The inductance value at the critical operating state can be calculated as follows:
L = V out α min ( 1 α min ) 2 2 i out f
where
α min = V out V in max V out
The output voltage filter capacitor can be calculated as follows:
C = α i out f Δ V
where
α = α max = V out V in min V out

4. The Proposed Control Strategy

Due to the similarity between the resonant cavity of the proposed LLC converter and that of a conventional LLC converter, the parameter design process is also identical to that of the conventional LLC converter. Therefore, this paper does not elaborate on it. The main focus is on introducing the proposed DC-DC converter voltage regulation strategy.
As analyzed in the preceding text, the output voltage of the proposed LLC converter can be represented by (1). This voltage serves as the input voltage for the boost converter. Therefore, the overall output voltage of the DC-DC converter is given by
V out = V LLC 1 d B
where dB represents the duty cycle of the switch TB in the boost converter. For the safe operation of the components, its value is set between 0 and 0.8.
Combining (1) and (12), the output voltage of the proposed DC-DC converter is given by
V out = 1 + d L 1 d B V c
Based on (13), it is evident that when the primary-side switches of the proposed LLC converter operate at the resonant frequency, adjusting the duty cycles of the secondary-side switch S5 and the boost converter switch TB can facilitate the proposed DC-DC converter to achieve an output voltage adjustment range of 1–10 times. However, in this configuration, it can only realize a step-up function. To enable the proposed DC-DC converter to achieve a step-down function when the required output voltage is lower than the input voltage, a frequency modulation control strategy is necessary for adjusting the output voltage. The following contents introduce the voltage regulation strategy of the proposed DC-DC converter based on the relationship between the output voltage and the input voltage.
  • Vout < Vin
In this scenario, the switch TB in the boost converter is always off, meaning the duty cycle dB is 0, and the boost converter remains inactive. The secondary-side switch S5 in the proposed LLC converter is also consistently off. In this case, the DC-DC converter operation is identical to that of a conventional LLC converter, and output voltage adjustment is achieved by modulating the operating frequency of the primary-side switches S1S4.
The relationship between the output voltage and the input voltage of the proposed DC-DC converter in this configuration is given by
V out = V i n [ ( 1 1 f N 2 ) Q f N ] 2 + [ ( 1 1 f N 2 ) L r L m + 1 ] 2
where fN = fs/fr, fs is the operating frequency of the primary-side switches in the proposed LLC converter, and fs > fr to achieve step-down operation. Q is the quality factor of the proposed LLC converter and can be determined as follows:
Q = π 2 L r / C r 8 n 2 R out
where n is the turns ratio of the transformer in the LLC converter resonant cavity, and Rout is the load resistance of the DC-DC converter.
The equivalent circuit of the converter in this operating mode is illustrated in Figure 7. In this case, the overall operational principle of the DC-DC converter is the same as that of a conventional LLC converter. However, due to the presence of the boost converter, the losses are higher than those in a conventional LLC converter. Therefore, the proposed DC-DC converter should avoid operating in step-down mode as much as possible.
2.
Vout > Vin
When the output voltage of the DC-DC converter is higher than the input voltage, the primary-side switches of the proposed LLC converter consistently operate at the resonant frequency. Output voltage regulation is achieved by adjusting the duty cycles of the secondary-side switch S5 and the boost converter switch TB. For a given output voltage, there are multiple combinations of duty cycles. For example, if Vout = 5 Vin, it can be achieved by setting either dL = 0 and dB = 0.8 or dL = 1 and dB = 0.6. The circuit losses vary between these scenarios. Therefore, it is essential to investigate how to set the duty cycles of both switches to minimize the overall losses in the circuit after determining the output voltage.
To achieve this goal, it is necessary to analyze the relationship between the losses of various components in the circuit and the duty cycles of the two switches. To simplify the analysis process, the following assumptions are made:
(1)
There are no transmission losses in the circuit when calculating the effective values of currents at various locations.
(2)
The inductor current in the boost converter is approximately constant.
When the output voltage of the DC-DC converter is Vout, the output current is given by
i out = V out R out
The current flowing through the inductor in the boost converter is given by
i L = i out 1 d B
At this point, the output power of the proposed LLC converter is
P out _ LLC = V LLC i L = 1 + d L 1 d B V c i out
Assuming that the transformer ratio in the resonant cavity is n:1:1, the following can be obtained:
P out _ LLC = V LLC i L = 1 + d L 1 d B V in n i out
Due to the neglect of transmission losses in the circuit, the effective value of the current flowing through the resonant inductor at this point is
I r _ rms = P out _ LLC V in = 1 + d L 1 d B i out n
Therefore, the current effective value on the secondary side of the transformer is
I s _ rms = n I r _ rms = 1 + d L 1 d B i out
Next, the losses of various components in the circuit are analyzed.
  • Power tube loss:
Due to the LLC primary-side switches achieving ZVS, they only incur switching losses, which can be determined by
P p _ off = I r _ rms 2 t off 2 f s 24 C oss
where toff represents the overlap time of current and voltage during the turn-off of switches S1S5, and fs is the operating frequency of the MOSFET.
The switches S5 and TB both operate under hard-switching conditions, and their switching losses can be separately calculated using (23) and (24):
P switchS 5 = 1 2 V in i out 1 d B f s ( t on + t off )
P switchT 1 = 1 2 ( 1 + d L ) V in i out ( 1 d B ) 2 f s ( t onT + t offT )
where ton is the overlap time of current and voltage during the conduction of switches S1S5, and tonT and toffT are, respectively, the overlap times during the conduction and turn-off of switch TB.
The conduction losses of the LLC primary-side switches S1S4, secondary-side switch S5, and boost converter switch TB can be determined by
P p - ON = 4 I r _ rms 2 R ds
P S 5 _ ON = ( d L 1 d B i out ) 2 R ds
P T 1 _ ON = ( d B 1 d B i out ) 2 R dsT
where Rds is the conduction resistance of switches S1S5, and RdsT is the conduction resistance of switch TB.
The losses of diodes D5 and D7 can be calculated as follows:
P D 5 , 7 = I s _ rms 2 R d
where Rd is the on-state resistance of the diode.
The losses of diodes D6 and D8 can be determined as follows:
P D 6 , 8 = [ ( 1 d L ) i out ] 2 R d
The losses of diode D9 can be calculated as
P D 9 = [ ( 1 d B ) i out ] 2 R d
Therefore, the total losses generated by the switching devices in the DC-DC converter are given by
P M _ T = P p _ off + P switchS 5 + P switchT 1 + P p - ON + P S 5 _ ON + P T 1 _ ON + P D 5 , 7 + P D 6 , 8 + P D 9
2.
Inductance loss:
Due to the small value of the transformer leakage inductance, which is insufficient to meet resonance requirements, an additional resonant inductor Lr needs to be connected in series. The losses generated by Lr can be divided into copper loss and iron loss, calculated respectively by
P C u _ L r = I r _ rms 2 R L r
P F e _ L r = k L f s α B m _ L β V L
where RLr is the AC equivalent resistance of the inductor, kL is the core loss coefficient, Bm_L is the maximum magnetic induction, VL is the core volume, α is the frequency loss exponent, and β is the magnetic induction loss exponent.
According to the assumption that the current through the boost converter inductor is approximately constant, the losses generated by the inductor LB can be expressed as
P L B = i L 2 R L B
where RLB is the DC equivalent resistance of the inductor, which can be measured using an LCR analyzer.
Therefore, the total loss of inductance in DC-DC converter can be expressed as
P L = P C u _ L r + P F e _ L r + P L B
3.
Transformer losses:
Transformer losses are divided into copper loss and iron loss. Copper loss consists of DC loss and AC loss. For the proposed LLC converter, only AC current flows through the resonant cavity during operation. Therefore, when calculating copper loss, it is only necessary to consider AC loss, and it can be expressed as follows:
P C u _ T = I r _ rms 2 R TP + 2 I s _ rms 2 R TS
where RTP and RTS represent the AC equivalent resistances of the primary and secondary windings of the transformer, respectively, and can be calculated using (37) and (38):
R TP = ρ l p A w
R TS = ρ l s A w
where ρ is the resistivity of the winding wire, lP is the length of the primary winding, lS is the length of the secondary winding, and Aw is the cross-sectional area of the transformer winding.
The iron loss in the transformer can be expressed as
P F e _ T = k T f s α B m _ T β V T
Therefore, the total losses generated by the transformer can be expressed as
P T = P C u _ T + P F e _ T
It should be noted that the impact of operating temperature on transformer losses has not been taken into account here. As indicated in References [22,23], it is known that during the operation of the converter, adjustments are required in the calculation methods for transformer losses as the temperature of the transformer rises.
When the output voltage of the DC-DC converter is Vout, as indicated by (13)
d L = n V out V in ( 1 d B ) 1
where dB ranges from 0 to 0.8, and dL ranges from 0 to 1.
If (41) is substituted into (20), (21), (24), and (26) and then combined with (31), (35), and (40), it becomes evident that the losses generated by individual components in the DC-DC converter are indeed correlated with the duty cycle dB. In other words, the total loss Ploss generated during the operation of the converter is related to the duty cycle dB.
P loss = f ( d B )
Once the output voltage of the converter is determined, selecting an appropriate duty cycle dB can minimize the total losses Ploss. The proposed minimum loss collaborative control strategy flowchart is illustrated in Figure 8.
Figure 9 depicts the overall control block diagram of the proposed DC-DC converter in this paper. By employing the introduced minimum-loss collaborative control strategy, it is possible to achieve overall minimum circuit losses while ensuring the stability of the output voltage.
In the process of loss calculation, numerous parameters are involved. All the symbols and specific meanings of these parameters are presented in Table A1 within Appendix A. Abbreviations and their full names are presented in Table A2 within Appendix B.

5. Simulation Verification

A simulation platform, constructed using MATLAB R2022b simulation software, was employed to validate the proposed DC-DC converter and minimum loss collaborative control strategy. Table 1 illustrates the parameter configurations of the DC-DC converter.
Figure 10 depicts the drive signals and terminal voltage waveforms of the primary-side switches S1 and S2 when the proposed LLC converter operates at the resonant frequency. As observed from the graph, at this moment, the primary-side switches of the proposed LLC converter achieve ZVS.
Figure 11 illustrates the waveforms of the currents, iLr and iLm, within the resonant cavity when the primary-side switches of the proposed LLC converter operate at the resonant frequency. This current waveform validates the correctness of the parameters set for the resonant cavity.
The output voltage of the DC-DC converter is set to 50 V. As analyzed earlier, at this point, the switches S5 and TB are both in the off state. Output voltage regulation is achieved by adjusting the operating frequency of the primary-side switches of the proposed LLC converter. Figure 12 illustrates the waveforms of the switch S1 drive signal, the current within the resonant cavity ir, and the output voltage of the DC-DC converter. From the graph, it can be observed that the operating frequency of the primary-side switches is approximately 180 kHz, and the proposed LLC converter operates in an over-resonant working state.
Figure 13 illustrates the waveforms of the input voltage and output voltage of the DC-DC converter when the duty cycle of switch S5 is 1, and the duty cycle of TB is 0.8. This validates that the proposed DC-DC converter can achieve a 10-fold voltage regulation range.

6. Experimental Verification

In order to further validate the practicality and effectiveness of the proposed DC-DC converter, an experimental platform, as shown in Figure 14, was constructed for experimental verification. Table 2 illustrates the component selections and instrumentations used in the experiments.
Figure 15 shows the drive signal and terminal voltage waveform of switch S1 when the primary-side switches of the proposed LLC converter operate at the resonant frequency. From the graph, it can be observed that the primary-side switches of the proposed LLC converter achieve ZVS, consistent with the simulation results.
Figure 16 illustrates the switch S1 input voltage, output voltage, and drive signal waveforms when Vout is set to 50 V in the DC-DC converter. From the graph, it can be observed that the proposed LLC converter operates in a frequency modulation mode. The operating frequency of the primary-side switches is approximately 180 kHz, closely aligning with the simulation results.
Figure 17 displays the waveforms of the input voltage, output voltage, and the drive signals for switches S5 and TB at different output voltages (Vout = 200 V, 400 V, 600 V, and 800 V). From the graphs, it can be observed that under various output voltage conditions, the proposed minimum loss collaborative control strategy adjusts the switches S5 and TB duty cycles, allowing the output voltage to reach the specified values.
Under the condition of an output voltage of 600 V, duty cycle combinations of the switches S5 and TB were varied to verify that the loss of the DC-DC converter under a minimum-loss control strategy is minimized. Experimental waveforms for different duty cycles are shown in Figure 18, where the experimental condition under the minimum loss collaborative control strategy is labeled as A, and the others are labeled sequentially as B, C, and D. The losses of the DC-DC converter under different duty cycle conditions are depicted in Figure 19.
The efficiency curve of the proposed converter is shown in Figure 20, covering the output voltage range from 50 V to 900 V at an output power of 5 kW. It can be observed from the graph that in the step-up operation mode, the proposed converter achieves high efficiency across the specified voltage range.
From Figure 17c and Figure 18, it is evident that for switches S5 and TB under different combinations of duty cycles, the output voltage consistently reaches 600 V. Additionally, Figure 17 indicates that when employing the minimum-loss collaborative control strategy, the overall loss Ploss of the DC-DC converter is minimized, resulting in an overall circuit efficiency exceeding 94%.
The experimental waveforms depicted in Figure 21 illustrate the voltage transients between 200 V and 400 V in the output, while Figure 22 shows the experimental waveforms associated with input voltage transitions between 50 V and 100 V. Figure 23 displays the experimental waveform for load transients. It is evident from these figures that the proposed DC-DC converter, coupled with the minimum-loss coordinated control strategy, enables the rapid adjustment of the circuit’s output voltage.

7. Conclusions

This paper proposes an efficient DC-DC converter with a wide output voltage range accompanied by a corresponding minimal-loss collaborative control strategy. The main advantages of the proposed system are as follows:
(1)
In comparison with traditional LLC converters, the newly proposed LLC converter in the DC-DC converter of this paper can operate at the resonant frequency in the majority of cases. Voltage regulation can be achieved solely through the operation of switch S5, thereby enhancing operational efficiency.
(2)
In contrast to existing wide-output-voltage-range DC-DC converters, the output voltage of the DC-DC converter presented in this paper can undergo a variation from 0.5 to 10 times the input voltage range. With a broader adjustment range and adopting a reusing inductor configuration, it exhibits superior integration compared to other configurations that employ large capacitor cascades in DC-DC converters.
(3)
The introduced minimal-loss collaborative control strategy ensures that the overall losses of the DC-DC converter are minimized while meeting the rated output voltage requirements. This enhances the converter’s operational efficiency, reaching a peak of up to 94%.

Author Contributions

Y.X. and G.Y. were involved in the full process of producing this paper, including conceptualization, methodology, modelling, validation, visualization, and preparing the manuscript. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Nature Science Foundation of China, grant number 61873226.

Data Availability Statement

Data is contained within the article.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

Due to the numerous parameters involved in the design scheme and loss calculations in this paper, Table A1 clearly presents the content and symbols of the parameters used in circuit design and loss calculations.
Table A1. Parameters and symbols in the circuit design and loss calculations.
Table A1. Parameters and symbols in the circuit design and loss calculations.
SymbolParameter
VcCapacitor voltage (C5 and C6)
VLLCLLC output voltage
fsLLC primary-side switching frequency
frResonant frequency
fNNormalized frequency (fs/fr)
dLDuty cycle of switch S5
dBDuty cycle of switch TB
QQuality factor of LLC
kExcitation inductance to resonant inductance ratio (Lm/Lr)
RoutDC-DC converter load resistance
ReqEquivalent circuit load resistance
ioutOutput current
iLBoost converter inductor current
Pout_LLCLLC output power
Ir_rmsResonant inductor current RMS
Is_rmsTransformer secondary-side current RMS
Pp_offPrimary side switch turn-off loss
CossOutput capacitor of switch
PswitchS5Switch S5 switching loss
PswitchT1Switch TB switching loss
Pp_ONSwitches S1S4 conduction loss
PS5_ONSwitch S5 conduction loss
PT1_ONSwitch TB conduction loss
RdsSwitches S1S5 conduction resistance
RdsTSwitches TB conduction resistance
PD5–9Diodes D5D9 losses
RdDiode conduction resistance
PM_TTotal switches losses
PCu_LrResonant inductor copper loss
PFe_LrResonant inductor iron loss
RLrResonant inductor AC equivalent resistance
kLCore loss coefficient
Bm_LMagnetic induction maximum
VTCore volume
αFrequency loss index
βInduction loss index
PLBInductor LB loss
RLBInductor LB DC equivalent resistance
PLTotal inductor loss
PCu_TTransformer copper losses
RTPTransformer primary winding AC equivalent resistance
RTSTransformer secondary winding AC equivalent resistance
ρWinding wire resistance
lpPrimary winding length
lsSecondary winding length
AwWinding cross-sectional area
PFe_TTransformer iron loss
PTTotal transformer losses
PlossDC-DC converter total losses

Appendix B

In Table A2, explanations for the abbreviations used in the manuscript are provided.
Table A2. Abbreviations and their full names.
Table A2. Abbreviations and their full names.
AbbreviationFull Name
ZVSZero Voltage Switching
ZCSZero Current Switching
PFMPulse Frequency Modulation
PWMPulse Width Modulation
RMSRoot Mean Square
HBHalf-bridge

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Figure 1. Wide-output-range DC-DC converter topology.
Figure 1. Wide-output-range DC-DC converter topology.
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Figure 2. The proposed LLC converter waveform diagram.
Figure 2. The proposed LLC converter waveform diagram.
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Figure 3. Current loop in charging mode.
Figure 3. Current loop in charging mode.
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Figure 4. Current loop in discharge mode. (a) Output voltage is 2Vc; (b) output voltage is Vc.
Figure 4. Current loop in discharge mode. (a) Output voltage is 2Vc; (b) output voltage is Vc.
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Figure 5. Voltage gain characteristics with fixed Q and variable k.
Figure 5. Voltage gain characteristics with fixed Q and variable k.
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Figure 6. Voltage gain characteristics with fixed k and variable Q.
Figure 6. Voltage gain characteristics with fixed k and variable Q.
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Figure 7. Step-down mode equivalent circuit diagram.
Figure 7. Step-down mode equivalent circuit diagram.
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Figure 8. Flowchart of the minimum loss collaborative control strategy.
Figure 8. Flowchart of the minimum loss collaborative control strategy.
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Figure 9. DC-DC converter control block diagram.
Figure 9. DC-DC converter control block diagram.
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Figure 10. Drive signals and terminal voltage waveforms of switches S1 and S2.
Figure 10. Drive signals and terminal voltage waveforms of switches S1 and S2.
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Figure 11. Waveforms of the currents iLr and iLm in the resonant cavity.
Figure 11. Waveforms of the currents iLr and iLm in the resonant cavity.
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Figure 12. Waveforms of the switch S1 drive signal, the current ir in the resonant cavity, and the output voltage of the DC-DC converter.
Figure 12. Waveforms of the switch S1 drive signal, the current ir in the resonant cavity, and the output voltage of the DC-DC converter.
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Figure 13. Waveforms of DC-DC converter input and output voltages for dL = 1 and dB = 0.8.
Figure 13. Waveforms of DC-DC converter input and output voltages for dL = 1 and dB = 0.8.
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Figure 14. Experimental platforms.
Figure 14. Experimental platforms.
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Figure 15. Switch S1: drive signal and terminal voltage waveform.
Figure 15. Switch S1: drive signal and terminal voltage waveform.
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Figure 16. At Vout = 50 V, switch S1 input voltage, output voltage, and drive signal waveforms.
Figure 16. At Vout = 50 V, switch S1 input voltage, output voltage, and drive signal waveforms.
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Figure 17. The input voltage, output voltage, and the drive signal waveforms of the switches S5 and TB are presented at different output voltages. (a) Vout = 200 V. (b) Vout = 400 V. (c) Vout = 600 V. (d) Vout = 800 V.
Figure 17. The input voltage, output voltage, and the drive signal waveforms of the switches S5 and TB are presented at different output voltages. (a) Vout = 200 V. (b) Vout = 400 V. (c) Vout = 600 V. (d) Vout = 800 V.
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Figure 18. Experimental waveforms when Vout is 600 V and S5 and TB are under different duty cycles. (a) Experiment B: dL = 0.2, dB = 0.8. (b) Experiment C: dL = 0.5, dB = 0.75. (c) Experiment D: dL = 0.8, dB = 0.7.
Figure 18. Experimental waveforms when Vout is 600 V and S5 and TB are under different duty cycles. (a) Experiment B: dL = 0.2, dB = 0.8. (b) Experiment C: dL = 0.5, dB = 0.75. (c) Experiment D: dL = 0.8, dB = 0.7.
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Figure 19. Converter losses when Vout is 600 V and the switches S5 and TB are under different duty cycles.
Figure 19. Converter losses when Vout is 600 V and the switches S5 and TB are under different duty cycles.
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Figure 20. The efficiency curve under various output voltage conditions.
Figure 20. The efficiency curve under various output voltage conditions.
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Figure 21. Experimental waveforms for sudden changes in output voltage. (a) Output voltage from 200 V to 400 V. (b) Output voltage from 400 V to 200 V.
Figure 21. Experimental waveforms for sudden changes in output voltage. (a) Output voltage from 200 V to 400 V. (b) Output voltage from 400 V to 200 V.
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Figure 22. Experimental waveforms for sudden changes in input voltage. (a) Input voltage from 50 V to 100 V. (b) Input voltage from 100 V to 50 V.
Figure 22. Experimental waveforms for sudden changes in input voltage. (a) Input voltage from 50 V to 100 V. (b) Input voltage from 100 V to 50 V.
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Figure 23. Experimental waveforms for sudden changes in a sudden load. (a) Experimental waveforms for load surge. (b) Experimental waveforms for load drop.
Figure 23. Experimental waveforms for sudden changes in a sudden load. (a) Experimental waveforms for load surge. (b) Experimental waveforms for load drop.
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Table 1. Parameter configurations of the DC-DC converter.
Table 1. Parameter configurations of the DC-DC converter.
ParameterSymbolSpecification
Resonant inductanceLr12.7 μH
Excitation inductanceLm63.5 μH
Resonant capacitanceCr198 nF
Charge/discharge branch capacitanceC5, C6470 μF
Output capacitanceCout470 μF
Input voltageVin100 V
Resonant frequencyfr100 kHz
Transformer turns ration:1:11:1:1
Table 2. Component selections and instrumentations.
Table 2. Component selections and instrumentations.
ComponentSymbolSpecification
LLC primary-side switchesS1S4SIHW73N60E
LLC secondary-side switchS5SIHW73N60E
Boost converter switchTBC2M0080120D
DC-DC converter diodeD5D9C4D40120H
Boost converter inductanceLB470 μF
ControllerDSPTMS320F28335
Oscilloscope-DPO2012B
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Xue, Y.; Yang, G. A Wide-Output-Range DC-DC Converter and Minimum Loss Collaborative Control Strategy. Energies 2024, 17, 499. https://doi.org/10.3390/en17020499

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Xue Y, Yang G. A Wide-Output-Range DC-DC Converter and Minimum Loss Collaborative Control Strategy. Energies. 2024; 17(2):499. https://doi.org/10.3390/en17020499

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Xue, Yuhang, and Guoliang Yang. 2024. "A Wide-Output-Range DC-DC Converter and Minimum Loss Collaborative Control Strategy" Energies 17, no. 2: 499. https://doi.org/10.3390/en17020499

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