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Article

A Step-by-Step Design for Low-Pass Input Filter of the Single-Stage Converter

1
The School of Automation, Wuhan University of Technology, Wuhan 430070, China
2
State Key Laboratory of Power Transmission Equipment & System Security and New Technology, Chongqing University, Chongqing 400044, China
*
Author to whom correspondence should be addressed.
Energies 2021, 14(23), 7901; https://doi.org/10.3390/en14237901
Submission received: 23 October 2021 / Revised: 18 November 2021 / Accepted: 19 November 2021 / Published: 25 November 2021

Abstract

:
Active power factor correction converters are often introduced as the front stage of power electronic equipment to improve the power factor and eliminate higher harmonics. A Boost or Buck-Boost converter operating in discontinuous current mode is always adopted to achieve high power factor correction. In addition, the input current contains a large amount of higher harmonics, and a low-pass input filter is commonly adopted to filter it out. In this paper, a single-stage high-frequency AC/AC converter is taken as an example to demonstrate the design method of a passive low-pass filter. Firstly, the input side of the grid needs to meet the power factor and harmonic requirements. The preset parameters are set to a range to characterize the performance of the LC filter. The quantitative design method of input filter is proposed and summarized. Moreover, the sensitivity of the filter parameters is analyzed, providing a direction in practical applications. Preset parameters are all proved to conform to the preset range through PSIM simulation. Finally, a 130-W prototype is established to verify the correction of proposed design method. The power factor is around 0.935 and harmonic content in the input current is about 26.4%. All requirements can be satisfied.

1. Introduction

In traditional electrical equipment, uncontrolled diode rectifiers or thyristor phase-controlled rectifiers with a large capacitor are often used to produce DC voltage [1,2]. Due to the nonlinearity of diodes and thyristors, the AC input current contains a large amount of harmonics, resulting in high total harmonic distortion (THD) and low input power factor (PF). The high harmonic currents might cause device malfunction, cause power substation overheating, interfere with the electrical devices nearby [3,4], etc. This prompted the establishment of power quality standards for household product emission limits (e.g., IEC555.2, IEC 61000-3-2, etc.) [5]. Active power factor correction (APFC) is widely used in modern electrical equipment, because it can reduce the THD of the input current and increase the power factor [6,7,8].
In small–medium power applications, single-stage converters (SSCs) are popularly used for APFC due to their simple circuit and low cost [9,10,11,12]. Figure 1 gives three typical types of single-stage converters based on the power factor correction (PFC) unit. Figure 1a shows the typical single-stage AC/DC converter-based PFC unit [13]. Figure 1b,c show the single-stage AC/DC converter based on the PFC unit with cascaded DC/DC and DC/AC unit, respectively [14,15], where the DC/DC and DC/AC unit are adopted to regulate the output voltage.
For the PFC unit, a Boost or Buck-Boost converter operating in discontinuous current mode (DCM) is often adopted to achieve high PF inherently in conditions where the duty cycle of the switch remains nearly constant [16,17]. In addition, the input filter is introduced to further reduce the higher harmonics in the input current, and thus the THD requirements can be satisfied. Due to the similarities in the analysis of single-stage converters, the integrated single-stage AC/AC converter demonstrate in Figure 1c is taken as an example to study the design method of the input filter. Certainly, the method proposed in the paper is also applicable for other structures of the SSC, such as single-stage AC/DC converters [18,19,20].
As shown in Figure 2, the single-stage high-frequency AC/AC converter [21] is used to transform the line voltage into high-frequency AC sinusoidal output voltage, and its amplitude is constant. Then the AC output voltage can be employed to drive a high-brightness light-emitting diode (HB-LED) through a passive high-frequency AC/DC converter with a constant current [22]. As mentioned above, the PFC unit employs a Boost converter operating in DCM to convert AC power into DC power, and a high power factor can be achieved at the AC input [23,24,25]. The DC/AC unit uses an LC-LC series–parallel resonant inverter in zero voltage switching (ZVS) mode to provide the constant AC sinusoidal output voltage whose THD is low, and zero voltage switching (ZVS) of all the power switches can be achieved [26,27,28]. A voltage feedback controller is needed for the converter to regulate the amplitude of the high-frequency AC output voltage.
Since the above Boost PFC unit works in DCM, the input current contains massive switching frequency ripple. In addition, the input filter is generally adopted to eliminate these ripples so as to reduce harmonic pollution. The input filter could be either an active filter or a passive filter [29,30]. Due to the simplicity and low cost of the passive filters, they are widely used in practical applications, such as LCL filter, LC filter, series damped filter, parallel damped filter, coupled-inductor filter and so on [31,32,33].
There are some references about input filters [33,34,35,36,37], which are summarized in Table 1. The DC input filter design for DC/DC and DC/AC converter can be found in [33,34]. The minimum-component filter has been analyzed in [33]. According to the analysis of different filter forms and their transfer function, ref. [33] gives the direction on how to design and adjust inductors and capacitors, but it is not a quantitative design. The DC bus filter in [34] is composed of a bulk capacitor, high frequency capacitor and LC DC input filter. However, ref. [34] focuses on the design of bulk capacitor without the LC input filter design. There are also some AC input filters [35,36,37]. A LCL filter design procedure with try and error method is proposed in [35]. The capacitor design is complicated because the initial values of the current ripple, and the converter-side inductor design are not mentioned. Ref. [36] proposed an iterative process to design the L and LCL filter parameters based on the analytical expression of the voltage harmonics. In addition, an LC filter design procedure for three-phase current source rectifier is proposed in [37], which demands an estimation of the ripple component shown in the input line currents.
To date, there are few studies referring to quantitative parameter design of the input filter for single-phase single-stage converters; the practical approach is to determine the parameters by making simulation trial and error correction, which seems to be time-consuming and of low efficiency. In this paper, the low-pass LC filter is chosen as the input filter of the PFC unit. Its design procedure is presented step by step. Please note that the proposed design method can also be applied to other types of input filters.
The main contributions of the work mainly include the following aspects: (1) A programmatic step-by-step design method for the LC input filter of single-stage converter is proposed in the paper, which offers an easy-to-use tool. (2) The precise design method is based on the restrictions of the input harmonic currents, so an accurate analytical design procedure is presented. The proposed method can also be applied to the design of other types of input filters. (3) The sensitivity analysis provides a method that can adjust input filter parameters to the expected value accurately, which is of great value in practical applications.
The remaining part of the paper is organized as follows: in Section 2, the circuit of the LC filter is analyzed in detail; in Section 3, a detailed step-by-step programmatic design of the filter is presented in terms of three input current conditions; the sensitivity analysis of the filter is presented in Section 4; and then simulation waveforms and key experimental results are given in Section 5 and Section 6, respectively; the conclusions are drawn in Section 7. Moreover, the symbols used in the design process are listed in Appendix A. The implementation design process of the inductor is shown in Appendix B. The derivations of several equations are added to Appendix C.

2. Circuit Analysis

Before the design of the input filter, necessary preparation work should be performed. Firstly, the known parameters and the preset parameters of the input filter are discussed. Since the LC filter is mainly to eliminate harmonic currents at multiples of the switching frequency, the root mean square (RMS) of the switching frequency harmonic current in the input current before filtering is analytically derived in this section. The above work lays the foundation for the design of filter parameters. Before that, the equivalent circuit of SSC should be presented and analyzed. The specific analysis is as follows.

2.1. Known and Preset Parameters of the Input Filter

Some reasonable assumptions are made as follows before the design of the filter.
(1)
No harmonics are contained in the input voltage.
(2)
The energy-stored capacitor CB is large enough so that its voltage ripple can be ignored and hence the duty cycle D of the switch SF is assumed to remain constant during half line cycle.
(3)
The input power of the converter Pin is equal to the output power P, which means the efficiency of the converter is supposed to be 100%, that is, η = 100%. In practical applications, the efficiency is less than 100%. Then it only needs to add corresponding coefficients between input and output for analysis, that is, Pin = P/η.
(4)
Because of the pulse-width modulation, the dominant harmonic components of the input current occur at or around the switching frequency and its multiples. The former is the main component. Hence, assume that all the energy in the input current spectrum is concentrated on the switching frequency.
For the design of the input filter, these values should be preset in advance: the input voltage uin, the converter power P, the Boost inductance LB and the switching frequency fSW. In addition, the precise design method is based on the restrictions of the input harmonic currents. Therefore, according to the operation principle of SSC, the following parameters need to be preset:
(1)
m is the ratio of the fundamental component amplitude UTPFm of the voltage across the AC side of the rectifier bridge to the voltage UB across the stored-energy capacitor CB. In addition, m must be slightly smaller than 0.9. One reason is that, considering the Boost-type PFC operating in DCM, the input power factor of the rectifier bridge can be ensured larger than 0.9 on condition that m is smaller than 0.9 [38]. Another reason is that a smaller m means a larger UB; m = 0.8 is chosen for comprehensive consideration.
(2)
The input fundamental power factor λF: to minimize the influence on the input power factor of the input filter, the phase angle must be small at fundamental frequency, so λF should be close to 1. Here, λF can be taken as 0.99 ≤ λF ≤ 1.
(3)
α is the ratio of the RMS value UTPF of the voltage drop uTP in fundamental component to the RMS value Uin of the input voltage uin. Additionally, α must be close to unity so that the voltage drop in the fundamental component across the filter is small, and an enhanced efficiency can be obtained as well as power density. Therefore, α can be taken as 0.98 ≤ α ≤ 1.02.
(4)
For the voltage drop uTP across the AC side of the rectifier bridge, β is the ratio of the RMS value UTPSW of the harmonic component at the switching frequency to the RMS value UTPF of the component at the grid frequency. In addition, β should be set within a small limit so that the input voltage of SSC has a limited amount of high harmonic ripple UTPSW to ensure the proper operation of the SSC. Therefore, β can be taken as 0.0005 ≤ β ≤ 0.005.
(5)
For the input current, γ is the ratio of the RMS value ITPSW of the harmonic component at the switching frequency to the RMS value ITPF of the fundamental component at grid frequency. It should be set within a small limit to reduce the harmonic current at the switching frequency. Therefore, γ can be taken as 0.0001 ≤ γ ≤ 0.001.
The interaction between the LC filter and the single-stage AC/AC converter involves the above parameters. Based on the above assumptions, and known and preset parameters, a passive LC filter is taken as an example to demonstrate the parameter design of the input filter for SSC in the next section.

2.2. Equivalent Circuit of SSC

This section is preparation for the filter design. The equivalent circuit of the SSC is firstly derived and analyzed according to its operating principle and performance properties. Then the RMS of the harmonic current at the switching frequency on the AC side of the rectifier bridge is computed.
Figure 3 gives an equivalent circuit of SSC based on the PFC circuit, where the DC/DC unit or DC/AC unit in the SSC is replaced by an equivalent resistor RB when operating in steady state.
In the above PFC circuit, the Boost inductor LB is designed for operation in the discontinuous current mode (DCM) with a fixed duty cycle. The duty cycle D is almost constant. Also, the inductor current iLB is discontinuous within an AC line cycle, so the envelope of input current is a sine waveform in phase with the AC line input voltage uin. Then high input power factor can be achieved inherently. The driving signal of switches QSF and QSR, input voltage uin and input current iTP are shown in Figure 4.
According to the above mentioned known and preset parameters, uTP is almost equal to uin, the following can be obtained
u TP u in = U inm sin ω t = 2 U in sin ω t
Additionally, according to the definition of m, the following can be obtained
U B = U TPFm m U inm m
The output power of SSC is expressed as
P = U B 2 R B
Then, RB can be derived from the following equation
R B = U inm 2 m 2 P
Since the Boost PFC unit is operating in DCM, the waveform of current iTP on the AC line side of the rectifier bridge and its waveform over one switching cycle TSW is drawn in Figure 4. Equation (5) is obtained by averaging iTP over one switching cycle.
i ¯ TP = D 2 T SW U inm 2 L B sin ω t 1 m | sin ω t |
From (5), the RMS of iTP at the fundamental frequency can be obtained as follows
I TPF = D 2 T SW U in A L B
where
A = 1 π 0 π sin 2 ω t 1 m sin ω t d ( ω t )
Approximately, the power of SSC can also be expressed as
P = U TPFm I TPFm 2 U inm I TPFm 2 = U in I TPF
From the above equations, the duty cycle D of the switch SB in the following can be obtained as
D = P L B U in 2 A T SW
From (9), the duty cycle D is determined, since Uin, P, LB, and TSW are all known, and iTP can also be determined. According to the principle of equivalence, SSC can be replaced by a current source. Therefore, the AC side equivalent circuit of SSC can be obtained as shown in Figure 5a. Base on the previous assumptions, the current source contains not only the fundamental component at the grid frequency, but also current ripples at the switching frequency. Using the principle of superposition, the two equivalent circuits when either component works alone are shown in Figure 5b and Figure 5c, respectively.
Because uTPF is almost in phase with iTPF by appropriate modulation, the current source iTPF can be replaced by an equivalent resistor RTPF, whose value can be calculated as (10).
R TPF = U in 2 P
For Figure 5c, to obtain the RMS value of iinSW, it is necessary to obtain the expression of iTPSW.

2.3. The RMS Value of the Current at Switching Frequency on the AC Side of the Rectifier—ITPSW

On the basis of the working principle of the Boost PFC unit, the instantaneous inductor current iLB (kTSW) can be expressed as (11) over the k-th switching period.
i LB ( k T SW ) = { u k L B ( t k T SW ) , t [ k T SW , ( k + D ) T SW ] U B D T SW + ( u k U B ) [ t ( k + D ) T SW ] L B , t [ ( k + D ) T SW , ( k + D + d k ) T SW ] 0 , t [ ( k + D + d k ) T SW , ( k + 1 ) T SW ]
where
u k = 2 U IN | sin ω k T SW |
In steady state, the inductance voltage-second balance is always met for Boost inductor LB and the following equation can easily be obtained:
d k = u k D U B u k
From (11) and (13), the expression of the square RMS value of Boost inductor current iLB over one switching cycle can be obtained as
i LB RMS , T SW 2 ( k T SW ) = 1 T SW k T SW ( k + 1 ) T SW [ i LB ( k T SW ) ] 2 d t = 1 T SW { 0 D T SW ( u k L B t ) 2 d t + D T SW ( D + d k ) T SW [ U B D T SW + ( u k U B ) ( t D T SW ) L B ] 2 d t } = D 3 3 ( T SW L B ) 2 U B · u k 2 U B u k
Based on (14), the expression of the square RMS value of Boost inductor current iLB over half line cycle is as follows:
i LB RMS , T 2 = 2 T k i LB RMS , T SW 2 ( k T SW ) T SW = 4 D 3 T SW 2 3 T L B 2 U B U in 2 k [ sin ( ω k T SW ) ] 2 U B 2 U IN | sin ( ω k T SW ) | T SW 2 D 3 T SW 2 3 L B 2 U in 2 1 π 0 π sin 2 ( ω t ) 1 m sin ( ω t ) d ( ω t ) = 2 D 3 T SW 2 3 L B 2 U in 2 A
From (5), the expression for the square RMS value of iLB can be derived as follows by neglecting the switching frequency:
i ¯ LB RMS , T 2 = 1 π 0 π [ D 2 T SW U inm 2 L B sin ( ω t ) 1 m sin ( ω t ) ] 2 d ( ω t ) = D 4 T SW 2 U in 2 2 L B 2 1 π 0 π [ sin ( ω t ) 1 m sin ( ω t ) ] 2 d ( ω t ) = D 4 T SW 2 2 L B 2 U in 2 B
where
B = 1 π 0 π [ sin ( ω t ) 1 m sin ( ω t ) ] 2 d ( ω t )
From Figure 3, the square RMS value of the current at switching frequency on the AC side of the rectifier is equal to the square RMS value of the switching frequency component of iLB, which can be expressed as (18).
I TPSW 2 = i ˜ LB RMS , T 2
Next, the square RMS value of iLB at the switching frequency can be obtained by the difference of the square RMS value of the total current iLB and the square RMS value of the current obtained by neglecting the switching frequency [37,39], which can be expressed as
i ˜ LB RMS , T 2 = i LB RMS , T 2 i ¯ LB RMS , T 2
The square RMS value of the total current iLB has been obtained as (15), and the square RMS value of the current obtained by neglecting the switching frequency has been obtained as (16); thus, Equation (19) can be derived as
i ˜ LB RMS , T 2 = i LB RMS , T 2 i ¯ LB RMS , T 2 = 2 D 3 T SW 2 3 L B 2 U in 2 A D 4 T SW 2 2 L B 2 U in 2 B
From (9), D can be replaced by known parameters Uin, P, LB, and TSW. Thus, according to (9), (18), (20), ITPSW2 can be obtained as
I TPSW 2 = i ˜ LB RMS , T 2 = i LB RMS , T 2 i ¯ LB RMS , T 2 = 2 P T SW 3 L B U in P L B A T SW P 2 B 2 U in 2 A 2
So ITPSW can be obtained from (21).

3. Parameter Design

A 130-W prototype is taken as an example for parameter design. The specific design process and a design example are provided in the following.

3.1. Step-by-Step Design Analysis

The filter parameters LF and CF are different when the input voltage uin and the input line frequency current iinF show different phase relationships. In addition, the phase relationships are related to the fundamental power factor λF. It is necessary to preset λF because the process of parameter design is different for different λF.
The filter design process can be divided into the following three scenarios:
(a)
the input line frequency current is in phase with the input voltage (resistive input current).
(b)
the input line frequency current leads the input voltage (capacitive input current).
(c)
the input line frequency current lags the input voltage (inductive input current).
The line frequency phasor model circuit of the filter is shown in Figure 6. Its KVL phasor equation is shown in (22).
U ˙ in U ˙ LFF U ˙ TPF = 0
It can also be expressed as
U ˙ in U ˙ LFF = U ˙ TPF
The phasor diagram of the equation for the above three cases is shown in Figure 7a–c. The corresponding λF in different cases is shown as follows.
(a)
Resistive input current
Resistive input current means that the input line frequency current iinF is in phase with the input voltage as shown in Figure 7a, so λF = 1. In addition, the RMS value UTPF is greater than the RMS value Uin from Figure 7a, and thus their ratio α can be restricted to 1 < α ≤ 1.02 in this case.
(b)
Capacitive input current
In the condition of capacitive input current, the input line frequency current iinF is ahead of the input voltage with an angle of φ as shown in Figure 7b. Obviously, φ is the fundamental power factor angle and cosφ = λF < 1. In this condition, the imaginary part of the input impedance in Figure 6 should be less than zero. The phase between the input voltage uin and the input line frequency current iinF should be as small as possible. Therefore, it can be preset as 0.99 ≤ λF < 1 according to the analysis in Section 2. Additionally, the RMS value UTPF is greater than the RMS value Uin from Figure 7b; thus, preset 1 < α ≤ 1.02 in this case.
(c)
Inductive input current
In the condition of inductive input current, the input line frequency current iinF lags the input voltage with the angle φ as shown in Figure 7c. Additionally, φ is the fundamental power factor angle and cosφ = λF < 1. In this condition, the imaginary part of the input impedance in Figure 6 should be greater than zero.
It is worth noting that the largest inductor value is needed in the case of inductive input current among all three scenarios, which results in larger filter volume and lower power density. Thus, the scenario of inductive input current should be avoided in the filter design. Hence, only the other two scenarios (resistive input current and capacitive input current) are taken into consideration here.
The specific analysis is as follows.
According to the definition of the preset parameters and the circuit parameters in Figure 5, Figure 6 and Figure 7, the parameters λF, α, β and γ can be obtained as follows. Specific derivation is shown in Appendix C.
λ F = R TPF R TPF 2 + ω L 2 ( L F + ω L 2 C F 2 R TPF 2 L F C F R TPF 2 ) 2
α = U TPF U in = R TPF ( R TPF ω L 2 L F C F R TPF ) 2 + ω L 2 L F 2
β = U TPSW U TPF = I TPSW U in ω SW L F | 1 ω SW 2 C F L F |
γ = I inSW I inF = I TPSW I inF | 1 ω SW 2 C F L F |
Next, the values of LF and CF should satisfy four Equations (24)–(27), and the way is to solve two of them first.
In the following process, the situation should be excluded when the imaginary part of the input impedance is greater than zero according to the above analysis.
Firstly, LF and CF can be solved by combining Equations (24) and (25). It can be obtained as
L F = R TPF ω L 1 λ F 2 1 + C F R TPF 2 1 + ω L C F R TPF 2 > 0
C F = ( α λ F ) 2 1 ω L R TPF   >   0
To express LF only with known and preset parameters, CF should be removed from (28). Then substitute (29) into (28), (28) can be derived as
L F = R TPF ω L ( 1 λ F 2 1 + ( α λ F ) 2 1 ) ( α λ F ) 2   >   0
Similarly, LF and CF can also be solved by combining Equations (26) and (27). Their expression can be obtained as
L F = β U in γ ω SW I inF = β U in 2 γ ω SW P in   >   0
C F = γ P in ± U in I TPSW β ω SW U in 2   >   0
In (28), the sign in front of UinITPSW is determined by the actual conditions, so that CF is a positive value.
LF and CF have been expressed in four expressions (29)–(32), and now their value needs to satisfy these equations at the same time.
The solution is to eliminate LF through (30) and (31) to get the relationship among λF, α, β and γ. Then eliminate CF through (29) and (32) to get the relationship among λF, α, β and γ. Next, solve the above two relationships related to λF, α, β and γ. In addition, select the appropriate value of λF, α, β and γ that satisfies the preset conditions. Finally, substitute the value of λF, α, β and γ into (29)–(32) to get the value of LF and CF. The specific steps are as follows.
From (30) and (31), the relationship between the parameters λF, α, β and γ can be obtained as
R TPF ω L ( 1 λ F 2 1 + ( α λ F ) 2 1 ) ( α λ F ) 2 = β U in 2 γ ω SW P in
Similarly, from (29) and (32), the relationship between the parameters λF, α, β and γ can be obtained as
( α λ F ) 2 1 ω L R TPF = γ P in ± U in I TPSW β ω SW U in 2
It is worth noting that (24) and (25) are derived from the circuit in Figure 5b, and the LC filter parameters only relate to λF and α. Similarly, (26) and (27) are derived from the circuit in Figure 5c, and the LC filter parameters only relate to β and γ. To satisfy the performance requirements, the constraints of the above four preset parameters should be satisfied at the same time according to the operation principle of SSC. Therefore, the parameters LF and CF should be jointly determined by (24)–(27). Through the above derivation, once the parameters λF, α, β and γ are chosen, LF and CF can be determined.

3.2. A Design Example

The specifications of the single-stage high-frequency AC/AC converter are as follows. Table 2 lists the system parameters for the design example of the LC input filter.
According to the derivation of (24)–(34), the entire design procedure for LC input filter is shown in the flowchart in Figure 8. The discussion is as follows.
Firstly, the precise design method is based on the restrictions of the input harmonic currents, so parameters λF, α, β and γ are preset in a variation range. RTPF and ITPSW appear in the expression of λF, α, β and γ in (24)–(27), so they should be calculated first. The values of LF and CF should satisfy four Equations (24)–(27) at the same time, and the solution is to eliminate LF and CF to get two relationships among λF, α, β and γ. Taking λF = 0.9 after analysis, two 3D Figures about (α, β, γ) can be obtained. Select one point in the intersection curve of two 3D Figures, the corresponding value of (α, β, γ) can be obtained. Then, LF and CF can be determined.
The specific step-by-step design process is in the following.
Step 1: Firstly, according to the analysis in Section 2, the variation range of parameters λF, α, β and γ are preset as 0.99 ≤ λF ≤ 1, 1 < α ≤ 1.02, 0.0005 ≤ β ≤ 0.005, 0.0001 ≤ γ ≤ 0.001. To simplify the calculation, λF = 0.99 is taken as an example in the design process, which corresponds to the capacitive input current condition. Next, it is only needed to determine the combination of (α, β, γ) according to (33)–(34). In addition, the influence of λF is analyzed at the end of this section.
Step 2: Except for parameters known and preset above, RTPF and ITPSW should be calculated below from (10) and (21).
RTPF = 372.3 Ω, ITPSW = 0.485 A
Step 3: Equations (33) and (34) can be sorted out as (36) and (37). Substitute the above parameters into (36) and (37), and two relationships about (α, β, γ) can be obtained. Draw two 3D Figures about (α, β, γ), which is shown in Figure 9. Check if the two 3D figures have an intersection.
β = γ ω SW P in R TPF ω L ( 1 λ F 2 1 + ( α λ F ) 2 1 ) U in 2 ( α λ F ) 2
β = ω L R TPF ( γ P in ± U in I TPSW ) ω SW U in 2 ( α λ F ) 2 1
Step 4: If the two 3D figures have intersection, draw 2D figures of the intersection curve. Otherwise, reset the range of above parameters to get the intersection curve. For given parameters, the intersection curve can be obtained in Figure 10.
Step 5: Selecting one point on the intersection curve, the corresponding value of (α, β, γ) can be obtained.
Step 6: LF and CF can be determined by (29)–(30) or (31)–(32).
According to the above analysis, taking α = 1.0005 as an example in Figure 10, it can be derived that β = 0.00281 and γ = 0.00041. Correspondingly, LF and CF can be determined by (29)–(30), that is, LF = 4.06 mH and CF = 1.25 uF.
In addition, the range of LF and CF can be also determined. According to (29) and (30), LF and CF are only related to α with a fixed λF. The relationship between LF and and α is shown in Figure 11, and the relationship between CF and α is shown in Figure 12. It can be seen that LF varies greatly with α while CF varies small.
Next, the influence of λF is considered. The corresponding LF and CF are listed in Table 3 when λF changes at the same operation point (α = 1.005). It can be seen that LF increases and CF decreases with increasing λF. The size of the filter is mainly determined by LF. The filter volume is larger and power density is lower when λF increases. LF is equal to 38.21 mH when λF = 1, resulting in a large inductor. Moreover, β exceeds the preset range when λF is greater than 0.998 as shown in Table 3. Then α needs to be increased to cause β to be within the preset range in this case. However, increasing α will result in larger LF. Therefore, the fundamental power factor λF is sacrificed a little bit for smaller filter size, which is taken as 0.99.

4. Sensitivity Analysis of LC Filter

The analysis of the design of LF and CF was performed in the previous section. The requirements of SSC can be satisfied with the LF and CF designed above. However, parameters may need to be adjusted in practical applications in terms of volume, loss, power density, etc. There is a correlation between LF and CF, and their value will also have an impact on the performance. In order to achieve this, the values of (α, β, γ) are changed to correspond to LF and CF. Therefore, it is necessary to qualitatively evaluate the influence of α, β and γ on the corresponding LF and CF. The sensitivity of the input filter to parameters α, β and γ is analyzed below.
The formula of the normalized sensitivity S x T is as follows. When x has a small change Δx, S x T is the ratio of the relative change of function T to the relative change of x, where Δx infinitely approach zero.
S x T = x T T x
From (30) and (31), LF can be expressed as
L F = R TPF ω L ( 1 λ F 2 1 + ( α λ F ) 2 1 ) ( α λ F ) 2 = β U in 2 γ ω SW P in
From (29) and (32), CF can be expressed as
C F = ( α λ F ) 2 1 ω L R TPF = γ P in ± U in I TPSW β ω SW U in 2
According to the design process in Section 3, the working point (α, β, γ) = (1.0005, 0.00281, 0.00041) and λF = 0.99 is chosen. Next, the normalized sensitivity of LF to α, β and γ is analyzed at this point.
From (39), this can be derived as
{ S α L F = α L F L F α = α 372.3 100 π ( 1 0 . 99 2 1 + 1 . 0005 2 0.99 2 1 ) 1 . 0005 2 0.99 2 L F α = 1975 . 26 S β L F = β L F L F β = β β γ 220 2 2 π × 10 5 × 130 220 2 γ 2 π × 10 5 × 130 = 1 S γ L F = γ L F L F γ = γ β γ 220 2 2 π × 10 5 × 130 β 220 2 γ 2 2 π × 10 5 × 130 = 1
Similarly, the normalized sensitivity of CF to α, β and γ can be calculated from (40).
{ S α C F = α C F C F α = α α 2 0.99 2 1 100 π × 372.3 C F α = α 0.99 2 = 1.021 S β C F = β C F C F β = β γ × 130 + 220 × 0.485 β 2 π × 10 5 × 220 2 C F β = 1 S γ C F = γ C F C F γ = γ γ × 130 + 220 × 0.485 β 2 π × 10 5 × 220 2 C F γ = 0.0005
According to the sensitivity analysis, the normalized sensitivities of LF and CF to α, β and γ are quantitatively analyzed above. The following results can be obtained.
As shown in (41), S α L F > 0, S β L F > 0, S γ L F < 0. It can be seen that LF increases with increasing α and β. In addition, LF decreases with increasing γ.
Similarly, S α C F < 0, S β C F < 0, S γ C F > 0. It can be seen that CF decreases with the increase of α and β. In addition, CF increases with the increase of γ.
It can also be seen that α has the greatest impact on LF, and the normalized sensitivity of β and γ to LF are similarly small. In addition, α and β have similar influences on CF, and γ has the smallest effect on CF. As α has such a big influence on LF, Figure 13 shows the relationship between S α L F and α.
It can be seen that S α L F is very large in the range of α, indicating that α has a greater influence on LF. In addition, it can be seen that the range of CF is small, while the range of LF is large, from Figure 11 and Figure 12, which is consistent with the above results.
According to the above analysis results, LF and CF can be changed according to the corresponding change trend in practical applications. More attention should be paid to LF, and it is more reasonable to adjust α at first when adjusting the value of LF. For example, if the inductor LF needs to be changed in terms of volume, α can be adjusted preferentially, and CF can be obtained accordingly, completing the adjustment process. The impact on performance can be reduced to a minimum in this way. In conclusion, sensitivity analysis provides a method that can adjust parameters to the expected value accurately, and the performance can be satisfied at the same time. It is of great value in practical applications and provide a guide in engineering applications.

5. Simulation Results

A 130 W prototype is built to verify parameter design. The input LC filter and the corresponding single-stage high frequency AC/AC converter is shown in Figure 14. The specifications of the simulation and experimental prototype are consistent with Table 2.
As for the closed-loop control, the output voltage is sampled and compared with the reference signal to get the error signal. After the error signal is processed by the PI compensator, a modulated signal is obtained, which is compared with the triangular carrier, then PWM signal can be obtained. Therefore, the closed-loop control on the output voltage can be achieved. The corresponding control block diagram is shown in Figure 14b.
From the parameter design process, it can be seen RTPF and ITPSW need to be calculated first. The results of RTPF and ITPSW have been shown in (34) with RTPF = 372.3 Ω, ITPSW = 0.485 A. In addition, the related preset and filter parameters are concluded in Table 4. The interaction between the LC filter and the AC/AC converter involves above parameters. In addition, these preset parameters can be accurately verified via simulations.
The simulation waveforms are obtained by PSIM, which is a simulation software package. The simulation input and output parameters are consistent with Table 2. Through PSIM simulation, the voltage and current before and after filtering are shown in Figure 15. Figure 15a,b show the waveforms of line voltage uin and input current iin, respectively, and the input current is ahead of the line voltage, so λF < 1. Figure 15c,d give the input voltage uTP and the input current iTP of the rectifier bridge, respectively. It can be seen that the higher harmonics in the current iTP can be mostly filtered out.
Next, it is necessary to analyze the harmonic content more accurately to verify the parameter design. The data of waveform iin, uTP, and iTP can be obtained by PSIM. Then these data can be processed by FFT analysis with MATLAB, and the frequency spectrum of the above simulation waveforms can be obtained as shown in Figure 16. The frequency spectrum of the input current iin, the input voltage uTP and input current iTP of rectifier bridge are shown in Figure 16a–c, respectively. It can be seen from Figure 16a that the harmonics in the input current are mainly the third, fifth, seventh and other low-order harmonics, and the filter parameters have little effect on it.
In addition, the peak values of the input current at fundamental frequency respectively obtained from Figure 16a,c are 0.878 A and 0.869 A, and that of the input current calculated from (6) is 0.836 A. The above three values are almost equal to each other.
In Figure 16c, the peak value of current at switching frequency is 0.617 A, and that of the current at 200 kHz, 300 kHz and 400 kHz are 0.267 A, 0.148 A, and 0.082 A, respectively, so the RMS value of above four can be calculated and the value is 0.491 A, which is equal to ITPSW = 0.485 A with an acceptable error.
Similarly, the preset parameters are verified as follows.
Parameter α: It can be seen from Figure 16b that the peak value of uTP at fundamental frequency UTPFm is about 311.291 V. Therefore, the ratio of the corresponding effective value UTPF to the effective value of the input voltage Uin is α = 1.00053, which conforms to the preset range of 1 < α ≤ 1.002.
Parameter β: In Figure 16b, the peak value of uTP at the switching frequency UTPSWm is about 0.871 V, and the ratio of the corresponding effective value UTPSW to the effective value of the input voltage Uin can be obtained as β = 0.002798, which conforms to the preset range of 0.0005 ≤ β ≤ 0.005.
Parameter γ: In Figure 16a, the peak value of iin at the switching frequency component IinSWm is about 0.000335 A, and the ratio of the corresponding effective value IinSW to its effective value at fundamental frequency IinF is γ = 0.000401, which conforms to the preset range of 0.0001 ≤ γ ≤ 0.001.
In addition, the input power factor is 0.949 on the basis of the simulation calculations. The total harmonic distortion (THD) of the input current is 25.8%, and the harmonic of each order meets the requirements of IEC61000-3-2 Class C, as shown in Figure 17. It can be seen that the above simulation results verify the correctness of the analysis and the validity of the design method.

6. Experimental Results

A 130 W experimental prototype is established to verify parameter design. The specifications of the experimental prototype are consistent with Table 2 and Table 4. Figure 18 shows a photograph of the experimental prototype. The control circuit is shown in Figure 14b, and the control board is TMS320F28335. The model of diodes DR1-DR4 was MUR860, and the model of switches SF and SR was IPP60R099C7. The output load is pure resistive, and the output voltage is constant because of the closed-loop control.
For capacitor CF, three capacitors are connected in parallel to provide the designed value of 1.25 uF. Considering the limited selection during the experiment, there is a certain deviation between the experimental value and the design value. In addition, the values of three parallel capacitors in the experiment are 0.82, 0.22 and 0.22 uF, respectively.
For inductor LF, the implementation design process of LF is shown in Appendix B.
Figure 19a–c below show the measured input current iin after filtered and current iTP at different input voltages. It can be seen that the envelope of iTP is sinusoidal and in phase with uin, which is consistent with analysis in Section 2. Additionally, it can be seen that the higher harmonics in the current iTP are greatly suppressed.
Figure 20 shows the enlarged input voltage uin and filtered current iin. The rated input voltage uin is 220 V. To present a more comprehensive result, waveforms under different input voltages are presented. From Figure 20a–c, the current zero-crossing point is ahead of the input voltage zero-crossing point. Therefore, it can be seen that the input current is always ahead of the input voltage as the input voltage changes. The capacitive input current case is satisfied, and corresponding λF is always less than 1, which is consistent with analysis in Section 3.
In addition, the experimental input power factor is about 0.935 at rated state when LC filter is involved to filter out the high-order harmonic components in the current iTP. The result meets the requirement of Energy Star [40].
Figure 21 shows the frequency spectrum of the input current obtained through experiment. It shows the content of each harmonic contained in the input current iin. Additionally, a comparison between the harmonic content obtained by the experiment and simulation is also presented in Figure 21. The simulation and experimental input currents mostly contain three, five, and seven harmonics. The experimental harmonic distribution is roughly consistent with the simulation results. The contents of the corresponding harmonics are roughly the same. Finally, the experimental input current THD is about 26.4%, which is slightly larger than the simulation results. In addition, IEC61000-3-2 Class C restrictions are marked in blue in Figure 21, and it can be seen that experimental current harmonics meet the IEC restrictions, which is also close to the simulation results. All in all, the experimental results verify the validity of the design method.
In order to completely present the experimental results, Figure 22 shows the experimental waveforms of the prototype at rated power. Figure 22a shows the switching voltage uSF and the switching current iSF at P = 130 W and uin = 220 V. The switching voltage of SR and the corresponding current are shown in Figure 22b. It can be seen that iSF and iSR are less than zero before the corresponding switch is turned on, and it means that their anti-parallel diodes are forced to conduct, so SF and SR can achieve zero-voltage switching (ZVS). Figure 22c represents the storage capacitor voltage uB with uin = 220 V. The average value of uB is less than 400 V. Additionally, Figure 22d shows the measured output voltage uAC with uin = 220 V. It can be seen that the sinusoidal output voltage can be obtained with fSW = 100 kHz.

7. Conclusions

In this paper, the AC side equivalent circuit of the single-stage converter is obtained using the superposition principle. Then, the RMS value of the input current on the AC side of the rectifier bridge is quantitatively calculated. Next, according to the known and preset parameters, the LC low-pass filter is designed in detail. A quantitative design method for the input filter was proposed. Meanwhile, the sensitivity of the inductor and capacitor in the filter were analyzed. The parameters α, β and γ are preset to a range characterizing the performance of the LC filter. According to the PSIM simulation results, the preset parameters α = 1.00053, β = 0.002798, γ = 0.000401 all conforms to the preset range. The correctness of the proposed design method can be verified. Finally, a 130-W prototype is established. Its measured input power factor is around 0.935 and its input current THD is about 26.4%, and the higher harmonics in the input current can be mostly filtered out, which satisfies IEC61000-3-2 Class C restrictions. The contributions of this paper can be summarized as follows.
(1)
The paper offers a quantitative parameter design method with several references. Therefore, me references just give the direction on how to design and adjust or design procedure with try and error method, which is complicated and time-consuming. The proposed method is a programmatic step-by-step design method, which is an easy-to-use tool for designing an LC input filter. Meanwhile, the precise design method is based on the restrictions of the input harmonic currents, so an accurate analytical design procedure is presented.
(2)
The sensitivity analysis provides a method that can accurately adjust input filter parameters to the expected value, and the performance can be satisfied at the same time.
It is also shown the inductor should be paid more attention in practical applications. It is more reasonable to adjust α first when adjusting the value of LF. It is of great value in practical applications and provides a direction in engineering applications.

Author Contributions

Conceptualization, methodology, data curation, writing Q.H., Q.L.; analysis, software, experiment Q.H., L.L., M.Q. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by National Natural Science Foundation of China, grand number 51577019.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

To improve readability, the symbols used in the design process are listed and added as an Appendix.
SymbolExplanation
uininput voltage
Uinthe RMS value of uin
uTPthe voltage drop across the AC side of the diode rectifier bridge
uTPFthe component of uTP at the grid frequency
UTPFthe RMS value of uTPF
UTPFmthe amplitude value of UTPF
uTPSWthe harmonic component of uTP at the switching frequency
UTPSWthe RMS value of uTPSW
iininput current
iinFthe component of iin at the grid frequency
IinFthe RMS value of iinF
iinSWthe component of iin at the switching frequency
IinSWthe RMS value of iinSW
iTPthe input current of the AC side of the diode rectifier bridge
iTPFthe component of iTP at the grid frequency
ITPFthe RMS value of iTPF
iTPSWthe component of iTP at the switching frequency
ITPSWthe RMS value of iTPSW
RTPFan equivalent resistor of the output of the LC filter at the grid frequency
UBthe voltage across the stored-energy capacitor
mm =UTPFm/UB
φthe input grid frequency current iinF lags the input voltage with angle φ
λFthe fundamental power factor λF = cosφ
αα = UTPF/Uin
ββ = UTPSW/UTPF
γγ = IinSW/ITPF

Appendix B

The implementation design process of the inductor LF is shown below.
According to the simulation results, the maximum of the input current is Imax = 1.2 A, and the RMS value of the input current is I = 0.63 A. The value of LF is 4.06 mH.
The EE magnetic core is adopted because it has good heat dissipation conditions, and its empirical value of current density is J = 420 A/cm2. Its current density proportional coefficient is Kj = 0.013 [41]. The maximum magnetic swing ∆Bmax can be set to 0.28 T. According to AP method (area product method) shown in [41], the formula of the selection of the inductor core is
A P = [ L Δ I Δ B max I max K j ] 4 3 = [ 4.06 × 10 3 × 1.2 0.28 1.2 0.013 ] 4 3 = 1 . 844   cm 4
Select the magnetic core whose AP value is greater than and closest to 1.844 cm4 by looking it up the table [41]. Therefore, EE40 is selected and its AP = 2.2 cm4.
Then turns N of the inductor LF is
N = L Δ I max Δ B max A e = 4.06 × 10 3 × 1.2 0.28 × 127 × 10 6 = 135
where Ae is the EE40 core column cross-sectional area, and Ae = 127 × 10−6 mm2.
Next, the air gap length δ is calculated as
δ = μ 0 N 2 A δ L × 10 2 = 4 π × 10 7 × 135 2 × 127 × 10 2 4.06 × 10 3 × 10 2 = 0 . 0727 cm
Finally, the conductor bare wire cross-section AL can be calculated according to the current density.
A L = I J = 0.63 420   cm 2 = 1.5 × 10 3   cm 2 = 0 . 15   mm 2
Looking up the AWG table [41], the available wire type is AWG-25, and its cross-sectional diameter is 0.1623 mm2.

Appendix C

To improve the readability and make the paper clearer, the analysis and derivation of Equations (24)–(27) in the paper are added. Actually, Equations (24)–(27) are obtained according to the basic circuit principle of Figure 5, Figure 6 and Figure 7.
For Equation (24), λF is the fundamental power factor and λF = cosφ as shown in Figure 7. As shown in Figure 6, if the equivalent impedance of the fundamental frequency phasor circuit is Z = R + jX, it can be derived that λF = R / R 2 + X 2 .
From Figure 6, the equivalent impedance Z can be derived as
Z = j ω L L F + 1 j ω L C F R TPF 1 j ω L C F + R TPF = R TPF + j ( ω L L F + ω L 3 C F 2 L F R TPF 2 ω L C F R TPF 2 ) 1 + ω L 2 C F 2 R TPF 2
Therefore, the fundamental power factor λF is deduced as
λ F = R R 2 + X 2 = R TPF R TPF 2 + ω L 2 ( L F + ω L 2 C F 2 R TPF 2 L F C F R TPF 2 ) 2
For Equation (25), according to Figure 6, the ratio of voltage UTPF to Uin is equal to the absolute value of the parallel impedance of the resistor and capacitor divided by that of the input impedance Z. Therefore, it can be deduced as
α = U TPF U in = | 1 j ω L C F R TPF 1 j ω L C F + R TPF j ω L L F + 1 j ω L C F R TPF 1 j ω L C F + R TPF | = | R TPF ( 1 + j ω L C F R TPF ) j ω L L F + R TPF | = R TPF ( R TPF ω L 2 L F C F R TPF ) 2 + ω L 2 L F 2
For Equation (26), the relationship between UTPSW and ITPSW needs to be derived first. According to Figure 5c, the ratio of voltage UTPSW to current ITPSW is equal to the absolute value of parallel impedance of inductor and capacitor Z1.
So it can be obtained as
U TPSW I TPSW = | j ω L L F 1 j ω L C F j ω L L F + 1 j ω L C F | = ω L L F | 1 ω L 2 L F C F |
Then, Equation (26) can be deduced as
β = U TPSW U TPF = I TPSW U in ω L L F | 1 ω L 2 L F C F |
For Equation (27), according to Figure 5c, the ratio of current IinSW to current ITPSW is equal to the absolute value of capacitor divided by the absolute value of parallel impedance of inductor and capacitor Z1, that is:
I inSW I TPSW = | 1 j ω L C F j ω L L F + 1 j ω L C F | = 1 | 1 ω L 2 L F C F |
Then Equation (27) can be deduced as
γ = I inSW I inF = I TPSW I inF | 1 ω SW 2 C F L F |

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Figure 1. Structures of the SSC with APFC function. (a) Typical single-stage AC/DC converter. (b) Integrated single-stage AC/DC converter. (c) Integrated single-stage AC/AC converter.
Figure 1. Structures of the SSC with APFC function. (a) Typical single-stage AC/DC converter. (b) Integrated single-stage AC/DC converter. (c) Integrated single-stage AC/AC converter.
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Figure 2. Single−stage high−frequency AC/AC converter with LC filter.
Figure 2. Single−stage high−frequency AC/AC converter with LC filter.
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Figure 3. Equivalent circuit of the SSC with LC filter.
Figure 3. Equivalent circuit of the SSC with LC filter.
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Figure 4. The operation waveforms of the PFC unit in steady state.
Figure 4. The operation waveforms of the PFC unit in steady state.
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Figure 5. (a) AC side equivalent circuit of SSC. (b) The equivalent circuit when the fundamental component works alone. (c) The equivalent circuit when the harmonic component works alone.
Figure 5. (a) AC side equivalent circuit of SSC. (b) The equivalent circuit when the fundamental component works alone. (c) The equivalent circuit when the harmonic component works alone.
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Figure 6. The line frequency phasor circuit.
Figure 6. The line frequency phasor circuit.
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Figure 7. The KVL relationship among voltage phasors. (a) Resistive input current. (b) Capacitive input current. (c) Inductive input current.
Figure 7. The KVL relationship among voltage phasors. (a) Resistive input current. (b) Capacitive input current. (c) Inductive input current.
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Figure 8. Design flow chart for LC low–pass filter.
Figure 8. Design flow chart for LC low–pass filter.
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Figure 9. The 3D figures about (α, β, γ).
Figure 9. The 3D figures about (α, β, γ).
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Figure 10. The corresponding 2D figures about (α, β, γ).
Figure 10. The corresponding 2D figures about (α, β, γ).
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Figure 11. The relationship between LF and α.
Figure 11. The relationship between LF and α.
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Figure 12. The relationship between CF and α.
Figure 12. The relationship between CF and α.
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Figure 13. The relationship between S α L F and α.
Figure 13. The relationship between S α L F and α.
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Figure 14. The input LC filter and the single−stage AC/AC converter with its control block diagram. (a) The input LC filter. (b) The single−stage AC/AC converter with its control block diagram.
Figure 14. The input LC filter and the single−stage AC/AC converter with its control block diagram. (a) The input LC filter. (b) The single−stage AC/AC converter with its control block diagram.
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Figure 15. The simulation waveforms. (a) Input voltage uin. (b) Input current iin. (c) PFC input voltage uTP. (d) PFC input current iTP.
Figure 15. The simulation waveforms. (a) Input voltage uin. (b) Input current iin. (c) PFC input voltage uTP. (d) PFC input current iTP.
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Figure 16. The frequency spectrum of the simulation waveforms. (a) The input current iin. (b) The input voltage uTP. (c) The input current iTP.
Figure 16. The frequency spectrum of the simulation waveforms. (a) The input current iin. (b) The input voltage uTP. (c) The input current iTP.
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Figure 17. The content of each order harmonic component in the input current through simulation.
Figure 17. The content of each order harmonic component in the input current through simulation.
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Figure 18. The prototype of the single-stage AC/AC converter.
Figure 18. The prototype of the single-stage AC/AC converter.
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Figure 19. The measured waveforms of input current iin after filtered and current iTP at different input voltages. (a) uin = 198 V. (b) uin = 220 V. (c) uin = 242 V.
Figure 19. The measured waveforms of input current iin after filtered and current iTP at different input voltages. (a) uin = 198 V. (b) uin = 220 V. (c) uin = 242 V.
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Figure 20. The enlarged waveforms of input voltage and current of Figure 19 at different input voltages. (a) uin = 198 V. (b) uin = 220 V. (c) uin = 242 V.
Figure 20. The enlarged waveforms of input voltage and current of Figure 19 at different input voltages. (a) uin = 198 V. (b) uin = 220 V. (c) uin = 242 V.
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Figure 21. The experimental frequency spectrum of the input current compared with IEC and simulation.
Figure 21. The experimental frequency spectrum of the input current compared with IEC and simulation.
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Figure 22. The experimental waveforms. (a) The waveforms of uSF and iSF. (b) The waveforms of uSR and iSR. (c) The voltage UB at uin = 220 V. (d) The output voltage uAC.
Figure 22. The experimental waveforms. (a) The waveforms of uSF and iSF. (b) The waveforms of uSR and iSR. (c) The voltage UB at uin = 220 V. (d) The output voltage uAC.
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Table 1. Different filter design reviews.
Table 1. Different filter design reviews.
Ref.Filter TypeApplicationQuantitative Design
[33]DC Input filterLC DC/DC converterNo
[34]DC Bus filterC + LCDC/AC stage of the AC/AC converterNo
[35]AC Input filterLCLThree-phase active rectifierNo
[36]AC Input filterL/LCLThree-phase active rectifierYes
[37]AC Input filterLCThree-phase current source rectifier Yes
ProposedAC Input filterLCSingle-phase single-stage converterYes
Table 2. Prototype specifications.
Table 2. Prototype specifications.
SpecificationsValue
Input voltage uin220 VAC/50 Hz
Output Power P = Pin130 W
Switching frequency fSW100 kHz
m = Uinm/UB0.8
Boost inductor LB150 μH
Turns ratio NR1.1
Energy storage capacitor CB110 μF
Series resonant inductor LS75 μH
Parallel resonant inductor LP12 μH
Series resonant capacitor CS42 nF
Parallel resonant capacitor CP145 nF
Output voltage uAC45 V
Output load RL 15.6 Ω
Table 3. The corresponding LF and CF when input fundamental power factor changes.
Table 3. The corresponding LF and CF when input fundamental power factor changes.
λF(α, β, γ)LF (mH)CF (uF)
0.990(1.005, 0.00281, 0.00041)4.061.25
0.991(1.005, 0.00296, 0.00041)4.281.19
0.992(1.005, 0.00313, 0.00040)4.641.12
0.993(1.005, 0.00333, 0.00040)4.931.05
0.994(1.005, 0.00358, 0.00040)5.300.98
0.995(1.005, 0.00390, 0.00040)5.780.90
0.996(1.005, 0.00431, 0.00040)6.380.81
0.997(1.005, 0.00489, 0.00040)7.240.72
0.998(1.005, 0.00579, 0.00039)8.790.61
0.999(1.005, 0.00749, 0.00037)11.990.47
1.000(1.005, 0.01297, 0.00021)38.210.38
Table 4. Preset and filter parameters.
Table 4. Preset and filter parameters.
SymbolValue
λF0.99
(α, β, γ)(1.0005, 0.00281, 0.00041)
LF4.06 mH
CF1.25 uF
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He, Q.; Liu, L.; Qiu, M.; Luo, Q. A Step-by-Step Design for Low-Pass Input Filter of the Single-Stage Converter. Energies 2021, 14, 7901. https://doi.org/10.3390/en14237901

AMA Style

He Q, Liu L, Qiu M, Luo Q. A Step-by-Step Design for Low-Pass Input Filter of the Single-Stage Converter. Energies. 2021; 14(23):7901. https://doi.org/10.3390/en14237901

Chicago/Turabian Style

He, Qingqing, Lei Liu, Mingyang Qiu, and Quanming Luo. 2021. "A Step-by-Step Design for Low-Pass Input Filter of the Single-Stage Converter" Energies 14, no. 23: 7901. https://doi.org/10.3390/en14237901

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