Design Optimisation of a Current-Fed Solid-State Transformer for MV Grid-Connected Applications ^†

Abstract

For integrating large batteries in the medium voltage grid, current fed solid-state transformers offer galvanic isolation and a significant weight and size reduction. While the power losses increase with frequency and flux density, the core volume is contrariwise. Therefore, a design optimisation to achieve minimum losses and/or a minimum volume is essential. An optimisation strategy is proposed in this paper to find the optimum operating frequency and core flux density under certain practical constraints such as winding voltage per turn, clearance between transformer windings, saturation flux density and minimum efficiency. Differently from previous works, the proposed strategy provides a holistic approach for the design considering all main power losses from all main components using nonsinusoidal voltage waveforms and different operating conditions. Analytical equations for the power losses calculation and the cores design are derived and validated using ANSYS and MATLAB Simulink software packages. Simulation results of the power loss calculation under different operating frequencies and duty cycles are presented and compared with the analytical results. A case study for designing a 1.0 MW, 0.6/18 kV current fed solid-state transformer is presented. The results of two optimisation objectives, minimum power losses or minimum total cores housing volume are also shown.

1. Introduction

The Energy Storage System (ESS) is becoming a crucial element in smart grids. ESS can smooth Renewable Energy Source output power, and provide grid support such as frequency balancing and voltage control. Traditionally, BESS is connected to the medium voltage (MV) grid (1–35 kV) via a bidirectional DC/DC converter, DC/AC converter and line frequency step-up transformer. Due to the limited voltage and current capabilities of the power electronic devices (up to 6.5 kV/25 A [1]), different power electronics topologies have been proposed. In general, these topologies can be divided into two main categories: transformer and transformerless [2]. In the transformer topology, a two- or three-level converter is connected to a step-up line frequency transformer [3,4]. The main disadvantages of this topology are the large size/weight of the line transformer and relatively lower overall system efficiency compared to other transformerless topologies [2]. In the transformerless topologies, there are two main subcategories: a series connection of semiconductors; and series connection of converter modules. In the series connection of semiconductors, the power electronics switches are connected in series. This requires a special design of the gate driver to ensure synchronous switching. In series-connected converter modules topologies, cascaded modules such as half-bridge or full-bridge are connected in series to increase voltage capability, or in parallel to increase current capability. There are diverse configurations such as Cascaded H-bridge [5] and Modular Multilevel Converter [6]. In these topologies, there is no gaelvanic isolation between the battery and the grid. Furthermore, they require a large number of battery cells to achieve a high dc voltage.

To realise the advantages of galvanic isolation, weight reduction and low battery voltage, SST can be employed [7]. An SST offers some advantages over the traditional line frequency transformer such as power flow control, voltage sag compensation, fault current limitation, reduced size and weight and improved power quality [1]. SST has mainly emerged from DAB technology. There are two main topologies for DAB, VF-DAB and CF-DAB [8]. In general, the term current-fed refers to an isolated converter where the filter inductor is on the primary side and the output filter consists of a single component capacitor [9,10]. Current-fed converters are boost-derived topologies. The term of current-fed converter first appeared in the early seventies, mainly on push-pull and flyback converters [11,12]. The voltage phase shift technique is employed to control power flow in VF-DAB. There are different control techniques to achieve the phase shift such as single-phase shift, dual-phase shift and triple-phase shift [13,14]. The dual-phase shift seems to be the most suitable control technique, according to [15]. VF-DAB suffers from several limitations of high input pulsating current, high circulating current through power electronic devices and magnetic components [4]. CF-SST topology, however, has been demonstrated to be meritorious over VF-SST, due to its lower input current ripple, lower transformer turns ratio and easier current control [16]. Moreover, not all H-bridges on both sides of the transformer are active as in the case of VF-SST. Only one H-bridge is acting as a boost/buck converter, and the other H-bridge is acting as a rectifier or passive rectifier (to reduce the current spike). Therefore, CF-DAB (also be referred to as Current Fed Solid State Transformer, CF-SST) is considered in this paper for grid-connected battery applications. In CF-SST, a choke coil is employed as intermediate energy storage [17]. The turn-off voltage spike is the main problem in CF-SST, due to the transformer leakage inductance. RCD snubber circuits, active clamp, zero current switching and secondary modulation can be employed to overcome this problem [16,18,19,20]. Despite the merits of CF-SST, flux saturation, core losses, thermal design and high voltages across power electronics switches are the main design challenges.

Therefore, achieving the optimum design goals is vital to obtain the benefits of CF-SST. A key parameter in the transformer design is the flux density. The optimum flux density value for the lowest power losses is normally found at the point where the copper losses and the iron losses are equal [21]. However, this method considers only sinusoidal waveforms, and hence ignores other harmonics.

The design optimisation of SST has been discussed extensively in the literature. Main objective functions are typically minimum losses [22,23,24,25] and or maximum power density (minimum volume) [26,27,28,29]. Other objectives include minimum dc-link capacitance [30] and minimum heatsink volume [31]. Typical optimisation parameters are flux density, current density, switching frequency, number of converter cells [22,25,26,28,29,30,31] and types of semiconductor devices [23,27]. In [22], the flux density is used as the main optimisation parameter, and the switching frequency is kept constant. In [25,26,27,28,29,30,31], however, switching frequency is used as the main optimisation parameter while the flux density is kept constant. Different methods are used for core power losses, including the General Steinmetz Equation, where sinusoidal waveforms are assumed [32], and the improved General Steinmetz Equation (iGSE) [33,34]. The Stiementz equation fails to give accurate results in the SST applications, as it mainly depends only on magnetic materials data provided by manufacturers, which are based on sinusoidal excitation. Moreover, the nonlinear nature of ferromagnetic materials means that adding the individual frequency components of a Fourier series is not possible to calculate the core losses. On the other hand, iGSE employing instantaneous flux density to calculate the core losses has proven to give good results for nonsinusoidal waveforms [35]. It is important to consider the effect of varying the switching frequency not only on the transformer losses but also on the power electronics, i.e., to consider the total losses of the system rather than the transformer losses on its own. Power electronic losses can be determined analytically [25,27,31], numerically [23] or experimentally [26]. While the experimental method is the most accurate, it cannot be used during the design optimisation stage, and is only useful for design validation. Numerical methods are more accurate than analytical ones, but their long execution time makes them less attractive if they are to be used by an optimiser that will need to call the loss calculation process a high number of times. However, none of the above papers uses a holistic design approach, considering power losses from all main components assuming nonsinusoidal excitation waveforms, while concurrently using both switching frequency and flux density as the optimisation parameters. Furthermore, all previously reported papers considered VF-SST topology for design optimization, and none have considered CF-SST where the choke coil becomes an integral part of the overall system.

This paper presents a design optimisation procedure for a DC/DC CF-SST for a battery to MV grid applications. All the main losses in the conversion stage are considered, which include power electronics and core and copper losses in the transformer and the choke coil. Non-sinusoidal voltage waveforms in the transformer are used for loss calculations. Stray loss is not considered in this paper due to the complexity of calculation, which depends on the transformer tank and steel construction. Typically, the stray loss is around 10–15% of the total transformer losses and requires 3-D Finite Element Analysis (FEA) for accurate calculation [36]. Analytical equations for the power losses calculation are derived and validated using the ANSYS and MATLAB Simulink software packages. The optimisation objectives can be chosen by the user as maximum efficiency or minimum volume, and the design parameters are flux density and operating frequency. The total volume includes the cores of the transformer and choke coil, in addition to that of the heat sink. The constraints are maximum winding voltage per turn, the width of the winding allowing for clearances, saturation flux density and minimum efficiency (in the case of minimum volume objective). The proposed method will determine the core dimensions of the transformer and choke coil, as well as the operating frequency and flux density. Therefore, the proposed method will serve as a useful tool for designing a DC/DC CF-SST, while ensuring that the core dimensions and operating frequency are optimised to achieve the required aim of either minimum losses or volume.

The main merits of the proposed method can be summarised as follows: firstly, it optimises the switching frequency and flux density at the same time, taking into account a holistic approach for calculating the system’s overall losses; and secondly, it provides the core dimensions of the transformer and coil choke.

2. CF-SST System Configuration

A CF-SST system consisting of a medium frequency transformer, choke coil and H-bridge converters connected in parallel at the low voltage side and series at the high voltage side is shown in Figure 1. The low voltage side is connected to the dc supply, and the high voltage side will be connected to a DC/AC Modular Multilevel Converter (MMC) (not shown in the figure) to interface the system to the MV grid. Figure 2 shows a circuit diagram for a simple CF-SST proposed in [16]. To transform the power from the dc supply to the grid, the choke coil and H-bridge 1 operate as a boost converter while in charging mode, H-bridge 2 operates as a buck converter regulating power and H-bridge 1 operates as a controlled rectifier. The inductance of the choke coil is assumed high enough to maintain a constant current through it. The switching events, currents and voltage waveforms are shown in Figure 3 [16,37] which will be used in the power loss calculations in the next sections.

D1 and D2 are the duty ratios to generate the gate signals for H-bridge 1 and of H-bridge 2, respectively. The reader is referred to [16] for more information on the converter operation.

3. CF-SST Power Losses Calculations

The CF-SST total losses include those of the transformer (core and copper), choke coil (core and copper) and power electronics (switching and conduction). More details about these losses and how they can be calculated are presented in the following subsections.

3.1. Transformer Core and Copper Losses

Core losses are normally calculated using empirical equations based on measured data, such as the Original Steinmetz Equation, which is applicable for sinusoidal excitation [32]. When the transformer is excited by non-sinusoidal waveforms, iGSE is used for square wave excitation, and it was shown that it gives accurate results compared to those obtained experimentally [38]. Iron losses by iGSE for square voltages can be shown to be given by [38]:

$$P_v=\frac{1}{T}{k}_i{\left(\Delta B\right)}^{\beta -\alpha }{\left|2\Delta B\right|}^{\alpha }{\left(DT\right)}^{1-\alpha },$$

(1)

$$k_i=\frac{K}{{\left(2\right)}^{\beta -1}{\left(\pi \right)}^{\alpha -1}\left(1.1044+\frac{6.8244}{\alpha +1.354}\right)}$$

(2)

$\Delta B$ can be calculated as [36,39]:

$$\Delta B=2B_m=\frac{V_{max}DT}{2N{A}_i},$$

(3)

The core losses in (1) are calculated per unit volume. To find the total core losses, the transformer core volume needs to be determined. This core volume is designed based on the operating frequency and core flux density, and can be calculated by [39,40,41]:

$$Vo{l}_c=2A_i\left(\sqrt{\frac{A_w}{r_w}}\left(r_w+1\right)+\frac{d_c}{\sqrt{K_c}}\right)$$

(4)

$d_c$ is given by:

$$d_c=\sqrt{4A_i/(\pi K_c})$$

(5)

The core dimensions $A_i$ and $A_w$ can be determined using the basic equations relating the design parameters such as $B_m$, $f\left(=\frac{1}{T}\right)$ and $S$, to the core dimensions as follows [40]

$$A_i=\frac{E_t}{4.44f{B}_m{K}_s}$$

(6)

$$A_w=\frac{S}{2.22J{A}_i{K}_s{K}_w{B}_{m}f}$$

(7)

where $E_t$ can be calculated as

$$E_t=K_t\sqrt{S/1000}$$

(8)

where:

$${\mathrm{K}}_t=\sqrt{4.44fr}$$

(9)

$P_{Tco}$ can now be calculated by multiplying the power per unit volume using (1) by the core volume using (4), as shown in (10).

$$P_{Tco}=P_{v}Vo{l}_c$$

(10)

$P_{Tcu},$can be calculated as in (11), based on the leakage inductance and winding ac resistances.

$$P_{Tcu}=I_{lk}{}^2{R}_p+\frac{I_{lk}{}^2}{N_a^2}{R}_s$$

(11)

$I_{lk}$ can be calculated as [16]:

$$I_{lk}=\overline{I_B}\sqrt{\frac{5-4D_1}{3}}$$

(12)

$R_p$ and $R_s$ can be calculated as in (13)and (14) [42]:

$$R_p={\rho }_c\frac{l_{pp}}{A_{cup}}\left[1+\left(\frac{{\left(r_{op}/\delta \right)}^4}{48+0.8{\left(r_{op}/\delta \right)}^4}\right)\right]$$

(13)

$$R_s={\rho }_c\frac{l_{ps}}{A_{cus}}\left[1+\left(\frac{{\left(r_{os}/\delta \right)}^4}{48+0.8{\left(r_{os}/\delta \right)}^4}\right)\right]$$

(14)

$l_{pp}$ and $l_{ps}$ can be calculated as in (15) and (16):

$$l_{pp}=\pi \frac{V_p}{E_t}\left(d_c+0.5\sqrt{A_i/K_c}\right)$$

(15)

$$l_{ps}=\pi \frac{V_s}{E_t}\left(d_c+0.5\sqrt{A_i/K_c}\right)$$

(16)

3.2. Choke Core and Copper Losses

The fluctuation of the flux density of the choke is very small due to the low ripple in the choke coil current. Therefore, the core losses per unit volume of the choke coil can simply be calculated using the Steinmetz empirical equation (assuming the same core material as that of the transformer) as [32]:

$$P_{vc}=K{f}^{\propto }{B}_{mc}^{\beta }$$

(17)

Based on (17) and the volume of the core, the choke coil core losses can be calculated as in (18):

$$P_{Cco}=MPL.A_{cuc}K{f}^{\propto }{B}_{mc}^{\beta }$$

(18)

$A_{cuc}$ can be calculated as in (19) (see Figure 4). MPL can be calculated as in (20):

$$A_{cuc}=W_c{H}_c$$

(19)

$$MPL=2\left(W_w+H_w+H_c\right)$$

(20)

$W_w,H_w$,$W_c$ and $H_c$ are shown in Figure 4. Normally, core dimensions have their values related to each other by known constants such as:

$$K_{wH}=H_w/W_w$$

(21)

$$K_{wc}=A_{wc}/A_{cuc}$$

(22)

$$A_{pc}=A_{wc}\times A_{cuc}$$

(23)

$A_{wc}$ equals $W_w\times H_w$, and $A_{pc}$ can be calculated as in (24) [43]:

$$A_{pc}=\frac{2En\times {10}^{-4}}{B_{mc}J{K}_u}$$

(24)

$En$ can be calculated as

$$En=0.5L_B{\overline{I_B}}^2$$

(25)

where $L_B$ can be determined based on the $D_1$ (see Figure 3 [37]), $f$, $V_B$ and $\Delta I_B$ as shown in (26) for the boost operation of the SST [16].

$$L_B=\frac{\left(D_1-0.5\right)V_B}{f\Delta I_B}$$

(26)

$W_w$ $H_w$ can be calculated based on (21). Based on (22) and (23), $A_{wc}$ and $A_{cuc}$ can be found. To find $H_c$, $A_{cuc}$ is assumed as a square cross-section.

The choke coil copper losses can be calculated as in (27):

$$P_{Ccu}=I_B{}^2{R}_c$$

(27)

$I_B$ can be calculated as in (28), and $R_c$ can be calculated as in (29):

$$I_B=\overline{I_B}\sqrt{\frac{{\left(1-0.5\vartheta \right)}^2+{\left(1+0.5\vartheta \right)}^2}{2}}$$

(28)

$$R_c=\rho \frac{N_c\times MLT}{A_{cuc}}$$

(29)

$MLT$ is calculated as in (30) and $N_c$ can be calculated by (31) [34].

$$MLT\cong \pi \left[\sqrt{H_c{}^2+W_c{}^2}+W_w\right]$$

(30)

$$N_c=\frac{K_{uc}{K}_f{I}_{B-rms}}{J\sqrt{A_{pc}{K}_{cc}}}$$

(31)

3.3. Power Electronics Losses

Power electronics losses have two main parts, conduction and switching. These losses can be calculated as [44,45]:

$$P_{cond\_T}=\frac{1}{T}{{\displaystyle \int }}_0^{ts}{i}_T\left(t\right).V_{ce}\left(t\right)dt$$

(32)

$$P_{sw\_T}=f{E}_{on+off}\left(V_{sw},i_T,T_j\right)$$

(33)

$$P_{cond\_D}=\frac{1}{T}{{\displaystyle \int }}_0^{td}{i}_D\left(t\right).V_f\left(t\right)dt$$

(34)

$$P_{sw\_D}=f{E}_{rr}\left(V_d,i_D\right)$$

(35)

Based on the switching frequency, power electronics switches datasheets, average and RMS values of the current and voltage of the power electronics switches, the power electronics losses can be calculated as in [37]. The total power electronics losses can be calculated as in [37].

$$P_{PE}=P_{cond\_T}+P_{sw\_T}+P_{cond\_D}+P_{sw\_D}$$

(36)

4. CF-SST Design Optimisation Strategy

To find the optimum combination of the flux density and operating frequency, a design procedure is proposed. Two objective functions can be used: maximum efficiency, or minimum volume. The volume here is the combined volume of the transformer $Vo{l}_T,$ chock coil$Vo{l}_{Cc}$ and converters’ heat sink $Vo{l}_{Hs}$.

$Vo{l}_T$ and $Vo{l}_{Cc}$ are given in (36) and (37), based on the core dimensions of the transformer and chock coil calculated in Section 3.1 and Section 3.2.

$$Vo{l}_T=2\left(2w_w+dc+l\right)\left(H_w+2dc+2l\right)\left(2w_c+dc+2l\right)$$

(37)

$$Vo{l}_{Cc}=2\left(2w_{wc}+dcc\right)\left(H_{wc}+2dcc\right)\left(2w_c+dcc\right)$$

(38)

$Vo{l}_{Hs}$ depending on the power electronic losses can be calculated as [46]:

$$Vo{l}_{Hs}=Vo{l}_r/{\mathrm{R}}_{th},$$

(39)

${\mathrm{R}}_{th}$ can be calculated as [46]:

$$R_{th}=\frac{T_j-T_A}{P_{PE}}$$

(40)

The optimisation constraints for both objective functions are voltage per turn ($E_t<\sigma )$, clearance between two coils ($l>$ $\xi$), transformer core flux ($B_{min}<B<B_{max}$) and the operating frequency ($f_{min}<f<f_{max})$. When the minimum volume objective function is used, a minimum efficiency constraint can be set. The flowchart of the design procedure is shown in Figure 5.

Initially, CF-SST rated power, input and output voltages are entered into the algorithm. In addition, all constants used in the design are entered. The design constraints$\sigma$, $\xi$ are set, as well as the initial flux density and operating frequency $B_o$ and $f_0$. Using these initial values, the dimensions of the transformer core are calculated. If $E_t$ is more than σ, $E_t$ is set to equal σ. If $l$ is less than ξ, the transformer window width is increased until $l>\mathsf{\xi }$. The core dimensions of the transformer and choke coil are then calculated according to (19) to (24), (43) and (44). Using these dimensions, the core and copper losses are calculated as in (10), (11), (18) and (27). The power electronics losses are calculated using (54) to (57). Based on the power electronics losses and (45), the heat sink volume is then calculated. Now all the volumes and losses have been determined. Depending on the optimisation target (minimum losses or minimum volume), the optimisation is carried out until the end criteria are met. The end criteria are the value difference between successive iterations, number of iterations and constraints tolerance.

5. Simulation Results

Simulation work contains two parts; the first part is a validation of the analytical power losses calculation. The second part is a case study for designing a 1.0 MW DC/DC CF-SST using the proposed method.

5.1. Validation of Power Losses

A 1.0 MW DC/DC is considered with a low voltage (supply side) of 600 V and a high voltage of 18 kV. Due to the high supply current (1.7 kA), four parallel H-bridges are employed to reduce the switches currents to 417 A. For the high voltage side, six series H-bridges are employed to reduce the voltage stress on the switches. The transformer dimensions are shown in

Table 1. Transformer Dimensions.

Parameter	Value
Iron core cross-section	0.0147 m2
Diameter of the core circumscribing circle	0.158 m
Width of winding window	0.216 m
Height of winding window	0.541 m
Number of primary turns	21 Turns
Number of secondary winding turns	325 Turns
Width of the winding allowing for clearance	0.004 m
Distance between windings	0.05 m
Height of winding	0.441 m

, and the choke coil dimensions are shown in

Table 2. Choke Coil Dimensions.

Parameter	Value
Iron core cross-section	0.0375 m2
Diameter of the core circumscribing circle	0.25 m
Width of winding window	0.178 m
Height of winding window	0.265 m
Number turns	36 Turns
Area product	23.48 m4

.

5.1.1. Transformer Core Losses

Core material SURA No18 [47] is used. Operating frequency and flux density values are set to 1.0 kHz and 0.96 T, respectively. Finite element analysis (FEA) is carried out using ANSYS Workbench to compare core losses against those calculated analytically. All the power losses curves at different frequencies from the core material datasheet are fed to ANSYS. ANSYS is employed to generate the constant of the power losses empirical Equations (1) and (17)) ($K,$ $\alpha$ and $\beta$). Figure 6 shows ANSYS transformer core model. The high voltage and low voltage windings are divided into two parts. The low voltage windings are placed near the core limb and the high voltage windings are placed over the low voltage windings to reduce the windings to ground voltage. A 1200 V input voltage waveform, as shown in Figure 7, is injected to the transformer primary winding. This voltage is the output of H-bridge 1 under discharging mode and 60% duty cycle. The FEA eddy current and hysteresis losses are shown in Figure 8 The average core losses of the transformer are determined by ANSYS for different duty cycles at the low voltage side and compared to those calculated analytically using (10); the results are presented in Figure 9. The difference between the analytical and numerical results is up to 18%. This is mainly due to the fact the parameters of the iGSE equation ($K,\beta$ and $\alpha$) are estimated by curves fitting of the materials losses curves under sinusoidal excitation, Equation (1). The difference decreases when the shape of the excitation voltage becomes closer to sinusoidal waveform.

It can be seen from Figure 9 that the core losses increase with the decreases in the duty cycle. This is due to the increase in the width of the injected voltage to the transformer.

5.1.2. Power Electronics Losses

A Simulink model for the CF-SST is built in the Matlab Simulink platform. The IGBT module 5SNG 0450X330300 [48] is used. The main parameters of this module are shown in

Table 3. IGBT Main Parameters (125 °C).

Parameter	Value	Parameter	Value
$V_{CE0}$	3.1 V	$E_{on+off}$	1.43 J
$I_{ref}$	450 A	$V_{f0}$	2.25 V
$V_{ref}$	1800 V	$E_{rr}$	0.58 J

. The IGBT junction temperature is assumed to be 125 °C. The on-state resistances for the IGBT ($r_{CE})$ and the diode ($r_f)$ are calculated from the typical on-state characteristic relationship between $V_{CE}$ and $I_C$. They are $r_{CE}=3.2\mathrm{m}\mathsf{\Omega }$ and $r_f=2\mathrm{m}\mathsf{\Omega }$ at 125 °C junction temperature. Matlab Simulink calculates the power electronics losses using a 3-D lookup table from the manufacturer datasheets [49], as shown in Figure 10 the switching instances, switch voltage, switch current and junction temperature are fed into a 3-D lookup table to obtain the instant switching losses. This table is based on the curves of the turn ON and OFF energy from the switches datasheet at different junction temperatures. The instant switching losses are averaged to obtain the switching losses. Similarly, for the conduction losses, the switch voltage, switch current and junction temperature are fed into another 3-D lookup table to obtain the instant conduction losses. This lockup table is based on the switch current and switch drop voltage at different junction temperatures Figure 11 shows the mismatch in power electronics losses calculated analytically, and by Matlab simulation at different switching frequencies and full load. The error is less than 11%. This error is due to the fact that in the analytical equations the switch current is assumed constant and equal to the supply or the load current while in simulation the switching transient current peaks are taken into account. Figure 12 shows the analytical results for the transformer copper and core losses, choke coil copper and core losses and power electronics losses at different operating frequencies and a fixed flux density of 1.0 T. At low frequencies, copper losses are dominant, while at frequencies higher than 200 Hz, power electronics losses become dominant. These curves depend on the core materials and power electronic devices technology. The core losses of the choke coil are small because the change of the flux density of the choke coil core is very small. The analytical equations are now validated, and can be used to design the SST.

5.2. CF-SST Design, Case Study

In this section, a case study for designing a new 1.0 MW CF-SST using the proposed optimisation strategy is presented. Before the design procedure is presented, however, the losses of the 1.0 MW CF-SST described in Table 2 under different operating frequencies and a fixed flux density (1.0 T) are discussed first, in order to highlight the importance of considering all losses when searching for the optimum values of the flux density and frequency. The total transformer losses (copper & core), power electronics losses and the total CF-SST losses (total transformer, choke coil and power electronics losses) are shown in Figure 13. If the transformer losses, on their own, and are considered as the main factor to find the optimum operating frequency, it will lead to operating the CF-SST at a suboptimal frequency in terms of overall losses. For example, if only the transformer losses are considered, the optimum frequency is 240 Hz and the total CF-SST power losses, at this frequency, is 34.94 kW (96.51% efficiency). If the power electronics losses are added and ignoring the choke coil losses, the optimum frequency is 150 Hz and the total losses are 37.93 kW (96.2% efficiency). However, if the total CF-SST power losses are considered, the optimum frequency is 280 Hz and the total power losses are 34.72 kW (96.52% efficiency), which is about 3% less (0.1% efficiency higher) if the transformer losses only are considered and about 10.4% less (0.4% efficiency higher) if the choke coil losses are ignored. This shows the importance of considering all losses when designing the CF-SST. The total CF-SST losses under different operating frequencies and core flux densities are shown in Figure 14. An operating frequency of about 350 Hz seems to be the optimum value for minimum power losses over a range of flux density from 0.1 T to 1.2 T. The optimisation algorithm presented in Section 4 is employed under constraints shown in (41). The unconstrained nonlinear optimisation algorithm is employed as the optimisation solver. The optimum operating frequency for minimum losses (maximum efficiency) is 372 Hz and flux density is 0.249 T. At these values, the CF-SST system efficiency is 96.7%. In some applications, the volume/weight is the key parameter for the design. Figure 15 shows the total volume of the cores housing (transformer and the choke coil) under different frequencies and flux density values.

$$\begin{array}{c}{E}_t<100\\ Vl>0.5\mathrm{m}\mathrm{m}\\ 0.1\mathrm{T}<B_m<1.2\mathrm{T}\\ 40\mathrm{H}\mathrm{z}<f<12\mathrm{k}\mathrm{H}\mathrm{z}\end{array}\}$$

(41)

The color of the surface represents the percentage of the total losses. The higher the operating frequency, the lesser the core volume, but at the expense of increased losses.

Table 4. Transformer Dimensions.

Efficiency	Optimum Flux [T]	Optimum Frequency [Hz]	Total Cores Volume [m3]
>80	1.2	3613	1.142
>90	1.2	3275	1.144
>92	1.2	2318	1.199
>93	1.2	1840	1.274
>94	1.2	1359	1.419
>95	1.18	962	1.684
>95.5	1.056	809	1.8988
>96	0.903	647	2.245
>96.5	0.651	470	3.001
>97.5	0.249	372	5.245
>98	Not achievable

shows the design results when the objective function is selected as a minimum volume for different minimum efficiency constraints. Additionally, Figure 16 shows the volume for each core and heatsink at the minimum efficiency constraints. The volume of the cores increases with the increase of the minimum efficiency due to the decrease in the frequency, while the heat sink volume decrease due to the power electronics losses decrease with the decrease of the frequency. If the power losses are not the key factors in the design, the lowest volume of the CF-SST cores can be achieved. If the system efficiency is the key factor, a tradeoff between the efficiency and the volume of the core can be considered. To gain a minimum core volume for maximum possible efficiency, the optimum operating frequency is 372 Hz and the flux density of 0.249 T. In this case, CF-SST efficiency is greater than 97.5%.

6. Conclusions

The current source solid-state transformer (CF-SST) optimisation strategy for MV grid-connected systems is presented. Based on the manufacturer datasheets, core and power electronic losses equations are derived. The nonlinear nature of the transformer voltage waveforms is considered when calculating the core losses. Analytical equations are verified numerically using ANSYS and MATLAB. A design optimisation strategy has been presented, with the objective function being minimum power losses or minimum core housing volume.

The constraints are the voltage per turn for the transformer, the clearance between the transformer windings, the minimum and the maximum operating frequency and the flux density and the minimum efficiency. A 1.0 MW, 0.6/18 kV CS-SST is considered as a case study. Comparing the results in the last section, for fixed flux density 1.0 T, the optimum frequency is 284 Hz, which has 34.72 kW losses (96.53% efficiency) when employing the optimiser, which gives 0.01% higher than the value in the previous section.

For minimum losses, the optimum operating frequency is 372 Hz and the flux density is 0.249 T. In this case, the CF-SST efficiency is 96.7%. For a minimum total cores housing volume and converters heat sink volume, the minimum possible volume is 1.142 m³ at operating frequency 3613 kHz and the flux density 1.2 T to achieve CF-SST minimum efficiency of 80%. For minimum possible volume for maximum possible efficiency (97.5%) is 5.245 m³. The operating frequency, in this case, is 372 Hz and the flux density is 0.249 T.

The merit of the proposed method lies in its simplicity as it enables the designer to optimise the system parameters, including operating frequency, flux density and core dimensions fairly quickly using an algorithm that is based solely on analytical equations. This fast design procedure, however, produces less accurate results, mainly in terms of core losses, as compared to numerical methods. This is because the analytical equations used in the optimiser are based on empirical equations or some assumption for simplicity. Nevertheless, the proposed method would be very useful for practicing engineers as an initial fast optimisation step, enabling them to take design decisions before building a detailed numerical model. The numerical model can then be used for design verification and tuning.

This paper did not consider stray inductance and capacitance, and these will therefore be considered in future work. Furthermore, future work includes employing different core materials, power electronics parameters, converters configuration and cooling systems for the transformer and converters.