A Topology Synthetization Method for Single-Phase, Full-Bridge, Transformerless Inverter with Leakage Current Suppression—Part II

Abstract

This paper proposes a topology derivation methodology to achieve small leakage current or zero leakage current for photovoltaic application. The core of the proposed method is a unified topology model and MN principle to show how to derive all possible topologies based on unipolar sinusoidal pulse width modulation (USPWM) and double-frequency USPWM (DFUSPWM). Part II of this paper discusses the topology synthetization method to achieve zero leakage current. Two types of neutral point clamped (NPC) topologies based on USPWM and DFUSPWM are elaborated. Two possible connections for the NPC cell are introduced, and detailed NPC topology derivation procedures are also provided. All existing NPC topologies are derived, and twenty-two new NPC topologies are found based on the new topology derivation methodology for a single-phase, full-bridge, transformerless inverter.

1. Introduction

Photovoltaic (PV) sources have been developed as one of the most promising renewable energy sources, providing clean, reliable, and emission-free energy [1,2]. The single phase, transformerless grid-connected inverter has widely been used throughout the world. Considering the electrical connections between the PV panels and utility grid for transformerless, grid-tied systems [3,4,5], the leakage current generated by the PV parasitic capacitors must be limited in order to meet the safety requirement, such as standards of VDC-AR_N 4015 [6], UL1741 [7], VDE 0126-1-1 [8]. Therefore, small and even zero leakage current in transformerless PV inverter systems are a primary priority for designers.

The leakage current can be limited in full-bridge transformerless inverters if the common mode (CM) voltage is zero [9,10]. Some state-of-the art-topologies, such as the H5 inverter topology [11], as shown in Figure 1a, HERIC [12,13], and H6 inverter topologies [9,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44], have been developed from the full-bridge inverter topology. However, there is still a small leakage current as the CM voltage no longer remains constant under parasitic parameter inflection throughout the whole line-frequency (50 Hz or 60 Hz) period. The CM voltage is indeed variable in freewheeling mode because of the potential variation induced by the charging of the switch junction capacitance. The Neutral Point Clamped (NPC) technique is introduced in these topologies to achieve zero leakage current [45,46,47,48,49,50,51,52].

The famous dc-based H5 inverter is adopted as an example to explore the inherent leakage current generation caused by the switch junction capacitors. Figure 2 shows the transient operation of H5 and optimized H5 [53].

During the positive half cycle, switches T₁, T_P2, and T_P3 are turned on, and switches T_N2 and T_N3 are turned off. Then, switches T₁ and T_P2 are turned off. Simultaneously, the body-diode of switch T_N2 does not conduct to go into freewheel mode. At this moment, junction capacitors C_S1 and C_P3 are charged while junction capacitors C_N2 and C_N3 are discharged. The transient charging and discharging operation from the power delivery mode to the freewheeling mode is demonstrated in Figure 2a. The voltage V_AN decreases and V_BN increases. The body-diode of switch T_N2 is conducted to enter the freewheeling mode when the voltage C_N2 is lowered to zero.

The equivalent circuit is illustrated in Figure 2b and the voltages V_AN and V_BN can be derived by (1)

$$V_{\mathrm{AN}}=V_{\mathrm{BN}}=\frac{{\mathrm{C}}_{\mathrm{P}3}+{\mathrm{C}}_{\mathrm{N}3}}{{\mathrm{C}}_{\mathrm{S}1}+C_{\mathrm{P}3}+C_{\mathrm{N}3}}{V}_{\mathrm{dc}}$$

(1)

From (1), the steady-state voltage V_AN, V_BN is determined by the junction capacitors of the switches. The switch junction capacitors are approximately from several hundred picofarads to several nanofarads. The parasitic capacitor C_pv is around one hundred nanofarads [16,18,45]. If C_S1 = C_P3 + C_N3, the voltages V_AN and V_BN are both equal to V_dc/2. This indicates that the total high-frequency CM voltage is V_dc/2. Unfortunately, for most industrial applications, C_S1 ≠ C_P3 + C_N3. This means that the total high-frequency CM voltage is not kept constant, which leads to unexpected leakage current. Furthermore, in freewheeling mode, the terminals A and B are floating, and an additional resonant path is formed, which is illustrated in Figure 2b. A high-frequency resonance occurs, which also may lead to the generation of leakage current. The resonance frequency can be calculated by

$$f_r=\frac{1}{2\pi \sqrt{{\mathrm{L}}_{\mathrm{eq}}{\mathrm{C}}_{\mathrm{eq}}}}$$

(2)

where

$${\mathrm{L}}_{\mathrm{eq}}=\frac{\mathrm{L}1\ast \mathrm{L}2}{\mathrm{L}1+\mathrm{L}2};{\mathrm{C}}_{\mathrm{eq}}=\frac{{(\mathrm{C}}_{\mathrm{S}1}{+\mathrm{C}}_{\mathrm{P}3}{+\mathrm{C}}_{\mathrm{N}3}{)\mathrm{C}}_{\mathrm{PV}}}{{\mathrm{C}}_{\mathrm{S}1}{+\mathrm{C}}_{\mathrm{P}3}{+\mathrm{C}}_{\mathrm{N}3}{+\mathrm{C}}_{\mathrm{PV}}}\approx {\mathrm{C}}_{\mathrm{S}1}{+\mathrm{C}}_{\mathrm{P}3}{+\mathrm{C}}_{\mathrm{N}3}$$

(3)

To clamp the CM voltage to half of the dc-link voltage in freewheeling mode, the bus capacitors are divided into two same-series capacitors, and a clamping cell should be inserted between the midpoint of the series bus capacitors. This can provide a constant CM voltage, which can eliminate the effect of the junction capacitors of the switches. Figure 1b shows the OH5 topology with the NPC cell. Switch T_B1 turns on to connect point A (or B) to point O in freewheeling mode. A new circuit configuration for the inverter with a single dc-link capacitor and seven insulated gate bipolar transistors (IGBTs) is proposed in [54]. The additional switch is turned on in the freewheeling modes, and two turn-OFF snubber circuits are added in parallel to the switches in order to share the input dc voltage between the snubber capacitors. As a result, the leakage current can be eliminated completely because the bridge voltages can be clamped at half dc-link voltage in the freewheeling modes. Two neutral point clamping circuits, which are common collectors and common emitters, are proposed in [55], and then a family of single-phase inverters is presented.

In theory, many topologies that could suppress leakage current. Some of them have been studied intensively and patented. However, some may not have been studied or even found. The purpose of this paper is to propose a systematic topology deduction method to obtain all the topologies with the ability to suppress leakage current to zero in theory [56]. Part II of this paper investigates the rules by which to synthesize the two type of NPC topologies to achieve zero leakage current. The first one is called “indirect connection NPC topology”, and the other is called “direct connection NPC topology”. Part II of this paper is organized as follows: Section 2 proposes the rules by which to synthesize the two type of NPC cells. Section 3 introduces two topology families based on indirect connection NPC cells from USPWM. Section 4 provides two topology families based on direct connection NPC cells from USPWM. The proposed topology derivation methodology is also extended to DFUSPWM in Section 5. The simulation results are provided to verify the performance of the proposed topologies in Section 6, and Part II of the paper is concluded in Section 7.

2. NPC Cells for USPWM

To substantially reduce the leakage current, the CM voltage V_CM should be clamped to half of the input voltage in freewheeling mode, including in PF and NF modes. Points A and B are short-circuited to achieve V_AB = 0 in freewheeling mode. The extra circuit, called “NPC cell”, will be introduced to clamp the CM voltage and achieve zero leakage current. The NPC cell is made of two series capacitors and some additional switches. The DC bus capacitor is split into two identical capacitors, C₁ and C₂, in series. Due to the participation of the NPC cell, point A (or point B) is connected to midpoint O between C₁ and C₂, which guarantees that the CM voltage is half of the input voltage in PF mode and NF mode. The terms T_PF and T_NF are used to refer to the equivalent switch in the freewheeling branch in PF mode and NF mode, respectively. There are two basic rules concerning the NPC cell. Rule 1 is used to make full use of the original freewheeling switching devices in the topology and minimize the number of switches to be added. Rule 2 is used to give the locations where the switching devices of the NPC cell should be added.

Rule #1:

To reduce the number of switches in NPC cell, both T_PF and T_NF are turned on in freewheeling mode, including in PF and NF modes.

Rule #2:

Additional switches are added and connected to the freewheeling branch so that point A or B is clamped to point O.

Based on Rule #1, it is possible that T_NF works for the NPC cell in PF mode, and T_PF in NF mode. So, the number of switches needed in the NPC cell is reduced.

Based on Rule #2, two possible connections are available. One is that additional switches are added between point O and a point from the freewheeling branch. This type of connection is defined as an “Indirect Connection”. The other is that additional switches are inserted into the freewheeling branch which is connected to point O due to the injection of additional switches. This type of connection is defined as a “Direct Connection”.

Figure 3 shows the schematic diagram of the Indirect Connection of a unified NPC cell for USPWM.

Two capacitors with the same capacitance value are connected in series to halve the input voltage. Point O is the midpoint of these two capacitors. Additional switches are added between points O and G in Figure 3a and between points O and H in Figure 3b. It should be noted that points G and H are from the freewheeling branch. Figure 3a shows the Indirect Connection in PF mode, which means the actual current flows from point G to point O. Figure 3b shows the NF mode operation, which means that the actual current flows from point O to point H.

Figure 4 shows a schematic diagram of the Direct Connection of the unified NPC cell for USPWM. As shown in Figure 4a, additional switches marked by the green bump branch $\widehat{\mathrm{HI}}$ are inserted into the freewheeling branch $\widehat{\mathrm{BCA}}$, so that $\widehat{\mathrm{BCA}}$ is connected to the midpoint O. Points H and I are from the freewheeling branch.

Figure 4b shows the NF mode operation. The additional switches marked by the green branch $\widehat{\mathrm{KJ}}$ are inserted into the freewheeling branch $\widehat{\mathrm{ADB}}$, and $\widehat{\mathrm{ADB}}$ is connected to the midpoint O due to the injection of $\widehat{\mathrm{KJ}}$.

3. Inverter Topologies Based on the Indirect Connection of NPC Cell from USPWM

As with the Indirect Connection of the NPC cell shown in Figure 3 the freewheeling branch is connected directly through additional switches to point O to achieve zero leakage current. Part I of this paper has described the development of all the possible topologies of inverters with low leakage current where the freewheeling branch is not connected to the capacitor midpoint O. The topologies with NPC cells can be derived based on the non-NPC topologies derived in Part I of this paper. There will be one NPC inverter topology corresponding to each non-NPC inverter topology derived in Part I.

This section focuses on how to derive the inverter topologies based on the Indirect Connection of an NPC cell under USPWM. Two topology families from the unified topology model have been described in Part I. One has an extra diode which is used to flow freewheeling current, and the other has no extra diode, but rather, body-diode switch is used to flow freewheeling current. Correspondingly, the inverter topologies with the Indirect Connection NPC cell can also be classified into two families, as shown in

Table 1. Two inverter topology families from USPWM.

(M, N)	X1 + X2	Y1 + Y2	Family With Extra Diode		Family Without Extra Diode
			Without NPC Cell (Part I)	With NPC Cell (Part II)	Without NPC Cell (Part I)	With NPC Cell (Part II)
(M = 2, N = 2)	1 + 1	1 + 1	R1, R3	R1S1-1, R1S1-2, R3S1-1, R3S1-2	R2	R2S1
(M = 2, N = 3) or (M = 3, N = 2)	1 + 2	1 + 1	R4	R4S1-1, R4S1-2, R4S1-3	R5	R5S1
	1 + 1	1 + 2
	2 + 1	1 + 1
	1 + 1	2 + 1
(M = 3, N = 3)	2 + 1	2 + 1	R6	R6S1	R7	R7S1
	1 + 2	1 + 2
	2 + 1	1 + 2	R8	R8S1-1, R8S1-2	None available	None available
	1 + 2	2 + 1
(M = 3, N = 4) or (M = 4, N = 3)	1 + 2	2 + 2	R9	R9S1-1, R9S1-2	R10	R10S1
	2 + 2	1 + 2
	2 + 1	2 + 2
	2 + 2	2 + 1
(M = 4, N = 4)	2 + 2	2 + 2	R11, R12	R11S1-1, R11S1-2, R12S1-1, R12S1-2	R13	R13S1-1, R13S1-2

, R1 is a topology without an NPC cell that has been proposed in Part I. R1S1 is the topology with the NPC cell corresponding to R1, and will be examined in this paper.

3.1. Indirect Connection NPC Cell Based on Two Topology Familes

Figure 3 shows the Indirect Connection NPC cell circuits based on the topology family with an extra diode. Two freewheeling cell circuits are introduced, and four corresponding NPC cell circuits are described.

As described in Part I of this paper, there are two freewheeling cell circuits based on the topology family with an extra diode, as shown in Figure 5a,d. For Figure 5a, the current flows from point B to point A through switch T_PF and diode D_PF in series, and from point A to point B through switch T_NF and diode D_NF in series. In Figure 5d, the current flows bidirectionally between points B and A through the switch T_F, which is kept on in both PF and NF modes.

An extra switch, T_B1, is added between points O and H in Figure 5b,e. According to Rule #1, both switches T_PF and T_NF in Figure 5b are turned on in PF and NF modes. The midpoint O is connected to point B through the extra switch T_B1 and switch T_NF based on Rule #2. Switches T_B1 and T_NF are connected in series to realize bidirectional current flow between point O and point B, as shown in Figure 5b. Similarly, the switch T_F in Figure 5e is turned on in both PF and NF modes based on Rule #1. The midpoint O is connected to point B through the extra switch T_B1 and the switch T_F based on Rule #2.

Two extra diodes, D_B1 and D_B2, are added between points O and H, O and G in Figure 5c,f. Both switches T_PF and T_NF in Figure 5c are turned on in PF and NF modes based on Rule #1. Point B is connected to point O through diode D_B1 and switch T_PF or through D_B2 and T_NF in Figure 5c, based on Rule #2. A bidirectional current branch clamps point B (or point A) in PF mode and NF mode. It is easy to make a similar analysis of the NPC cell shown in Figure 5f. For the sake of brevity, this is not presented here.

As described in Part I of this paper, two methods can be used to construct the freewheeling cell based on the topology family without an extra diode; they are shown in Figure 6a,c. In Figure 6b, the extra switch T_B1 is added between points O and G (H), and the midpoint O is connected to point B (or point A) through the extra switch T_B1 based on Rule #2. Two extra diodes, D_B1 and D_B2, are added between points O and G/H in Figure 6d. D_B1 and D_B2 are used to provide the bidirectional current path in PF and NF modes. The corresponding NPC topologies will be described in the next section.

Figure 6 shows the Indirect Connection NPC cell circuits based on the topology family without an extra diode. Two freewheeling cell circuits are introduced, and two corresponding NPC cell circuits are described.

3.2. M = 2, N = 2

The steps of how to derive the Indirect Connection NPC topology R1S1 based on HERIC topology R1are illustrated in Figure 7.

The HERIC topology, named R1 in Figure 7a, is well known. Points A and B are short-circuited in PF mode (the red branch from point B to A) and NF mode (the blue branch from point A to B). The current flows to point B through T_P3, D_P3 to Point A in PF mode, and flows point A through T_N3, D_N3 to point B in NF mode. The DC capacitor C_dc is split into two series capacitors, C₁ and C₂, to provide half the input voltage shown in Figure 7b,c. According to Rule #1, switches T_P3 and T_N3 are on. An extra switch T_B1 is added so that point B is clamped to point O, as shown in Figure 7b. As shown in Figure 7c, two additional diodes, D_B1 and D_B2, are added to guarantee that point B is clamped to point O.

Figure 8 shows all the NPC topologies under M = 2, N = 2.

An extra switch, T_B1, is added to flow the bidirectional current, as shown in Figure 8a,c,d. Two extra diodes, D_B1 and D_B2, are added to flow bidirectional current, as shown in Figure 8b,e.

3.3. M = 2, N = 3 or M = 3, N = 2

Figure 9 shows all the NPC topologies under M = 2, N = 3 or M = 3, N = 2. An extra switch, T_B1, is added to flow bidirectional current, as shown in Figure 8b and Figure 9a,d. Two extra diodes, D_B1 and D_B2, are added to flow bidirectional current, as shown in Figure 9c.

3.4. M = 3, N = 3

Figure 10 shows all the NPC topologies based on the original topologies H6 and H5 under M = 3, N = 3.

3.5. M = 3, N = 4 or M = 4, N = 3

Figure 11 shows all the NPC topologies under M = 3, N = 4 or M = 4, N = 3.

3.6. M = 4, N = 4

Figure 12 shows all the NPC topologies under M = 4, N = 4.

4. Inverter Topologies Based on the Direct Connection NPC Cell from USPWM

In this section, inverter topologies based on a Direct Connection NPC cell from USPWM are introduced. As shown in

Table 2. Two inverter topology families from USPWM.

(M, N)	X1 + X2	Y1 + Y2	Family With Extra Diode		Family Without Extra Diode
			Without NPC Cell (Part I)	With NPC Cell (Part II)	Without NPC Cell (Part I)	With NPC Cell (Part II)
(M = 2, N = 2)	1 + 1	1 + 1	R1, R3	R1S2, R3S2	R2	R2S2-1, R2S2-2
(M = 2, N = 3) or (M = 3, N = 2)	1 + 2	1 + 1	R4	R4S2	R5	R5S2-1, R5S2-2
	1 + 1	1 + 2
	2 + 1	1 + 1
	1 + 1	2 + 1
(M = 3, N = 3)	2 + 1	2 + 1	R6	R6S2	R7	R7S2-1, R7S2-2
	1 + 2	1 + 2
	2 + 1	1 + 2	R8	R8S2	None available	R8S2
	1 + 2	2 + 1
(M = 3, N = 4) or (M = 4, N = 3)	1 + 2	2 + 2	R9	R9S2	R10	R10S2
	2 + 2	1 + 2
	2 + 1	2 + 2
	2 + 2	2 + 1
(M = 4, N = 4)	2 + 2	2 + 2	R11, R12	R11S2, R12S2	R13	R13S2

, they are also classified into two families.

4.1. Direct Connection NPC Cell Based on Two Topology Families

Figure 13 shows the Direct Connection NPC cell circuits based on the topology family with an extra diode. Two freewheeling cell circuits are introduced in Figure 13a,c, respectively. The switches T_PF and T_NF in the NPC cell are on in both PF and NF mode, based on Rule #1. According to Rule #2, the extra switches, T_B1, T_B2, and extra diodes, D_B3, D_B4, are inserted into the freewheeling cell in Figure 13b. As shown in Figure 13b, the midpoint O is connected to point B (or point A) through the extra switch T_B1 (T_B2) and extra diode D_B4 (D_B3). The midpoint O is connected to point B through the extra switch T_B1 shown in Figure 13d. It is observed that the freewheeling cell is changed due to the injection of extra switches and diodes.

Figure 14 shows the Direct Connection NPC cell circuits based on the topology family without an extra diode. There is one circuit which may be used to construct the freewheeling cell, as shown in Figure 14a. Figure 14b,c show the NPC cell circuits. The original freewheeling branch is cut and two extra switches, T_B1 and T_B2, are inserted to form the new freewheeling branch Figure 14b. The midpoint O is connected to point B (or point A) through the extra switches T_B1 (or T_B2) based on Rule #2. One extra switch, T_B1, and two extra diodes, D_B2 and D_B3, are inserted to construct the new freewheeling branch in Figure 14c. The current flows from point B to point A through D_PF, T_B1, D_B2, T_PF in PF mode and point B is connected to point O. The current flows from point A to point B through D_NF, D_B3, and T_NF.

4.2. M = 2, N = 2

In order to show how the Direct Connection NPC topology R2S2 is derived based on HERIC topology R2, it is illustrated in Figure 15. According to Rule #1, switches T_P3 and T_N3 are on in PF and NF modes. As shown in Figure 15b, two extra switches, T_B1 and T_B2, are inserted so that point B or point A is clamped to point O based on Rule #2. In Figure 15c, two extra diodes, D_B2 and D_B3, and one extra switch, T_B1, are inserted to guarantee that point B is clamped to point O.

Figure 16 shows the other Direct Connection NPC topologies based on HERIC topology under M = 2, N = 2. Two extra switches, T_B1 and T_B2, are inserted as shown in Figure 16a, and T_B1 is inserted in Figure 16b.

4.3. M = 2, N = 3 or M = 3, N = 2

Figure 17 shows all the NPC topologies under M = 2, N = 3 or M = 3, N = 2. Two extra switches, T_B1, T_B2, and two extra diodes, D_B3 and D_B4, are inserted so that point B or A is clamped to point O, as shown in Figure 17a. Two extra switches, T_B1, T_B2, are inserted in Figure 17b. One switch, T_B1, and two diodes, D_B2 and D_B3, are inserted in Figure 17c.

4.4. M = 3, N = 3

Figure 18 shows all the NPC topologies under M = 3, N = 3. Two extra switches, T_B1 and T_B2, and two extra diodes, D_B3 and D_B4, are inserted in Figure 18a,d. Two extra switches, T_B1, T_B2, are added in Figure 18b. One switch, T_B1, and two diodes, D_B2, D_B3, are added in Figure 18c.

4.5. M = 3, N = 4 or M = 4, N = 3

Figure 19 shows the NPC topologies under M = 3, N = 4 or M = 4, N = 3.

4.6. M = 4, N = 4

Figure 20 shows all the NPC topologies under M = 4, N = 4. Figure 20a is given as an example to describe the current flowing. In PF or NF mode, there are two branches for the flow of positive current. One is as follows: Point B→D_P2→T_B1→D_B5→T_P2→Point A, and the other is from Point B→T_P3→D_B6→T_B2→D_P3→Point A. Similarly, there are two branches for the flow of negative current. The first one is as follows: Point A→D_N2→T_B3→D_B7→T_N2→Point B. The other is from Point A→T_N3→D_B8→T_B4→D_N3→Point B.

5. Two Types of NPC Cells and Reflected Topologies under DFUSPWM

Similar to USPWM, there are two type of NPC cells under DFUSPWM. Part A introduces the principle of the Indirect Connection NPC cell and reflected topologies under DFUSPWM. Part B introduces the principle of the Direct Connection NPC cell and reflected topologies under DFUSPWM.

5.1. Principle of Indirect Connection NPC Cell and Reflected Topologies under DFUSPWM

Figure 21 shows a schematic diagram of the first type of unified NPC cell. Two capacitors with the same capacitance are connected in series to achieve half of the input voltage for each one. The Indirect Connection NPC cell under DFUSPWM is connected to the freewheeling cell through extra branches in PFT mode, PFB mode, NFT mode, and NFB mode to keep the CM voltage constant. The extra branches are $\widehat{\mathrm{OG}}$ and $\widehat{\mathrm{OH}}$ flowing positive current in Figure 21a,b, and $\widehat{\mathrm{OI}}$ and $\widehat{\mathrm{OJ}}$ flowing negative current in Figure 21c,d. It can be seen that the internal connections of the freewheeling cell remain the same in freewheeling mode.

The inverter topologies with the Indirect Connection NPC cell under DFUSPWM can also be classified into two types, as shown in

Table 3. Two NPC topology families under DFUSPWM.

(M, N)	X1 + X2	Y1 + Y2	Family With Extra Diode		Family Without Extra Diode
			Without NPC Cell	With NPC Cell	Without NPC Cell	With NPC Cell
(M = 4, N = 4)	2 + 2	2 + 2	R11, R12	R11S1, R12S1	R13	R13S1

.

Figure 22 shows the Indirect Connection NPC cell circuits based on freewheeling cell circuits. There are three methods by which to construct the freewheeling cell based on the topology family with an extra diode. They are shown respectively in Figure 5a and Figure 22c,e.

For the NPC cells in Figure 22b,d,f, T_P2 and T_N3 have the same signals to remain on or off, and T_P3 and T_N2 have the same driving signals under DFUSPWM. Thus, additional diodes or switches can be used to provide a bidirectional current branch to clamp point A or point B to point O. The corresponding inverter topologies are shown in Figure 23.

5.2. Principle of the Direct Connection NPC Cell and Reflected Topology under DFUSPWM

Figure 24 shows a schematic diagram of the second type of unified NPC cell under DFUSPWM. The extra branch $\widehat{\mathrm{GH}}$ is injected into the freewheeling path $\widehat{\mathrm{BCA}}$ in Figure 24a, and $\widehat{\mathrm{IJ}}$ is injected into the freewheeling path $\widehat{\mathrm{BEA}}$ in Figure 24b. Similarly, the extra branch $\widehat{\mathrm{KL}}$ is injected into the freewheeling path $\widehat{\mathrm{ADB}}$ in Figure 24c and $\widehat{\mathrm{MN}}$ is injected into the freewheeling path $\widehat{\mathrm{AFB}}$ in Figure 24d. Clearly, the internal connections of the freewheeling cell have been changed due to the injection of the Direct Connection NPC cell.

The inverter topologies with the Direct Connection NPC cell under DFUSPWM can also be classified into two types, as shown in

Table 4. Direction connection NPC cell under DFUSPWM.

(M, N)	X1 + X2	Y1 + Y2	Family with Extra Diode		Family Without Extra Diode
			Without NPC Cell	With NPC Cell	Without NPC Cell	With NPC Cell
(M = 4, N = 4)	2 + 2	2 + 2	R11, R12	R11S2, R12S2	R13	R13S2

.

Figure 25 shows the Direct Connection NPC cell circuits based on the freewheeling cell circuits under DFUSPWM. Three freewheeling cell circuits are introduced in Figure 25a,c,e.

There are two current branches which allow the current to flow from point B to A, or from point A to B. Point A is of the same voltage as point B so that point A or point B is connected to NPC cell.

For NPC cells, as shown in Figure 25b,d,f, additional diodes and/or switches are used to provide a bidirectional current branch to clamp point A or B to point O. The corresponding inverter topologies are shown in Figure 26.

In order to make an overall comparison of all the derived topologies,

Table 5. Comparison of the Inverter topologies under USPWM.

Topology Name	Number of Switches	Number of Diodes	Economic Cost	Topology Name	Number of Switches	Number of Diodes	Economic Cost
R1S1-1	7	2	7.6	R10S1	8	3	8.9
R1S1-2	6	4	7.2	R13S1-1	7	0	7
R3S1-1	6	4	7.2	R13S1-2	6	2	6.6
R3S1-2	5	6	6.8	R1S2	8	4	9.2
R4S1-1	7	2	7.6	R3S2	6	4	7.2
R4S1-2	7	2	7.6	R4S2	8	4	9.2
R4S1-3	6	4	7.2	R6S2	8	4	9.2
R6S1	7	2	7.6	R8S2	8	4	9.2
R8S1-1	7	2	7.6	R9S2	10	6	11.8
R8S1-2	6	4	7.2	R11S2	12	8	14.4
R9S1-1	8	3	8.9	R12S2	12	4	13.2
R9S1-2	7	5	8.5	R2S2-1	8	0	8
R11S1-1	9	4	10.2	R2S2-2	7	2	7.6
R11S1-2	8	6	9.8	R5S2-1	8	0	8
R12S1-1	8	2	8.6	R5S2-2	8	2	8.6
R12S1-2	7	4	8.2	R7S2-1	8	0	8
R2S1	7	0	7	R7S2-2	7	2	7.6
R5S1	7	0	7	R10S2	10	2	10.6
R7S1	6	0	6	R13S2	12	0	12

and

Table 6. Comparison of the Inverter topologies under DFUSPWM.

Connection Mode of NPC Cell	Topologies Name	Number of Switches	Number of Diodes	Economic Cost
Indirect Connection	R11S1	8	8	10.4
	R12S1	8	2	8.6
	R13S1	6	2	6.6
Direct Connection	R11S2	12	4	13.2
	R12S2	10	2	10.6
	R13S2	9	0	9

are presented, wherein the number of switches, the number of diodes and the economic cost of all the derived topologies are taken into consideration. Among them, the economic cost part is obtained based on the formula that each switch costs 1, while each diode costs 0.3. Based on the two tables, we may select a circuit topology which is suitable for our situation.

6. Simulation Results

Two types NPC topologies with a Direct Connection NPC cell or an Indirect Connection NPC cell are provided based on the topologies provided in Part I of this paper. To further verify the theoretical analysis in the coming sections, simulations based on two proposed topologies are made, and the simulation results are given. One is the H6 topology (R5) and the proposed H6 topology with a Direct Connection NPC cell (R5S2-2) under USPWM. The other is the proposed H8 topology (R13) and H8 topology with an Indirect Connection NPC cell (R11S1) under DFUSPWM. 0shows the simulation parameters.

6.1. H6 Topology Without/With Direct Connection NPC Cell under USPWM

Figure 27 shows the H6 topology without/with a Direct Connection NPC cell. The H6 topology R5 is illustrated in Figure 27a. Switches T_P2 and T_N3 are used to allow the freewheeling current to flow. The freewheeling branch is cut off and the Direct Connection NPC cell is injected into the topology R5 to form R5S2-2, as shown in Figure 27b.

Figure 28 shows the waveforms of CM voltage and leakage current. In t₀–t₁, the topology H6 without the NPC cell works, and the CM voltage (V_AN + V_BN)/2 does not remain constant. The CM voltage includes high frequency resonant voltage in freewheeling mode, as terminals A and B are floating (V_AN = V_BN). The leakage current is 100 mA. In t₁–t₂, the topology H6 with the NPC cell works and the CM voltage (V_AN + V_BN)/2 always remains constant. The leakage current is reduced from 100 mA to 2 mA.

Figure 29 shows the waveforms of the grid current, terminal voltage, CM voltage, and leakage current with the parameters listed in

Table 7. Simulation Parameters.

Parameter	Value
Rated power	3000 W
Input voltage	400 V
Grid voltage/frequency	220 V/50 Hz
Filter inductor L1, L2	1 mH
Switching frequency	20 kHz
DC-bus Capacitor Cdc1, Cdc2	470 µF
Junction capacitor of each switch	100 pF
PV parasitic capacitor CPV1, CPV2	0.1 µH

. The THD of the grid current is about 1.12%. As we can see, the CM voltage is maintained at 200 V with small fluctuations over the whole power line period; thus, the RMS value of the leakage current is only 3 mA. Figure 30 shows the waveforms when the load steps at t = 0.06 s. The THD is still 1.12%. The CM voltage and leakage current have the same values as those in Figure 29.

6.2. H8 Topology Without/With Indirect Connection NPC Cell under DFUSPWM

Figure 31 shows the topology H8 without/with “Indirect Connection” NPC cell under DFUSPWM.

Figure 32 shows the waveforms of CM voltage and leakage current. It may be observed that the topology H8 without the NPC cell works, and the CM voltage is not constant between t₀ and t₁. The CM voltage contains high frequency resonant voltage in freewheeling mode due to the floating terminals A and B. The leakage current is 100 mA. In t₁–t₂, the topology H8 with NPC cell works, and the CM voltage always remains constant. The leakage current is reduced from 100 mA to 3 mA.

Figure 33 shows the waveforms of the leakage current, voltage V_AB, and PWM signal. The same PWM signals are provided to couple switches T_P1 and T_P3, T_P2 and T_P4, T_N1 and T_N3, as well as T_N2 and T_N4. To achieve good clamping performance, complementary PWM signals are given to couple switches T_P1 and T_N2, as well as T_P2 and T_N1. The frequency of voltage V_AB is double the switching frequency.

7. Conclusions

In this paper, a topology derivation methodology, named the “MN principle”, is proposed to cover all possible full-bridge topologies with leakage current suppression under USPWM and DFUSPWM. Two types of NPC cells have been developed: one is called “indirect connection NPC topology”, and the other “direct connection NPC topology”. Under USPWM, twenty-three newly-found indirect connection NPC topologies have been derived along with the existing ones, and twenty-two newly-found direct connection NPC topologies have been derived along with the existing ones. The proposed method is also extended to the topologies under DFUSPWM. As a result, four corresponding topologies have been derived and one existing topology was also covered. Finally, simulations are given to verify the performance of the leakage current suppression of the proposed topologies. And it can be inferred that the contribution of this paper has important guiding significance for topological derivation.