Circuit Techniques to Improve Low-Light Characteristics and High-Accuracy Evaluation System for CMOS Image Sensor

Round 1

Reviewer 1 Report

The authors propose two methods to improve low-light characteristics, which are very interesting. However there are still several issues to be solved before publication.

(1) The authors claim that there is a RUSH current phenomenon in the conventional comparator as shown in fig.2(a). Since the second stage of the comparator is a common source amplifier, the RUSH current will happen. If the second stage is also realized by a differential amplifier like the first stage, since the total biased current is always stable, the RUSH current phenomenon will not happen. If this is right, which method will be better, please discuss it.

(2) The authors proposed a timing shift ADC structure to decrease the number of simultaneously operating ADCs. The difference in conversion time is produced by an offset voltage, which is described as equation (3). Therefore, the offset voltage is sensitive to C1, C3 and Cp. Since each column has different C1, C3 and Cp due to process mismatch, will this method introduce serious column FPN? I think the influence of the proposed method on the FPN needs to be discussed.

Author Response

Comment 1:The authors claim that there is a RUSH current phenomenon in the conventional comparator as shown in fig.2(a). Since the second stage of the comparator is a common source amplifier, the RUSH current will happen. If the second stage is also realized by a differential amplifier like the first stage, since the total biased current is always stable, the RUSH current phenomenon will not happen. If this is right, which method will be better, please discuss it.

Responce:Thank you very much for your valuable comment. Originally, our prior comparator also used a differential amplifier to amplify signals up to the logic in the second stage of the ADC (Figure 3 in Ref. [23]). However, since the second-stage amplifier must have double capacitance, we adopted a method in which the second stage is single-ended in order to achieve a smaller ADC. As shown in Fig. 15 of our paper, the size of the ADC accounts for a large percentage of the CIS area, and there is a demand to reduce the ADC size as much as possible, first of all from the chip cost perspective.

Such single-ended scheme itself has already been reported (Figure 2 in Ref. [22]). However, there is a RUSH current issue when the second-stage amplifier is single-ended scheme and it causes linearity degradation especially in low light applications, so we devised a way to solve this problem while still achieving a compact ADC size.

 

We have described the above contents in the introduction (P. 2) with red characters.

 

Comment2: The authors proposed a timing shift ADC structure to decrease the number of simultaneously operation ADCs. The difference in conversion time is produced by an offset voltage, which is described as equation (3). Therefore, the offset voltage is sensitive to C1, C3 and Cp. Since each column has different C1, C3 and Cp due to process mismatch, will this method introduce serious column FPN? I think the influence of the proposed method on the FPN needs to be discussed.

 

Responce:Thank you for your comments. As you pointed out, the offset voltage in equation (3) will vary due to the capacitance mismatch. And we think that the variation will be the time deviation of AD conversion (Toffset deviation), as shown in Fig. 7. However, we have adopted a method to cancel this offset by performing AD conversion twice (“Digital CDS” in Fig. 2(b)) with Reset and Signal, so FPN due to mismatch will not occur. This is because the digital CDS can cancel the offset voltage in equation (3) itself, including capacitance mismatches. We have added a note to Section 2 (P. 6) with red characters. In addition, we have added to Figs. 5, 7, and 8 that the deviation of Voffset and Toffset also occurs on the Signal Conversion side.

Reviewer 2 Report

The paper reports interesting technical approach and solutions. The contents are clearly exposed with the help of good quality pictures and graphs. No major revisions are required.

Author Response

Comment: The paper reports interesting technical approach and solutions. The contents are clearly exposed with the help of good quality pictures and graphs. No major revisions are required.

Responce: Thank you very much for your comment. The revised version responded only to the points raised by the other reviewers.

Reviewer 3 Report

The proposed technique in this paper looks very challenging for the evaluation of CMOS image sensors. However, I have some comments.

1)      It is advised to edit the abstract and the introduction the way to better appeal your work and show the figure of merit and help reader understand better the advantage of the proposed technique

2)      How is noise performance when using the proposed timing shift ADC.

3)      Folding integration ADC’s have very good noise performance and can be used when low noise and wide dynamic range is required. How advantageous is your proposed time shft ADC when compared to FI ADC?

4)      The sensor board is connected to the programable power supply using regular cables. Doesn’t that affect the power supply noise performances?

5)      A performance comparison to other work (there are a plenty of high speed low noise and wide dynamic range CMOS image sensor) is also advised.

6)      Proof reading is advised to address some typos and grammar errors.

Author Response

Thank you very much for your valuable comments. We have revised the paper according to your comments as listed below.

 

Comment1: It is advised to edit the abstract and the introduction the way to better appeal your work and show the figure of merit and help reader understand better the advantage of the proposed technique.

Response:Thank you for your comment. We have revised the abstract and the introduction to make this method appealing. Revised parts are noted in red characters.

 

Comment2: How is noise performance when using the proposed timing shift ADC.

Response: In terms of random noise, it is not inferior to other technologies, as described in newly added Table 2. Although we assumed the adoption of FI-ADC (described below), we adopted the single-slope ADC from the viewpoint of area reduction. Since the surveillance cameras are targeted at the volume zone, the configuration is designed with the highest priority on area reduction for cost reduction.

Comment3:  Folding integration ADC's have very good noise performance and can be used when  low noise and wide dynamic range is required. How advantageous is your proposed time shift ADC when compared to FI ADC?

Response: As mentioned above, this method assumes a single-slope ADC, which is widely used in terms of area (and power). We also believe that FI-ADC has an advantage in terms of noise, but on the other hand, single-slope ADC is widely used as shown in the reference [19]-[26], and it depends on the application. We have added a note to this effect in the introduction and added a comparison table including FI-ADC in Table 2. Thank you very much for your useful advice.

 

Comment4: The sensor board is connected to the programmable power supply using regular cables. Doesn't that affect the power supply noise performances?

Response: As you have pointed out, there is concern that the inductance of the power cable may increase power supply noise and degrade the performance of the image sensor. Although inductance can be lowered by using thicker and shorter cables, this creates physical placement restrictions between boards and requires careful handling in the evaluation. For this reason, the regular cable is used, which has fewer placement restrictions, but ferrite beads and decoupling capacitors are placed on the back side of the sensor board to reduce power supply noise.

We have described the above contents in Section 3 (P. 11) with red characters.

 

Comment5: A performance comparison to other work (there are a plenty of high speed low noise and wide dynamic range CMOS image sensor) is also advised.

Response: Thank you for your advice. We have added a comparison table in Table 2 and its comments as noted above.

 

Comment6:  Proof reading is advised to address some typos and grammar errors.

Response: We have fixed some typo and grammar errors with red characters. Thank you.

Round 2

Reviewer 1 Report

All my concerns have been solved